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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_cec.c |
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4 | * @author MCD Application Team |
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5 | mjames | 5 | * @version V1.0.4 |
6 | * @date 29-April-2016 |
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2 | mjames | 7 | * @brief CEC HAL module driver. |
8 | * This file provides firmware functions to manage the following |
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9 | * functionalities of the High Definition Multimedia Interface |
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10 | * Consumer Electronics Control Peripheral (CEC). |
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11 | * + Initialization and de-initialization functions |
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12 | * + IO operation functions |
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13 | * + Peripheral Control functions |
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14 | * |
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15 | * @verbatim |
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16 | ============================================================================== |
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17 | ##### How to use this driver ##### |
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18 | ============================================================================== |
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19 | [..] |
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20 | The CEC HAL driver can be used as follows: |
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21 | (#) Declare a CEC_HandleTypeDef handle structure. |
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22 | (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API: |
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23 | (##) Enable the CEC interface clock. |
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24 | (##) Enable the clock for the CEC GPIOs. |
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25 | (##) Configure these CEC pins as alternate function pull-up. |
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26 | (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT() |
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27 | and HAL_CEC_Receive_IT() APIs): |
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28 | (##) Configure the CEC interrupt priority. |
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29 | (##) Enable the NVIC CEC IRQ handle. |
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30 | (##) The CEC interrupt is activated/deactivated by the HAL driver |
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31 | |||
32 | (#) Program the Bit Timing Error Mode and the Bit Period Error Mode in the hcec Init structure. |
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33 | |||
34 | (#) Initialize the CEC registers by calling the HAL_CEC_Init() API. |
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35 | |||
36 | (#) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
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37 | by calling the customized HAL_CEC_MspInit() API. |
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38 | |||
39 | @endverbatim |
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40 | ****************************************************************************** |
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41 | * @attention |
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42 | * |
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5 | mjames | 43 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
2 | mjames | 44 | * |
45 | * Redistribution and use in source and binary forms, with or without modification, |
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46 | * are permitted provided that the following conditions are met: |
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47 | * 1. Redistributions of source code must retain the above copyright notice, |
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48 | * this list of conditions and the following disclaimer. |
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49 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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50 | * this list of conditions and the following disclaimer in the documentation |
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51 | * and/or other materials provided with the distribution. |
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52 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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53 | * may be used to endorse or promote products derived from this software |
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54 | * without specific prior written permission. |
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55 | * |
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56 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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57 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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58 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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59 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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60 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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61 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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62 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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63 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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64 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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65 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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66 | * |
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67 | ****************************************************************************** |
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68 | */ |
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69 | |||
70 | /* Includes ------------------------------------------------------------------*/ |
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71 | #include "stm32f1xx_hal.h" |
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72 | |||
73 | #ifdef HAL_CEC_MODULE_ENABLED |
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74 | |||
75 | #if defined(STM32F100xB) || defined(STM32F100xE) |
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76 | |||
77 | /** @addtogroup STM32F1xx_HAL_Driver |
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78 | * @{ |
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79 | */ |
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80 | |||
81 | /** @defgroup CEC CEC |
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82 | * @brief HAL CEC module driver |
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83 | * @{ |
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84 | */ |
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85 | |||
86 | /* Private typedef -----------------------------------------------------------*/ |
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87 | /* Private define ------------------------------------------------------------*/ |
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88 | /** @defgroup CEC_Private_Constants CEC Private Constants |
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89 | * @{ |
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90 | */ |
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91 | #define CEC_CFGR_FIELDS (CEC_CFGR_BTEM | CEC_CFGR_BPEM ) |
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92 | #define CEC_FLAG_TRANSMIT_MASK (CEC_FLAG_TSOM|CEC_FLAG_TEOM|CEC_FLAG_TBTRF) |
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93 | #define CEC_FLAG_RECEIVE_MASK (CEC_FLAG_RSOM|CEC_FLAG_REOM|CEC_FLAG_RBTF) |
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94 | #define CEC_ESR_ALL_ERROR (CEC_ESR_BTE|CEC_ESR_BPE|CEC_ESR_RBTFE|CEC_ESR_SBE|CEC_ESR_ACKE|CEC_ESR_LINE|CEC_ESR_TBTFE) |
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95 | #define CEC_RXXFERSIZE_INITIALIZE 0xFFFF /*!< Value used to initialise the RxXferSize of the handle */ |
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96 | /** |
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97 | * @} |
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98 | */ |
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99 | |||
100 | /* Private macro -------------------------------------------------------------*/ |
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101 | /* Private variables ---------------------------------------------------------*/ |
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102 | /* Private function prototypes -----------------------------------------------*/ |
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103 | /** @defgroup CEC_Private_Functions CEC Private Functions |
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104 | * @{ |
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105 | */ |
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106 | static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec); |
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107 | static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec); |
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108 | /** |
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109 | * @} |
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110 | */ |
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111 | |||
112 | /* Exported functions ---------------------------------------------------------*/ |
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113 | |||
114 | /** @defgroup CEC_Exported_Functions CEC Exported Functions |
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115 | * @{ |
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116 | */ |
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117 | |||
118 | /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions |
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119 | * @brief Initialization and Configuration functions |
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120 | * |
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121 | @verbatim |
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122 | =============================================================================== |
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123 | ##### Initialization and Configuration functions ##### |
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124 | =============================================================================== |
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125 | [..] |
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126 | This subsection provides a set of functions allowing to initialize the CEC |
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127 | (+) The following parameters need to be configured: |
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128 | (++) TimingErrorFree |
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129 | (++) PeriodErrorFree |
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130 | (++) InitiatorAddress |
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131 | |||
132 | @endverbatim |
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133 | * @{ |
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134 | */ |
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135 | |||
136 | /** |
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137 | * @brief Initializes the CEC mode according to the specified |
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138 | * parameters in the CEC_InitTypeDef and creates the associated handle . |
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139 | * @param hcec: CEC handle |
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140 | * @retval HAL status |
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141 | */ |
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142 | HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec) |
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143 | { |
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144 | /* Check the CEC handle allocation */ |
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145 | if(hcec == NULL) |
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146 | { |
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147 | return HAL_ERROR; |
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148 | } |
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149 | |||
150 | /* Check the parameters */ |
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151 | assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); |
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152 | assert_param(IS_CEC_BIT_TIMING_ERROR_MODE(hcec->Init.TimingErrorFree)); |
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153 | assert_param(IS_CEC_BIT_PERIOD_ERROR_MODE(hcec->Init.PeriodErrorFree)); |
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154 | assert_param(IS_CEC_ADDRESS(hcec->Init.InitiatorAddress)); |
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155 | |||
156 | if(hcec->State == HAL_CEC_STATE_RESET) |
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157 | { |
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158 | /* Allocate lock resource and initialize it */ |
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159 | hcec->Lock = HAL_UNLOCKED; |
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160 | /* Init the low level hardware : GPIO, CLOCK */ |
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161 | HAL_CEC_MspInit(hcec); |
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162 | } |
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163 | |||
164 | hcec->State = HAL_CEC_STATE_BUSY; |
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165 | |||
166 | /* Disable the Peripheral */ |
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167 | __HAL_CEC_DISABLE(hcec); |
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168 | |||
169 | /* Write to CEC Control Register */ |
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170 | MODIFY_REG(hcec->Instance->CFGR, CEC_CFGR_FIELDS, hcec->Init.TimingErrorFree|hcec->Init.PeriodErrorFree); |
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171 | |||
172 | /* Write to CEC Own Address Register */ |
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173 | MODIFY_REG(hcec->Instance->OAR, CEC_OAR_OA, hcec->Init.InitiatorAddress); |
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174 | |||
175 | /* Configure the prescaler to generate the required 50 microseconds time base.*/ |
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176 | MODIFY_REG(hcec->Instance->PRES, CEC_PRES_PRES, 50*(HAL_RCC_GetPCLK1Freq()/1000000)-1); |
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177 | |||
178 | /* Enable the Peripheral */ |
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179 | __HAL_CEC_ENABLE(hcec); |
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180 | |||
181 | hcec->State = HAL_CEC_STATE_READY; |
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182 | |||
183 | return HAL_OK; |
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184 | } |
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185 | |||
186 | |||
187 | |||
188 | /** |
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189 | * @brief DeInitializes the CEC peripheral |
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190 | * @param hcec: CEC handle |
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191 | * @retval HAL status |
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192 | */ |
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193 | HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec) |
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194 | { |
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195 | /* Check the CEC handle allocation */ |
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196 | if(hcec == NULL) |
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197 | { |
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198 | return HAL_ERROR; |
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199 | } |
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200 | |||
201 | /* Check the parameters */ |
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202 | assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); |
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203 | |||
204 | hcec->State = HAL_CEC_STATE_BUSY; |
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205 | |||
206 | /* Set peripheral to reset state */ |
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207 | hcec->Instance->CFGR = 0x0; |
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208 | hcec->Instance->OAR = 0x0; |
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209 | hcec->Instance->PRES = 0x0; |
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210 | hcec->Instance->CFGR = 0x0; |
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211 | hcec->Instance->ESR = 0x0; |
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212 | hcec->Instance->CSR = 0x0; |
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213 | hcec->Instance->TXD = 0x0; |
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214 | hcec->Instance->RXD = 0x0; |
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215 | |||
216 | /* Disable the Peripheral */ |
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217 | __HAL_CEC_DISABLE(hcec); |
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218 | |||
219 | /* DeInit the low level hardware */ |
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220 | HAL_CEC_MspDeInit(hcec); |
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221 | |||
222 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
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223 | hcec->State = HAL_CEC_STATE_RESET; |
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224 | |||
225 | /* Process Unlock */ |
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226 | __HAL_UNLOCK(hcec); |
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227 | |||
228 | return HAL_OK; |
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229 | } |
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230 | |||
231 | /** |
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232 | * @brief CEC MSP Init |
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233 | * @param hcec: CEC handle |
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234 | * @retval None |
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235 | */ |
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236 | __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec) |
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237 | { |
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5 | mjames | 238 | /* Prevent unused argument(s) compilation warning */ |
239 | UNUSED(hcec); |
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2 | mjames | 240 | /* NOTE : This function should not be modified, when the callback is needed, |
241 | the HAL_CEC_MspInit can be implemented in the user file |
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242 | */ |
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243 | } |
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244 | |||
245 | /** |
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246 | * @brief CEC MSP DeInit |
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247 | * @param hcec: CEC handle |
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248 | * @retval None |
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249 | */ |
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250 | __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec) |
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251 | { |
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5 | mjames | 252 | /* Prevent unused argument(s) compilation warning */ |
253 | UNUSED(hcec); |
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2 | mjames | 254 | /* NOTE : This function should not be modified, when the callback is needed, |
255 | the HAL_CEC_MspDeInit can be implemented in the user file |
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256 | */ |
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257 | } |
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258 | |||
259 | /** |
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260 | * @} |
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261 | */ |
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262 | |||
263 | /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions |
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264 | * @brief CEC Transmit/Receive functions |
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265 | * |
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266 | @verbatim |
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267 | =============================================================================== |
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268 | ##### IO operation functions ##### |
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269 | =============================================================================== |
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270 | [..] |
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271 | This subsection provides a set of functions allowing to manage the CEC data transfers. |
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272 | |||
273 | (#) There are two modes of transfer: |
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274 | (##) Blocking mode: The communication is performed in polling mode. |
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275 | The HAL status of all data processing is returned by the same function |
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276 | after finishing transfer. |
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277 | (##) No-Blocking mode: The communication is performed using Interrupts. |
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278 | These API's return the HAL status. |
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279 | The end of the data processing will be indicated through the |
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280 | dedicated CEC IRQ when using Interrupt mode. |
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281 | The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks |
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282 | will be executed respectivelly at the end of the Transmit or Receive process. |
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283 | The HAL_CEC_ErrorCallback()user callback will be executed when a communication |
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284 | error is detected |
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285 | (#) Blocking mode API's are : |
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286 | (##) HAL_CEC_Transmit() |
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287 | (##) HAL_CEC_Receive() |
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288 | (#) Non-Blocking mode API's with Interrupt are : |
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289 | (##) HAL_CEC_Transmit_IT() |
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290 | (##) HAL_CEC_Receive_IT() |
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291 | (##) HAL_CEC_IRQHandler() |
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292 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
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293 | (##) HAL_CEC_TxCpltCallback() |
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294 | (##) HAL_CEC_RxCpltCallback() |
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295 | (##) HAL_CEC_ErrorCallback() |
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296 | |||
297 | @endverbatim |
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298 | * @{ |
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299 | */ |
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300 | |||
301 | /** |
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302 | * @brief Send data in blocking mode |
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303 | * @param hcec: CEC handle |
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304 | * @param DestinationAddress: destination logical address |
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305 | * @param pData: pointer to input byte data buffer |
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306 | * @param Size: amount of data to be sent in bytes (without counting the header). |
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307 | * 0 means only the header is sent (ping operation). |
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308 | * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). |
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309 | * @param Timeout: Timeout duration. |
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310 | * @retval HAL status |
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311 | */ |
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312 | HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout) |
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313 | { |
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314 | uint8_t temp = 0; |
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315 | uint32_t tickstart = 0; |
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316 | |||
317 | /* If the IP is ready */ |
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318 | if((hcec->State == HAL_CEC_STATE_READY) |
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319 | && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET)) |
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320 | { |
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321 | /* Basic check on pData pointer */ |
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322 | if(((pData == NULL) && (Size > 0)) || (! IS_CEC_MSGSIZE(Size))) |
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323 | { |
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324 | return HAL_ERROR; |
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325 | } |
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326 | |||
327 | assert_param(IS_CEC_ADDRESS(DestinationAddress)); |
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328 | |||
329 | /* Process Locked */ |
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330 | __HAL_LOCK(hcec); |
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331 | |||
332 | /* Enter the transmit mode */ |
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333 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
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334 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
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335 | |||
336 | /* Initialize the number of bytes to send, |
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337 | * 0 means only one header is sent (ping operation) */ |
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338 | hcec->TxXferCount = Size; |
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339 | |||
340 | /* Send header block */ |
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341 | temp = (uint8_t)((uint32_t)(hcec->Init.InitiatorAddress) << CEC_INITIATOR_LSB_POS) | DestinationAddress; |
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342 | hcec->Instance->TXD = temp; |
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343 | |||
344 | /* In case no data to be sent, sender is only pinging the system */ |
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345 | if (Size != 0) |
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346 | { |
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347 | /* Set TX Start of Message (TXSOM) bit */ |
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348 | hcec->Instance->CSR = CEC_FLAG_TSOM; |
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349 | } |
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350 | else |
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351 | { |
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352 | /* Send a ping command */ |
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353 | hcec->Instance->CSR = CEC_FLAG_TEOM|CEC_FLAG_TSOM; |
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354 | } |
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355 | |||
356 | /* Polling TBTRF bit with timeout handling*/ |
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357 | while (hcec->TxXferCount > 0) |
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358 | { |
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359 | /* Decreasing of the number of remaining data to receive */ |
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360 | hcec->TxXferCount--; |
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361 | |||
362 | /* Timeout handling */ |
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363 | tickstart = HAL_GetTick(); |
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364 | |||
365 | /* Waiting for the next data transmission */ |
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366 | while(HAL_IS_BIT_CLR(hcec->Instance->CSR, CEC_FLAG_TBTRF)) |
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367 | { |
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368 | /* Timeout handling */ |
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369 | if(Timeout != HAL_MAX_DELAY) |
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370 | { |
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371 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
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372 | { |
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373 | hcec->State = HAL_CEC_STATE_READY; |
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374 | /* Process Unlocked */ |
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375 | __HAL_UNLOCK(hcec); |
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376 | return HAL_TIMEOUT; |
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377 | } |
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378 | } |
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379 | |||
380 | /* Check if an error occured */ |
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381 | if(HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_TERR) || HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_RERR)) |
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382 | { |
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383 | /* Copy ESR for error handling purposes */ |
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384 | hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR); |
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385 | |||
386 | /* Acknowledgement of the error */ |
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387 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR); |
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388 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR); |
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389 | |||
390 | hcec->State = HAL_CEC_STATE_READY; |
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391 | __HAL_UNLOCK(hcec); |
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392 | return HAL_ERROR; |
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393 | } |
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394 | } |
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395 | |||
396 | /* Write the next data to TX buffer */ |
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397 | hcec->Instance->TXD = *pData++; |
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398 | |||
399 | /* If this is the last byte of the ongoing transmission */ |
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400 | if (hcec->TxXferCount == 0) |
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401 | { |
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402 | /* Acknowledge byte request and signal end of message */ |
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403 | MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, CEC_FLAG_TEOM); |
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404 | } |
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405 | else |
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406 | { |
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407 | /* Acknowledge byte request by writing 0x00 */ |
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408 | MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, 0x00); |
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409 | } |
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410 | } |
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411 | |||
412 | /* Timeout handling */ |
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413 | tickstart = HAL_GetTick(); |
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414 | |||
415 | /* Wait for message transmission completion (TBTRF is set) */ |
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416 | while (HAL_IS_BIT_CLR(hcec->Instance->CSR, CEC_FLAG_TBTRF)) |
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417 | { |
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418 | /* Timeout handling */ |
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419 | if(Timeout != HAL_MAX_DELAY) |
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420 | { |
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421 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
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422 | { |
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423 | hcec->State = HAL_CEC_STATE_READY; |
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424 | __HAL_UNLOCK(hcec); |
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425 | return HAL_TIMEOUT; |
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426 | } |
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427 | } |
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428 | |||
429 | /* Check of error during transmission of the last byte */ |
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430 | if(HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_TERR) || HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_RERR)) |
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431 | { |
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432 | /* Copy ESR for error handling purposes */ |
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433 | hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR); |
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434 | |||
435 | /* Acknowledgement of the error */ |
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436 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR); |
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437 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR); |
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438 | |||
439 | hcec->State = HAL_CEC_STATE_READY; |
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440 | __HAL_UNLOCK(hcec); |
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441 | return HAL_ERROR; |
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442 | } |
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443 | } |
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444 | |||
445 | /* Check of error after the last byte transmission */ |
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446 | if(HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_TERR) || HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_RERR)) |
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447 | { |
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448 | /* Copy ESR for error handling purposes */ |
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449 | hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR); |
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450 | |||
451 | /* Acknowledgement of the error */ |
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452 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR); |
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453 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR); |
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454 | |||
455 | hcec->State = HAL_CEC_STATE_READY; |
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456 | __HAL_UNLOCK(hcec); |
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457 | return HAL_ERROR; |
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458 | } |
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459 | |||
460 | /* Acknowledge successful completion by writing 0x00 */ |
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461 | MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, 0x00); |
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462 | |||
463 | hcec->State = HAL_CEC_STATE_READY; |
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464 | __HAL_UNLOCK(hcec); |
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465 | |||
466 | return HAL_OK; |
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467 | } |
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468 | else |
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469 | { |
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470 | return HAL_BUSY; |
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471 | } |
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472 | } |
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473 | |||
474 | /** |
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475 | * @brief Receive data in blocking mode. |
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476 | * @param hcec: CEC handle |
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477 | * @param pData: pointer to received data buffer. |
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478 | * @param Timeout: Timeout duration. |
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479 | * @note The received data size is not known beforehand, the latter is known |
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480 | * when the reception is complete and is stored in hcec->RxXferSize. |
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481 | * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max). |
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482 | * If only a header is received, hcec->RxXferSize = 0 |
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483 | * @retval HAL status |
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484 | */ |
||
485 | HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout) |
||
486 | { |
||
487 | uint32_t temp = 0; |
||
488 | uint32_t tickstart = 0; |
||
489 | |||
490 | if(hcec->State == HAL_CEC_STATE_READY) |
||
491 | { |
||
492 | if(pData == NULL) |
||
493 | { |
||
494 | return HAL_ERROR; |
||
495 | } |
||
496 | |||
497 | /* When a ping is received, RxXferSize is 0*/ |
||
498 | /* When a message is received, RxXferSize contains the number of received bytes */ |
||
499 | hcec->RxXferSize = CEC_RXXFERSIZE_INITIALIZE; |
||
500 | |||
501 | /* Process Locked */ |
||
502 | __HAL_LOCK(hcec); |
||
503 | |||
504 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
||
505 | |||
506 | /* Continue the reception until the End Of Message is received (CEC_FLAG_REOM) */ |
||
507 | do |
||
508 | { |
||
509 | /* Timeout handling */ |
||
510 | tickstart = HAL_GetTick(); |
||
511 | |||
512 | /* Wait for next byte to be received */ |
||
513 | while (HAL_IS_BIT_CLR(hcec->Instance->CSR, CEC_FLAG_RBTF)) |
||
514 | { |
||
515 | /* Timeout handling */ |
||
516 | if(Timeout != HAL_MAX_DELAY) |
||
517 | { |
||
518 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
||
519 | { |
||
520 | hcec->State = HAL_CEC_STATE_READY; |
||
521 | __HAL_UNLOCK(hcec); |
||
522 | return HAL_TIMEOUT; |
||
523 | } |
||
524 | } |
||
525 | |||
526 | /* Check if an error occured during the reception */ |
||
527 | if(HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_RERR)) |
||
528 | { |
||
529 | /* Copy ESR for error handling purposes */ |
||
530 | hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR); |
||
531 | |||
532 | /* Acknowledgement of the error */ |
||
533 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR); |
||
534 | |||
535 | hcec->State = HAL_CEC_STATE_READY; |
||
536 | __HAL_UNLOCK(hcec); |
||
537 | return HAL_ERROR; |
||
538 | } |
||
539 | } |
||
540 | |||
541 | /* Keep the value of CSR register as the register is cleared during reception process */ |
||
542 | temp = hcec->Instance->CSR; |
||
543 | |||
544 | /* Read received data */ |
||
545 | *pData++ = hcec->Instance->RXD; |
||
546 | |||
547 | /* Acknowledge received byte by writing 0x00 */ |
||
548 | CLEAR_BIT(hcec->Instance->CSR, CEC_FLAG_RECEIVE_MASK); |
||
549 | |||
550 | /* Increment the number of received data */ |
||
551 | if(hcec->RxXferSize == CEC_RXXFERSIZE_INITIALIZE) |
||
552 | { |
||
553 | hcec->RxXferSize = 0; |
||
554 | } |
||
555 | else |
||
556 | { |
||
557 | hcec->RxXferSize++; |
||
558 | } |
||
559 | |||
560 | }while (HAL_IS_BIT_CLR(temp, CEC_FLAG_REOM)); |
||
561 | |||
562 | hcec->State = HAL_CEC_STATE_READY; |
||
563 | __HAL_UNLOCK(hcec); |
||
564 | |||
565 | if(IS_CEC_MSGSIZE(hcec->RxXferSize)) |
||
566 | { |
||
567 | return HAL_OK; |
||
568 | } |
||
569 | else |
||
570 | { |
||
571 | return HAL_ERROR; |
||
572 | } |
||
573 | } |
||
574 | else |
||
575 | { |
||
576 | return HAL_BUSY; |
||
577 | } |
||
578 | } |
||
579 | |||
580 | |||
581 | /** |
||
582 | * @brief Send data in interrupt mode |
||
583 | * @param hcec: CEC handle |
||
584 | * @param DestinationAddress: destination logical address |
||
585 | * @param pData: pointer to input byte data buffer |
||
586 | * @param Size: amount of data to be sent in bytes (without counting the header). |
||
587 | * 0 means only the header is sent (ping operation). |
||
588 | * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). |
||
589 | * @retval HAL status |
||
590 | */ |
||
591 | HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size) |
||
592 | { |
||
593 | uint8_t temp = 0; |
||
594 | uint32_t tmp_state = 0; |
||
595 | |||
596 | tmp_state = hcec->State; |
||
597 | if(((tmp_state == HAL_CEC_STATE_READY) || (tmp_state == HAL_CEC_STATE_BUSY_RX)) |
||
598 | && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET)) |
||
599 | { |
||
600 | |||
601 | /* Basic check on pData pointer */ |
||
602 | if(((pData == NULL) && (Size > 0)) || (! IS_CEC_MSGSIZE(Size))) |
||
603 | { |
||
604 | return HAL_ERROR; |
||
605 | } |
||
606 | |||
607 | assert_param(IS_CEC_ADDRESS(DestinationAddress)); |
||
608 | |||
609 | /* Process Locked */ |
||
610 | __HAL_LOCK(hcec); |
||
611 | hcec->pTxBuffPtr = pData; |
||
612 | |||
613 | /* Check if a receive process is ongoing or not */ |
||
614 | if(hcec->State == HAL_CEC_STATE_BUSY_RX) |
||
615 | { |
||
616 | hcec->State = HAL_CEC_STATE_BUSY_TX_RX; |
||
617 | |||
618 | /* Interrupt are not enabled here because they are already enabled in the Reception process */ |
||
619 | } |
||
620 | else |
||
621 | { |
||
622 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
||
623 | |||
624 | /* Enable the CEC interrupt */ |
||
625 | __HAL_CEC_ENABLE_IT(hcec, CEC_IT_IE); |
||
626 | } |
||
627 | |||
628 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
||
629 | |||
630 | /* initialize the number of bytes to send, |
||
631 | * 0 means only one header is sent (ping operation) */ |
||
632 | hcec->TxXferCount = Size; |
||
633 | |||
634 | /* send header block */ |
||
635 | temp = (uint8_t)((uint32_t)(hcec->Init.InitiatorAddress) << CEC_INITIATOR_LSB_POS) | DestinationAddress; |
||
636 | hcec->Instance->TXD = temp; |
||
637 | |||
638 | /* Process Unlocked */ |
||
639 | __HAL_UNLOCK(hcec); |
||
640 | |||
641 | /* case no data to be sent, sender is only pinging the system */ |
||
642 | if (Size != 0) |
||
643 | { |
||
644 | /* Set TX Start of Message (TXSOM) bit */ |
||
645 | MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, CEC_FLAG_TSOM); |
||
646 | } |
||
647 | else |
||
648 | { |
||
649 | /* Send a ping command */ |
||
650 | MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, CEC_FLAG_TEOM|CEC_FLAG_TSOM); |
||
651 | } |
||
652 | return HAL_OK; |
||
653 | } |
||
654 | else |
||
655 | { |
||
656 | return HAL_BUSY; |
||
657 | } |
||
658 | } |
||
659 | |||
660 | |||
661 | /** |
||
662 | * @brief Receive data in interrupt mode. |
||
663 | * @param hcec: CEC handle |
||
664 | * @param pData: pointer to received data buffer. |
||
665 | * @note The received data size is not known beforehand, the latter is known |
||
666 | * when the reception is complete and is stored in hcec->RxXferSize. |
||
667 | * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max). |
||
668 | * If only a header is received, hcec->RxXferSize = 0 |
||
669 | * @retval HAL status |
||
670 | */ |
||
671 | HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData) |
||
672 | { |
||
673 | uint32_t tmp_state = 0; |
||
674 | tmp_state = hcec->State; |
||
675 | if((tmp_state == HAL_CEC_STATE_READY) || (tmp_state == HAL_CEC_STATE_BUSY_TX)) |
||
676 | { |
||
677 | if(pData == NULL) |
||
678 | { |
||
679 | return HAL_ERROR; |
||
680 | } |
||
681 | |||
682 | /* When a ping is received, RxXferSize is 0 */ |
||
683 | /* When a message is received, RxXferSize contains the number of received bytes */ |
||
684 | hcec->RxXferSize = CEC_RXXFERSIZE_INITIALIZE; |
||
685 | |||
686 | /* Process Locked */ |
||
687 | __HAL_LOCK(hcec); |
||
688 | |||
689 | hcec->pRxBuffPtr = pData; |
||
690 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
||
691 | |||
692 | /* Process Unlocked */ |
||
693 | __HAL_UNLOCK(hcec); |
||
694 | |||
695 | /* Check if a transmit process is ongoing or not */ |
||
696 | if(hcec->State == HAL_CEC_STATE_BUSY_TX) |
||
697 | { |
||
698 | hcec->State = HAL_CEC_STATE_BUSY_TX_RX; |
||
699 | } |
||
700 | else |
||
701 | { |
||
702 | hcec->State = HAL_CEC_STATE_BUSY_RX; |
||
703 | |||
704 | /* Enable CEC interrupt */ |
||
705 | __HAL_CEC_ENABLE_IT(hcec, CEC_IT_IE); |
||
706 | } |
||
707 | |||
708 | return HAL_OK; |
||
709 | } |
||
710 | else |
||
711 | { |
||
712 | return HAL_BUSY; |
||
713 | } |
||
714 | } |
||
715 | |||
716 | /** |
||
717 | * @brief Get size of the received frame. |
||
718 | * @param hcec: CEC handle |
||
719 | * @retval Frame size |
||
720 | */ |
||
721 | uint32_t HAL_CEC_GetReceivedFrameSize(CEC_HandleTypeDef *hcec) |
||
722 | { |
||
723 | return hcec->RxXferSize; |
||
724 | } |
||
725 | |||
726 | /** |
||
727 | * @brief This function handles CEC interrupt requests. |
||
728 | * @param hcec: CEC handle |
||
729 | * @retval None |
||
730 | */ |
||
731 | void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) |
||
732 | { |
||
733 | /* Save error status register for further error handling purposes */ |
||
734 | hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR); |
||
735 | |||
736 | /* Transmit error */ |
||
737 | if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TERR) != RESET)) |
||
738 | { |
||
739 | /* Acknowledgement of the error */ |
||
740 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR); |
||
741 | |||
742 | /* Check if a receive process is ongoing or not */ |
||
743 | if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX) |
||
744 | { |
||
745 | /* Interrupts are not disabled due to reception still ongoing */ |
||
746 | |||
747 | hcec->State = HAL_CEC_STATE_BUSY_RX; |
||
748 | } |
||
749 | else |
||
750 | { |
||
751 | /* Disable the CEC Transmission Interrupts */ |
||
752 | __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE); |
||
753 | |||
754 | hcec->State = HAL_CEC_STATE_READY; |
||
755 | } |
||
756 | } |
||
757 | |||
758 | /* Receive error */ |
||
759 | if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RERR) != RESET)) |
||
760 | { |
||
761 | /* Acknowledgement of the error */ |
||
762 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR); |
||
763 | |||
764 | /* Check if a transmit process is ongoing or not */ |
||
765 | if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX) |
||
766 | { |
||
767 | /* Interrupts are not disabled due to reception still ongoing */ |
||
768 | |||
769 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
||
770 | } |
||
771 | else |
||
772 | { |
||
773 | /* Disable the CEC Transmission Interrupts */ |
||
774 | __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE); |
||
775 | |||
776 | hcec->State = HAL_CEC_STATE_READY; |
||
777 | } |
||
778 | } |
||
779 | |||
780 | if ((hcec->ErrorCode & CEC_ESR_ALL_ERROR) != 0) |
||
781 | { |
||
782 | HAL_CEC_ErrorCallback(hcec); |
||
783 | } |
||
784 | |||
785 | /* Transmit byte request or block transfer finished */ |
||
786 | if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TBTRF) != RESET)) |
||
787 | { |
||
788 | CEC_Transmit_IT(hcec); |
||
789 | } |
||
790 | |||
791 | /* Receive byte or block transfer finished */ |
||
792 | if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RBTF) != RESET)) |
||
793 | { |
||
794 | CEC_Receive_IT(hcec); |
||
795 | } |
||
796 | } |
||
797 | |||
798 | |||
799 | /** |
||
800 | * @brief Tx Transfer completed callback |
||
801 | * @param hcec: CEC handle |
||
802 | * @retval None |
||
803 | */ |
||
804 | __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec) |
||
805 | { |
||
5 | mjames | 806 | /* Prevent unused argument(s) compilation warning */ |
807 | UNUSED(hcec); |
||
2 | mjames | 808 | /* NOTE : This function should not be modified, when the callback is needed, |
809 | the HAL_CEC_TxCpltCallback can be implemented in the user file |
||
810 | */ |
||
811 | } |
||
812 | |||
813 | /** |
||
814 | * @brief Rx Transfer completed callback |
||
815 | * @param hcec: CEC handle |
||
816 | * @retval None |
||
817 | */ |
||
818 | __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec) |
||
819 | { |
||
5 | mjames | 820 | /* Prevent unused argument(s) compilation warning */ |
821 | UNUSED(hcec); |
||
2 | mjames | 822 | /* NOTE : This function should not be modified, when the callback is needed, |
823 | the HAL_CEC_RxCpltCallback can be implemented in the user file |
||
824 | */ |
||
825 | } |
||
826 | |||
827 | /** |
||
828 | * @brief CEC error callbacks |
||
829 | * @param hcec: CEC handle |
||
830 | * @retval None |
||
831 | */ |
||
832 | __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec) |
||
833 | { |
||
5 | mjames | 834 | /* Prevent unused argument(s) compilation warning */ |
835 | UNUSED(hcec); |
||
2 | mjames | 836 | /* NOTE : This function should not be modified, when the callback is needed, |
837 | the HAL_CEC_ErrorCallback can be implemented in the user file |
||
838 | */ |
||
839 | } |
||
840 | |||
841 | /** |
||
842 | * @} |
||
843 | */ |
||
844 | |||
845 | /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control functions |
||
846 | * @brief CEC control functions |
||
847 | * |
||
848 | @verbatim |
||
849 | =============================================================================== |
||
850 | ##### Peripheral Control functions ##### |
||
851 | =============================================================================== |
||
852 | [..] |
||
853 | This subsection provides a set of functions allowing to control the CEC. |
||
854 | (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral. |
||
855 | (+) HAL_CEC_GetError() API can be helpful to get the error code of a failed transmission or reception. |
||
856 | @endverbatim |
||
857 | * @{ |
||
858 | */ |
||
859 | |||
860 | /** |
||
861 | * @brief return the CEC state |
||
862 | * @param hcec: CEC handle |
||
863 | * @retval HAL state |
||
864 | */ |
||
865 | HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec) |
||
866 | { |
||
867 | return hcec->State; |
||
868 | } |
||
869 | |||
870 | /** |
||
871 | * @brief Return the CEC error code |
||
872 | * @param hcec : pointer to a CEC_HandleTypeDef structure that contains |
||
873 | * the configuration information for the specified CEC. |
||
874 | * @retval CEC Error Code |
||
875 | */ |
||
876 | uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec) |
||
877 | { |
||
878 | return hcec->ErrorCode; |
||
879 | } |
||
880 | |||
881 | /** |
||
882 | * @} |
||
883 | */ |
||
884 | |||
885 | /** |
||
886 | * @} |
||
887 | */ |
||
888 | |||
889 | /** @addtogroup CEC_Private_Functions |
||
890 | * @{ |
||
891 | */ |
||
892 | |||
893 | /** |
||
894 | * @brief Send data in interrupt mode |
||
895 | * @param hcec: CEC handle. |
||
896 | * Function called under interruption only, once |
||
897 | * interruptions have been enabled by HAL_CEC_Transmit_IT() |
||
898 | * @retval HAL status |
||
899 | */ |
||
900 | static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec) |
||
901 | { |
||
902 | uint32_t tmp_state = 0; |
||
903 | |||
904 | tmp_state = hcec->State; |
||
905 | /* if the IP is already busy or if there is a previous transmission |
||
906 | already pending due to arbitration loss */ |
||
907 | if(((tmp_state == HAL_CEC_STATE_BUSY_TX) || (tmp_state == HAL_CEC_STATE_BUSY_TX_RX)) |
||
908 | || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET)) |
||
909 | { |
||
910 | /* if all data have been sent */ |
||
911 | if(hcec->TxXferCount == 0) |
||
912 | { |
||
913 | /* Acknowledge successful completion by writing 0x00 */ |
||
914 | MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, 0x00); |
||
915 | |||
916 | /* Check if a receive process is ongoing or not */ |
||
917 | if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX) |
||
918 | { |
||
919 | /* Interrupts are not disabled due to reception still ongoing */ |
||
920 | |||
921 | hcec->State = HAL_CEC_STATE_BUSY_RX; |
||
922 | } |
||
923 | else |
||
924 | { |
||
925 | /* Disable the CEC Transmission Interrupts */ |
||
926 | __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE); |
||
927 | |||
928 | hcec->State = HAL_CEC_STATE_READY; |
||
929 | } |
||
930 | |||
931 | HAL_CEC_TxCpltCallback(hcec); |
||
932 | |||
933 | return HAL_OK; |
||
934 | } |
||
935 | else |
||
936 | { |
||
937 | /* Reduce the number of bytes to transfer by one */ |
||
938 | hcec->TxXferCount--; |
||
939 | |||
940 | /* Write data to TX buffer*/ |
||
941 | hcec->Instance->TXD = *hcec->pTxBuffPtr++; |
||
942 | |||
943 | /* If this is the last byte of the ongoing transmission */ |
||
944 | if (hcec->TxXferCount == 0) |
||
945 | { |
||
946 | /* Acknowledge byte request and signal end of message */ |
||
947 | MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, CEC_FLAG_TEOM); |
||
948 | } |
||
949 | else |
||
950 | { |
||
951 | /* Acknowledge byte request by writing 0x00 */ |
||
952 | MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, 0x00); |
||
953 | } |
||
954 | |||
955 | return HAL_OK; |
||
956 | } |
||
957 | } |
||
958 | else |
||
959 | { |
||
960 | return HAL_BUSY; |
||
961 | } |
||
962 | } |
||
963 | |||
964 | /** |
||
965 | * @brief Receive data in interrupt mode. |
||
966 | * @param hcec: CEC handle. |
||
967 | * Function called under interruption only, once |
||
968 | * interruptions have been enabled by HAL_CEC_Receive_IT() |
||
969 | * @retval HAL status |
||
970 | */ |
||
971 | static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec) |
||
972 | { |
||
973 | static uint32_t temp; |
||
974 | uint32_t tmp_state = 0; |
||
975 | |||
976 | tmp_state = hcec->State; |
||
977 | if((tmp_state == HAL_CEC_STATE_BUSY_RX) || (tmp_state == HAL_CEC_STATE_BUSY_TX_RX)) |
||
978 | { |
||
979 | temp = hcec->Instance->CSR; |
||
980 | |||
981 | /* Store received data */ |
||
982 | *hcec->pRxBuffPtr++ = hcec->Instance->RXD; |
||
983 | |||
984 | /* Acknowledge received byte by writing 0x00 */ |
||
985 | MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_RECEIVE_MASK, 0x00); |
||
986 | |||
987 | /* Increment the number of received data */ |
||
988 | if(hcec->RxXferSize == CEC_RXXFERSIZE_INITIALIZE) |
||
989 | { |
||
990 | hcec->RxXferSize = 0; |
||
991 | } |
||
992 | else |
||
993 | { |
||
994 | hcec->RxXferSize++; |
||
995 | } |
||
996 | |||
997 | /* If the End Of Message is reached */ |
||
998 | if(HAL_IS_BIT_SET(temp, CEC_FLAG_REOM)) |
||
999 | { |
||
1000 | if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX) |
||
1001 | { |
||
1002 | /* Interrupts are not disabled due to transmission still ongoing */ |
||
1003 | |||
1004 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
||
1005 | } |
||
1006 | else |
||
1007 | { |
||
1008 | /* Disable the CEC Transmission Interrupts */ |
||
1009 | __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE); |
||
1010 | |||
1011 | hcec->State = HAL_CEC_STATE_READY; |
||
1012 | } |
||
1013 | |||
1014 | HAL_CEC_RxCpltCallback(hcec); |
||
1015 | |||
1016 | return HAL_OK; |
||
1017 | } |
||
1018 | else |
||
1019 | { |
||
1020 | return HAL_BUSY; |
||
1021 | } |
||
1022 | } |
||
1023 | else |
||
1024 | { |
||
1025 | return HAL_BUSY; |
||
1026 | } |
||
1027 | } |
||
1028 | |||
1029 | /** |
||
1030 | * @} |
||
1031 | */ |
||
1032 | |||
1033 | /** |
||
1034 | * @} |
||
1035 | */ |
||
1036 | |||
1037 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) */ |
||
1038 | |||
1039 | #endif /* HAL_CEC_MODULE_ENABLED */ |
||
1040 | /** |
||
1041 | * @} |
||
1042 | */ |
||
1043 | |||
1044 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |