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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_can.c |
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4 | * @author MCD Application Team |
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5 | * @brief CAN HAL module driver. |
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6 | * This file provides firmware functions to manage the following |
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7 | * functionalities of the Controller Area Network (CAN) peripheral: |
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8 | * + Initialization and de-initialization functions |
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9 | * + Configuration functions |
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10 | * + Control functions |
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11 | * + Interrupts management |
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12 | * + Callbacks functions |
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13 | * + Peripheral State and Error functions |
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14 | * |
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15 | @verbatim |
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16 | ============================================================================== |
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17 | ##### How to use this driver ##### |
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18 | ============================================================================== |
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19 | [..] |
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20 | (#) Initialize the CAN low level resources by implementing the |
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21 | HAL_CAN_MspInit(): |
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22 | (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE() |
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23 | (++) Configure CAN pins |
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24 | (+++) Enable the clock for the CAN GPIOs |
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25 | (+++) Configure CAN pins as alternate function open-drain |
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26 | (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification()) |
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27 | (+++) Configure the CAN interrupt priority using |
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28 | HAL_NVIC_SetPriority() |
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29 | (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ() |
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30 | (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler() |
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31 | |||
32 | (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This |
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33 | function resorts to HAL_CAN_MspInit() for low-level initialization. |
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34 | |||
35 | (#) Configure the reception filters using the following configuration |
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36 | functions: |
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37 | (++) HAL_CAN_ConfigFilter() |
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38 | |||
39 | (#) Start the CAN module using HAL_CAN_Start() function. At this level |
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40 | the node is active on the bus: it receive messages, and can send |
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41 | messages. |
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42 | |||
43 | (#) To manage messages transmission, the following Tx control functions |
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44 | can be used: |
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45 | (++) HAL_CAN_AddTxMessage() to request transmission of a new |
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46 | message. |
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47 | (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending |
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48 | message. |
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49 | (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx |
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50 | mailboxes. |
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51 | (++) HAL_CAN_IsTxMessagePending() to check if a message is pending |
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52 | in a Tx mailbox. |
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53 | (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message |
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54 | sent, if time triggered communication mode is enabled. |
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55 | |||
56 | (#) When a message is received into the CAN Rx FIFOs, it can be retrieved |
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57 | using the HAL_CAN_GetRxMessage() function. The function |
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58 | HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are |
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59 | stored in the Rx Fifo. |
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60 | |||
61 | (#) Calling the HAL_CAN_Stop() function stops the CAN module. |
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62 | |||
63 | (#) The deinitialization is achieved with HAL_CAN_DeInit() function. |
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64 | |||
65 | |||
66 | *** Polling mode operation *** |
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67 | ============================== |
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68 | [..] |
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69 | (#) Reception: |
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70 | (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel() |
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71 | until at least one message is received. |
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72 | (++) Then get the message using HAL_CAN_GetRxMessage(). |
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73 | |||
74 | (#) Transmission: |
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75 | (++) Monitor the Tx mailboxes availability until at least one Tx |
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76 | mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel(). |
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77 | (++) Then request transmission of a message using |
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78 | HAL_CAN_AddTxMessage(). |
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79 | |||
80 | |||
81 | *** Interrupt mode operation *** |
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82 | ================================ |
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83 | [..] |
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84 | (#) Notifications are activated using HAL_CAN_ActivateNotification() |
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85 | function. Then, the process can be controlled through the |
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86 | available user callbacks: HAL_CAN_xxxCallback(), using same APIs |
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87 | HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage(). |
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88 | |||
89 | (#) Notifications can be deactivated using |
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90 | HAL_CAN_DeactivateNotification() function. |
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91 | |||
92 | (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and |
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93 | CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig |
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94 | the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and |
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95 | HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options |
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96 | here. |
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97 | (++) Directly get the Rx message in the callback, using |
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98 | HAL_CAN_GetRxMessage(). |
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99 | (++) Or deactivate the notification in the callback without |
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100 | getting the Rx message. The Rx message can then be got later |
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101 | using HAL_CAN_GetRxMessage(). Once the Rx message have been |
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102 | read, the notification can be activated again. |
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103 | |||
104 | |||
105 | *** Sleep mode *** |
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106 | ================== |
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107 | [..] |
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108 | (#) The CAN peripheral can be put in sleep mode (low power), using |
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109 | HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the |
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110 | current CAN activity (transmission or reception of a CAN frame) will |
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111 | be completed. |
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112 | |||
113 | (#) A notification can be activated to be informed when the sleep mode |
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114 | will be entered. |
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115 | |||
116 | (#) It can be checked if the sleep mode is entered using |
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117 | HAL_CAN_IsSleepActive(). |
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118 | Note that the CAN state (accessible from the API HAL_CAN_GetState()) |
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119 | is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is |
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120 | submitted (the sleep mode is not yet entered), and become |
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121 | HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective. |
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122 | |||
123 | (#) The wake-up from sleep mode can be trigged by two ways: |
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124 | (++) Using HAL_CAN_WakeUp(). When returning from this function, |
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125 | the sleep mode is exited (if return status is HAL_OK). |
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126 | (++) When a start of Rx CAN frame is detected by the CAN peripheral, |
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127 | if automatic wake up mode is enabled. |
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128 | |||
129 | @endverbatim |
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130 | ****************************************************************************** |
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131 | * @attention |
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132 | * |
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133 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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134 | * |
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135 | * Redistribution and use in source and binary forms, with or without modification, |
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136 | * are permitted provided that the following conditions are met: |
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137 | * 1. Redistributions of source code must retain the above copyright notice, |
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138 | * this list of conditions and the following disclaimer. |
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139 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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140 | * this list of conditions and the following disclaimer in the documentation |
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141 | * and/or other materials provided with the distribution. |
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142 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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143 | * may be used to endorse or promote products derived from this software |
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144 | * without specific prior written permission. |
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145 | * |
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146 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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147 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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148 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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149 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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150 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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151 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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152 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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153 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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154 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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155 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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156 | * |
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157 | ****************************************************************************** |
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158 | */ |
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159 | |||
160 | /* Includes ------------------------------------------------------------------*/ |
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161 | #include "stm32f1xx_hal.h" |
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162 | |||
163 | /** @addtogroup STM32F1xx_HAL_Driver |
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164 | * @{ |
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165 | */ |
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166 | |||
167 | #if defined(CAN1) |
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168 | |||
169 | /** @defgroup CAN CAN |
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170 | * @brief CAN driver modules |
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171 | * @{ |
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172 | */ |
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173 | |||
174 | #ifdef HAL_CAN_MODULE_ENABLED |
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175 | |||
176 | #ifdef HAL_CAN_LEGACY_MODULE_ENABLED |
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177 | #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once" |
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178 | #endif |
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179 | |||
180 | /* Private typedef -----------------------------------------------------------*/ |
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181 | /* Private define ------------------------------------------------------------*/ |
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182 | /** @defgroup CAN_Private_Constants CAN Private Constants |
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183 | * @{ |
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184 | */ |
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185 | #define CAN_TIMEOUT_VALUE 10U |
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186 | /** |
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187 | * @} |
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188 | */ |
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189 | /* Private macro -------------------------------------------------------------*/ |
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190 | /* Private variables ---------------------------------------------------------*/ |
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191 | /* Private function prototypes -----------------------------------------------*/ |
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192 | /* Exported functions --------------------------------------------------------*/ |
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193 | |||
194 | /** @defgroup CAN_Exported_Functions CAN Exported Functions |
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195 | * @{ |
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196 | */ |
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197 | |||
198 | /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions |
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199 | * @brief Initialization and Configuration functions |
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200 | * |
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201 | @verbatim |
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202 | ============================================================================== |
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203 | ##### Initialization and de-initialization functions ##### |
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204 | ============================================================================== |
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205 | [..] This section provides functions allowing to: |
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206 | (+) HAL_CAN_Init : Initialize and configure the CAN. |
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207 | (+) HAL_CAN_DeInit : De-initialize the CAN. |
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208 | (+) HAL_CAN_MspInit : Initialize the CAN MSP. |
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209 | (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP. |
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210 | |||
211 | @endverbatim |
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212 | * @{ |
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213 | */ |
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214 | |||
215 | /** |
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216 | * @brief Initializes the CAN peripheral according to the specified |
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217 | * parameters in the CAN_InitStruct. |
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218 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
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219 | * the configuration information for the specified CAN. |
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220 | * @retval HAL status |
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221 | */ |
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222 | HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) |
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223 | { |
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224 | uint32_t tickstart; |
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225 | |||
226 | /* Check CAN handle */ |
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227 | if (hcan == NULL) |
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228 | { |
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229 | return HAL_ERROR; |
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230 | } |
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231 | |||
232 | /* Check the parameters */ |
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233 | assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); |
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234 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); |
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235 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); |
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236 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); |
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237 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); |
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238 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); |
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239 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); |
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240 | assert_param(IS_CAN_MODE(hcan->Init.Mode)); |
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241 | assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); |
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242 | assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); |
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243 | assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); |
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244 | assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); |
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245 | |||
246 | if (hcan->State == HAL_CAN_STATE_RESET) |
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247 | { |
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248 | /* Init the low level hardware: CLOCK, NVIC */ |
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249 | HAL_CAN_MspInit(hcan); |
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250 | } |
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251 | |||
252 | /* Exit from sleep mode */ |
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253 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
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254 | |||
255 | /* Get tick */ |
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256 | tickstart = HAL_GetTick(); |
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257 | |||
258 | /* Check Sleep mode leave acknowledge */ |
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259 | while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) |
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260 | { |
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261 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
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262 | { |
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263 | /* Update error code */ |
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264 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
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265 | |||
266 | /* Change CAN state */ |
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267 | hcan->State = HAL_CAN_STATE_ERROR; |
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268 | |||
269 | return HAL_ERROR; |
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270 | } |
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271 | } |
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272 | |||
273 | /* Request initialisation */ |
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274 | SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); |
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275 | |||
276 | /* Get tick */ |
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277 | tickstart = HAL_GetTick(); |
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278 | |||
279 | /* Wait initialisation acknowledge */ |
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280 | while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) |
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281 | { |
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282 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
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283 | { |
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284 | /* Update error code */ |
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285 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
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286 | |||
287 | /* Change CAN state */ |
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288 | hcan->State = HAL_CAN_STATE_ERROR; |
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289 | |||
290 | return HAL_ERROR; |
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291 | } |
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292 | } |
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293 | |||
294 | /* Set the time triggered communication mode */ |
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295 | if (hcan->Init.TimeTriggeredMode == ENABLE) |
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296 | { |
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297 | SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); |
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298 | } |
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299 | else |
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300 | { |
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301 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); |
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302 | } |
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303 | |||
304 | /* Set the automatic bus-off management */ |
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305 | if (hcan->Init.AutoBusOff == ENABLE) |
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306 | { |
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307 | SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); |
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308 | } |
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309 | else |
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310 | { |
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311 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); |
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312 | } |
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313 | |||
314 | /* Set the automatic wake-up mode */ |
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315 | if (hcan->Init.AutoWakeUp == ENABLE) |
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316 | { |
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317 | SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); |
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318 | } |
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319 | else |
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320 | { |
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321 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); |
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322 | } |
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323 | |||
324 | /* Set the automatic retransmission */ |
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325 | if (hcan->Init.AutoRetransmission == ENABLE) |
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326 | { |
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327 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); |
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328 | } |
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329 | else |
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330 | { |
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331 | SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); |
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332 | } |
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333 | |||
334 | /* Set the receive FIFO locked mode */ |
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335 | if (hcan->Init.ReceiveFifoLocked == ENABLE) |
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336 | { |
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337 | SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); |
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338 | } |
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339 | else |
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340 | { |
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341 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); |
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342 | } |
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343 | |||
344 | /* Set the transmit FIFO priority */ |
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345 | if (hcan->Init.TransmitFifoPriority == ENABLE) |
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346 | { |
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347 | SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); |
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348 | } |
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349 | else |
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350 | { |
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351 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); |
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352 | } |
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353 | |||
354 | /* Set the bit timing register */ |
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355 | WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | |
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356 | hcan->Init.SyncJumpWidth | |
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357 | hcan->Init.TimeSeg1 | |
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358 | hcan->Init.TimeSeg2 | |
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359 | (hcan->Init.Prescaler - 1U))); |
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360 | |||
361 | /* Initialize the error code */ |
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362 | hcan->ErrorCode = HAL_CAN_ERROR_NONE; |
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363 | |||
364 | /* Initialize the CAN state */ |
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365 | hcan->State = HAL_CAN_STATE_READY; |
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366 | |||
367 | /* Return function status */ |
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368 | return HAL_OK; |
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369 | } |
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370 | |||
371 | /** |
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372 | * @brief Deinitializes the CAN peripheral registers to their default |
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373 | * reset values. |
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374 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
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375 | * the configuration information for the specified CAN. |
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376 | * @retval HAL status |
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377 | */ |
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378 | HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan) |
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379 | { |
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380 | /* Check CAN handle */ |
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381 | if (hcan == NULL) |
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382 | { |
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383 | return HAL_ERROR; |
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384 | } |
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385 | |||
386 | /* Check the parameters */ |
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387 | assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); |
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388 | |||
389 | /* Stop the CAN module */ |
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390 | (void)HAL_CAN_Stop(hcan); |
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391 | |||
392 | /* DeInit the low level hardware: CLOCK, NVIC */ |
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393 | HAL_CAN_MspDeInit(hcan); |
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394 | |||
395 | /* Reset the CAN peripheral */ |
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396 | SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET); |
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397 | |||
398 | /* Reset the CAN ErrorCode */ |
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399 | hcan->ErrorCode = HAL_CAN_ERROR_NONE; |
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400 | |||
401 | /* Change CAN state */ |
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402 | hcan->State = HAL_CAN_STATE_RESET; |
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403 | |||
404 | /* Return function status */ |
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405 | return HAL_OK; |
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406 | } |
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407 | |||
408 | /** |
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409 | * @brief Initializes the CAN MSP. |
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410 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
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411 | * the configuration information for the specified CAN. |
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412 | * @retval None |
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413 | */ |
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414 | __weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan) |
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415 | { |
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416 | /* Prevent unused argument(s) compilation warning */ |
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417 | UNUSED(hcan); |
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418 | |||
419 | /* NOTE : This function Should not be modified, when the callback is needed, |
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420 | the HAL_CAN_MspInit could be implemented in the user file |
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421 | */ |
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422 | } |
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423 | |||
424 | /** |
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425 | * @brief DeInitializes the CAN MSP. |
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426 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
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427 | * the configuration information for the specified CAN. |
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428 | * @retval None |
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429 | */ |
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430 | __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan) |
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431 | { |
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432 | /* Prevent unused argument(s) compilation warning */ |
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433 | UNUSED(hcan); |
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434 | |||
435 | /* NOTE : This function Should not be modified, when the callback is needed, |
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436 | the HAL_CAN_MspDeInit could be implemented in the user file |
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437 | */ |
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438 | } |
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439 | |||
440 | |||
441 | /** |
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442 | * @} |
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443 | */ |
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444 | |||
445 | /** @defgroup CAN_Exported_Functions_Group2 Configuration functions |
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446 | * @brief Configuration functions. |
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447 | * |
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448 | @verbatim |
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449 | ============================================================================== |
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450 | ##### Configuration functions ##### |
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451 | ============================================================================== |
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452 | [..] This section provides functions allowing to: |
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453 | (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters |
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454 | |||
455 | @endverbatim |
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456 | * @{ |
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457 | */ |
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458 | |||
459 | /** |
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460 | * @brief Configures the CAN reception filter according to the specified |
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461 | * parameters in the CAN_FilterInitStruct. |
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462 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
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463 | * the configuration information for the specified CAN. |
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464 | * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that |
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465 | * contains the filter configuration information. |
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466 | * @retval None |
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467 | */ |
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468 | HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig) |
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469 | { |
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470 | uint32_t filternbrbitpos; |
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471 | CAN_TypeDef *can_ip = hcan->Instance; |
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472 | HAL_CAN_StateTypeDef state = hcan->State; |
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473 | |||
474 | if ((state == HAL_CAN_STATE_READY) || |
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475 | (state == HAL_CAN_STATE_LISTENING)) |
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476 | { |
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477 | /* Check the parameters */ |
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478 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh)); |
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479 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); |
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480 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); |
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481 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); |
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482 | assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); |
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483 | assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); |
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484 | assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); |
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485 | assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); |
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486 | |||
487 | #if defined(CAN2) |
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488 | /* CAN1 and CAN2 are dual instances with 28 common filters banks */ |
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489 | /* Select master instance to access the filter banks */ |
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490 | can_ip = CAN1; |
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491 | |||
492 | /* Check the parameters */ |
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493 | assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->FilterBank)); |
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494 | assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->SlaveStartFilterBank)); |
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495 | #else |
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496 | /* CAN1 is single instance with 14 dedicated filters banks */ |
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497 | |||
498 | /* Check the parameters */ |
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499 | assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); |
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500 | #endif |
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501 | |||
502 | /* Initialisation mode for the filter */ |
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503 | SET_BIT(can_ip->FMR, CAN_FMR_FINIT); |
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504 | |||
505 | #if defined(CAN2) |
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506 | /* Select the start filter number of CAN2 slave instance */ |
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507 | CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); |
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508 | SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); |
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509 | |||
510 | #endif |
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511 | /* Convert filter number into bit position */ |
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512 | filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); |
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513 | |||
514 | /* Filter Deactivation */ |
||
515 | CLEAR_BIT(can_ip->FA1R, filternbrbitpos); |
||
516 | |||
517 | /* Filter Scale */ |
||
518 | if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) |
||
519 | { |
||
520 | /* 16-bit scale for the filter */ |
||
521 | CLEAR_BIT(can_ip->FS1R, filternbrbitpos); |
||
522 | |||
523 | /* First 16-bit identifier and First 16-bit mask */ |
||
524 | /* Or First 16-bit identifier and Second 16-bit identifier */ |
||
525 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = |
||
526 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | |
||
527 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); |
||
528 | |||
529 | /* Second 16-bit identifier and Second 16-bit mask */ |
||
530 | /* Or Third 16-bit identifier and Fourth 16-bit identifier */ |
||
531 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = |
||
532 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | |
||
533 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); |
||
534 | } |
||
535 | |||
536 | if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) |
||
537 | { |
||
538 | /* 32-bit scale for the filter */ |
||
539 | SET_BIT(can_ip->FS1R, filternbrbitpos); |
||
540 | |||
541 | /* 32-bit identifier or First 32-bit identifier */ |
||
542 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = |
||
543 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | |
||
544 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); |
||
545 | |||
546 | /* 32-bit mask or Second 32-bit identifier */ |
||
547 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = |
||
548 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | |
||
549 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); |
||
550 | } |
||
551 | |||
552 | /* Filter Mode */ |
||
553 | if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) |
||
554 | { |
||
555 | /* Id/Mask mode for the filter*/ |
||
556 | CLEAR_BIT(can_ip->FM1R, filternbrbitpos); |
||
557 | } |
||
558 | else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ |
||
559 | { |
||
560 | /* Identifier list mode for the filter*/ |
||
561 | SET_BIT(can_ip->FM1R, filternbrbitpos); |
||
562 | } |
||
563 | |||
564 | /* Filter FIFO assignment */ |
||
565 | if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) |
||
566 | { |
||
567 | /* FIFO 0 assignation for the filter */ |
||
568 | CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); |
||
569 | } |
||
570 | else |
||
571 | { |
||
572 | /* FIFO 1 assignation for the filter */ |
||
573 | SET_BIT(can_ip->FFA1R, filternbrbitpos); |
||
574 | } |
||
575 | |||
576 | /* Filter activation */ |
||
577 | if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) |
||
578 | { |
||
579 | SET_BIT(can_ip->FA1R, filternbrbitpos); |
||
580 | } |
||
581 | |||
582 | /* Leave the initialisation mode for the filter */ |
||
583 | CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); |
||
584 | |||
585 | /* Return function status */ |
||
586 | return HAL_OK; |
||
587 | } |
||
588 | else |
||
589 | { |
||
590 | /* Update error code */ |
||
591 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
||
592 | |||
593 | return HAL_ERROR; |
||
594 | } |
||
595 | } |
||
596 | |||
597 | /** |
||
598 | * @} |
||
599 | */ |
||
600 | |||
601 | /** @defgroup CAN_Exported_Functions_Group3 Control functions |
||
602 | * @brief Control functions |
||
603 | * |
||
604 | @verbatim |
||
605 | ============================================================================== |
||
606 | ##### Control functions ##### |
||
607 | ============================================================================== |
||
608 | [..] This section provides functions allowing to: |
||
609 | (+) HAL_CAN_Start : Start the CAN module |
||
610 | (+) HAL_CAN_Stop : Stop the CAN module |
||
611 | (+) HAL_CAN_RequestSleep : Request sleep mode entry. |
||
612 | (+) HAL_CAN_WakeUp : Wake up from sleep mode. |
||
613 | (+) HAL_CAN_IsSleepActive : Check is sleep mode is active. |
||
614 | (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes |
||
615 | and activate the corresponding |
||
616 | transmission request |
||
617 | (+) HAL_CAN_AbortTxRequest : Abort transmission request |
||
618 | (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level |
||
619 | (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is |
||
620 | pending on the selected Tx mailbox |
||
621 | (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO |
||
622 | (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level |
||
623 | |||
624 | @endverbatim |
||
625 | * @{ |
||
626 | */ |
||
627 | |||
628 | /** |
||
629 | * @brief Start the CAN module. |
||
630 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
631 | * the configuration information for the specified CAN. |
||
632 | * @retval HAL status |
||
633 | */ |
||
634 | HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) |
||
635 | { |
||
636 | uint32_t tickstart; |
||
637 | |||
638 | if (hcan->State == HAL_CAN_STATE_READY) |
||
639 | { |
||
640 | /* Change CAN peripheral state */ |
||
641 | hcan->State = HAL_CAN_STATE_LISTENING; |
||
642 | |||
643 | /* Request leave initialisation */ |
||
644 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); |
||
645 | |||
646 | /* Get tick */ |
||
647 | tickstart = HAL_GetTick(); |
||
648 | |||
649 | /* Wait the acknowledge */ |
||
650 | while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) |
||
651 | { |
||
652 | /* Check for the Timeout */ |
||
653 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
||
654 | { |
||
655 | /* Update error code */ |
||
656 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
||
657 | |||
658 | /* Change CAN state */ |
||
659 | hcan->State = HAL_CAN_STATE_ERROR; |
||
660 | |||
661 | return HAL_ERROR; |
||
662 | } |
||
663 | } |
||
664 | |||
665 | /* Reset the CAN ErrorCode */ |
||
666 | hcan->ErrorCode = HAL_CAN_ERROR_NONE; |
||
667 | |||
668 | /* Return function status */ |
||
669 | return HAL_OK; |
||
670 | } |
||
671 | else |
||
672 | { |
||
673 | /* Update error code */ |
||
674 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; |
||
675 | |||
676 | return HAL_ERROR; |
||
677 | } |
||
678 | } |
||
679 | |||
680 | /** |
||
681 | * @brief Stop the CAN module and enable access to configuration registers. |
||
682 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
683 | * the configuration information for the specified CAN. |
||
684 | * @retval HAL status |
||
685 | */ |
||
686 | HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) |
||
687 | { |
||
688 | uint32_t tickstart; |
||
689 | |||
690 | if (hcan->State == HAL_CAN_STATE_LISTENING) |
||
691 | { |
||
692 | /* Request initialisation */ |
||
693 | SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); |
||
694 | |||
695 | /* Get tick */ |
||
696 | tickstart = HAL_GetTick(); |
||
697 | |||
698 | /* Wait the acknowledge */ |
||
699 | while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) |
||
700 | { |
||
701 | /* Check for the Timeout */ |
||
702 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
||
703 | { |
||
704 | /* Update error code */ |
||
705 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
||
706 | |||
707 | /* Change CAN state */ |
||
708 | hcan->State = HAL_CAN_STATE_ERROR; |
||
709 | |||
710 | return HAL_ERROR; |
||
711 | } |
||
712 | } |
||
713 | |||
714 | /* Exit from sleep mode */ |
||
715 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
||
716 | |||
717 | /* Change CAN peripheral state */ |
||
718 | hcan->State = HAL_CAN_STATE_READY; |
||
719 | |||
720 | /* Return function status */ |
||
721 | return HAL_OK; |
||
722 | } |
||
723 | else |
||
724 | { |
||
725 | /* Update error code */ |
||
726 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; |
||
727 | |||
728 | return HAL_ERROR; |
||
729 | } |
||
730 | } |
||
731 | |||
732 | /** |
||
733 | * @brief Request the sleep mode (low power) entry. |
||
734 | * When returning from this function, Sleep mode will be entered |
||
735 | * as soon as the current CAN activity (transmission or reception |
||
736 | * of a CAN frame) has been completed. |
||
737 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
738 | * the configuration information for the specified CAN. |
||
739 | * @retval HAL status. |
||
740 | */ |
||
741 | HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan) |
||
742 | { |
||
743 | HAL_CAN_StateTypeDef state = hcan->State; |
||
744 | |||
745 | if ((state == HAL_CAN_STATE_READY) || |
||
746 | (state == HAL_CAN_STATE_LISTENING)) |
||
747 | { |
||
748 | /* Request Sleep mode */ |
||
749 | SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
||
750 | |||
751 | /* Return function status */ |
||
752 | return HAL_OK; |
||
753 | } |
||
754 | else |
||
755 | { |
||
756 | /* Update error code */ |
||
757 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
||
758 | |||
759 | /* Return function status */ |
||
760 | return HAL_ERROR; |
||
761 | } |
||
762 | } |
||
763 | |||
764 | /** |
||
765 | * @brief Wake up from sleep mode. |
||
766 | * When returning with HAL_OK status from this function, Sleep mode |
||
767 | * is exited. |
||
768 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
769 | * the configuration information for the specified CAN. |
||
770 | * @retval HAL status. |
||
771 | */ |
||
772 | HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) |
||
773 | { |
||
774 | __IO uint32_t count = 0; |
||
775 | uint32_t timeout = 1000000U; |
||
776 | HAL_CAN_StateTypeDef state = hcan->State; |
||
777 | |||
778 | if ((state == HAL_CAN_STATE_READY) || |
||
779 | (state == HAL_CAN_STATE_LISTENING)) |
||
780 | { |
||
781 | /* Wake up request */ |
||
782 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
||
783 | |||
784 | /* Wait sleep mode is exited */ |
||
785 | do |
||
786 | { |
||
787 | /* Increment counter */ |
||
788 | count++; |
||
789 | |||
790 | /* Check if timeout is reached */ |
||
791 | if (count > timeout) |
||
792 | { |
||
793 | /* Update error code */ |
||
794 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
||
795 | |||
796 | return HAL_ERROR; |
||
797 | } |
||
798 | } |
||
799 | while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U); |
||
800 | |||
801 | /* Return function status */ |
||
802 | return HAL_OK; |
||
803 | } |
||
804 | else |
||
805 | { |
||
806 | /* Update error code */ |
||
807 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
||
808 | |||
809 | return HAL_ERROR; |
||
810 | } |
||
811 | } |
||
812 | |||
813 | /** |
||
814 | * @brief Check is sleep mode is active. |
||
815 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
816 | * the configuration information for the specified CAN. |
||
817 | * @retval Status |
||
818 | * - 0 : Sleep mode is not active. |
||
819 | * - 1 : Sleep mode is active. |
||
820 | */ |
||
821 | uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan) |
||
822 | { |
||
823 | uint32_t status = 0U; |
||
824 | HAL_CAN_StateTypeDef state = hcan->State; |
||
825 | |||
826 | if ((state == HAL_CAN_STATE_READY) || |
||
827 | (state == HAL_CAN_STATE_LISTENING)) |
||
828 | { |
||
829 | /* Check Sleep mode */ |
||
830 | if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) |
||
831 | { |
||
832 | status = 1U; |
||
833 | } |
||
834 | } |
||
835 | |||
836 | /* Return function status */ |
||
837 | return status; |
||
838 | } |
||
839 | |||
840 | /** |
||
841 | * @brief Add a message to the first free Tx mailbox and activate the |
||
842 | * corresponding transmission request. |
||
843 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
844 | * the configuration information for the specified CAN. |
||
845 | * @param pHeader pointer to a CAN_TxHeaderTypeDef structure. |
||
846 | * @param aData array containing the payload of the Tx frame. |
||
847 | * @param pTxMailbox pointer to a variable where the function will return |
||
848 | * the TxMailbox used to store the Tx message. |
||
849 | * This parameter can be a value of @arg CAN_Tx_Mailboxes. |
||
850 | * @retval HAL status |
||
851 | */ |
||
852 | HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox) |
||
853 | { |
||
854 | uint32_t transmitmailbox; |
||
855 | HAL_CAN_StateTypeDef state = hcan->State; |
||
856 | uint32_t tsr = READ_REG(hcan->Instance->TSR); |
||
857 | |||
858 | /* Check the parameters */ |
||
859 | assert_param(IS_CAN_IDTYPE(pHeader->IDE)); |
||
860 | assert_param(IS_CAN_RTR(pHeader->RTR)); |
||
861 | assert_param(IS_CAN_DLC(pHeader->DLC)); |
||
862 | if (pHeader->IDE == CAN_ID_STD) |
||
863 | { |
||
864 | assert_param(IS_CAN_STDID(pHeader->StdId)); |
||
865 | } |
||
866 | else |
||
867 | { |
||
868 | assert_param(IS_CAN_EXTID(pHeader->ExtId)); |
||
869 | } |
||
870 | assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); |
||
871 | |||
872 | if ((state == HAL_CAN_STATE_READY) || |
||
873 | (state == HAL_CAN_STATE_LISTENING)) |
||
874 | { |
||
875 | /* Check that all the Tx mailboxes are not full */ |
||
876 | if (((tsr & CAN_TSR_TME0) != 0U) || |
||
877 | ((tsr & CAN_TSR_TME1) != 0U) || |
||
878 | ((tsr & CAN_TSR_TME2) != 0U)) |
||
879 | { |
||
880 | /* Select an empty transmit mailbox */ |
||
881 | transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; |
||
882 | |||
883 | /* Check transmit mailbox value */ |
||
884 | if (transmitmailbox > 2U) |
||
885 | { |
||
886 | /* Update error code */ |
||
887 | hcan->ErrorCode |= HAL_CAN_ERROR_INTERNAL; |
||
888 | |||
889 | return HAL_ERROR; |
||
890 | } |
||
891 | |||
892 | /* Store the Tx mailbox */ |
||
893 | *pTxMailbox = (uint32_t)1 << transmitmailbox; |
||
894 | |||
895 | /* Set up the Id */ |
||
896 | if (pHeader->IDE == CAN_ID_STD) |
||
897 | { |
||
898 | hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | |
||
899 | pHeader->RTR); |
||
900 | } |
||
901 | else |
||
902 | { |
||
903 | hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | |
||
904 | pHeader->IDE | |
||
905 | pHeader->RTR); |
||
906 | } |
||
907 | |||
908 | /* Set up the DLC */ |
||
909 | hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); |
||
910 | |||
911 | /* Set up the Transmit Global Time mode */ |
||
912 | if (pHeader->TransmitGlobalTime == ENABLE) |
||
913 | { |
||
914 | SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); |
||
915 | } |
||
916 | |||
917 | /* Set up the data field */ |
||
918 | WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, |
||
919 | ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | |
||
920 | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | |
||
921 | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | |
||
922 | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); |
||
923 | WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, |
||
924 | ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) | |
||
925 | ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | |
||
926 | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | |
||
927 | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); |
||
928 | |||
929 | /* Request transmission */ |
||
930 | SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); |
||
931 | |||
932 | /* Return function status */ |
||
933 | return HAL_OK; |
||
934 | } |
||
935 | else |
||
936 | { |
||
937 | /* Update error code */ |
||
938 | hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; |
||
939 | |||
940 | return HAL_ERROR; |
||
941 | } |
||
942 | } |
||
943 | else |
||
944 | { |
||
945 | /* Update error code */ |
||
946 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
||
947 | |||
948 | return HAL_ERROR; |
||
949 | } |
||
950 | } |
||
951 | |||
952 | /** |
||
953 | * @brief Abort transmission requests |
||
954 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
955 | * the configuration information for the specified CAN. |
||
956 | * @param TxMailboxes List of the Tx Mailboxes to abort. |
||
957 | * This parameter can be any combination of @arg CAN_Tx_Mailboxes. |
||
958 | * @retval HAL status |
||
959 | */ |
||
960 | HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) |
||
961 | { |
||
962 | HAL_CAN_StateTypeDef state = hcan->State; |
||
963 | |||
964 | /* Check function parameters */ |
||
965 | assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); |
||
966 | |||
967 | if ((state == HAL_CAN_STATE_READY) || |
||
968 | (state == HAL_CAN_STATE_LISTENING)) |
||
969 | { |
||
970 | /* Check Tx Mailbox 0 */ |
||
971 | if ((TxMailboxes & CAN_TX_MAILBOX0) != 0U) |
||
972 | { |
||
973 | /* Add cancellation request for Tx Mailbox 0 */ |
||
974 | SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0); |
||
975 | } |
||
976 | |||
977 | /* Check Tx Mailbox 1 */ |
||
978 | if ((TxMailboxes & CAN_TX_MAILBOX1) != 0U) |
||
979 | { |
||
980 | /* Add cancellation request for Tx Mailbox 1 */ |
||
981 | SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1); |
||
982 | } |
||
983 | |||
984 | /* Check Tx Mailbox 2 */ |
||
985 | if ((TxMailboxes & CAN_TX_MAILBOX2) != 0U) |
||
986 | { |
||
987 | /* Add cancellation request for Tx Mailbox 2 */ |
||
988 | SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2); |
||
989 | } |
||
990 | |||
991 | /* Return function status */ |
||
992 | return HAL_OK; |
||
993 | } |
||
994 | else |
||
995 | { |
||
996 | /* Update error code */ |
||
997 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
||
998 | |||
999 | return HAL_ERROR; |
||
1000 | } |
||
1001 | } |
||
1002 | |||
1003 | /** |
||
1004 | * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes. |
||
1005 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1006 | * the configuration information for the specified CAN. |
||
1007 | * @retval Number of free Tx Mailboxes. |
||
1008 | */ |
||
1009 | uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan) |
||
1010 | { |
||
1011 | uint32_t freelevel = 0U; |
||
1012 | HAL_CAN_StateTypeDef state = hcan->State; |
||
1013 | |||
1014 | if ((state == HAL_CAN_STATE_READY) || |
||
1015 | (state == HAL_CAN_STATE_LISTENING)) |
||
1016 | { |
||
1017 | /* Check Tx Mailbox 0 status */ |
||
1018 | if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) |
||
1019 | { |
||
1020 | freelevel++; |
||
1021 | } |
||
1022 | |||
1023 | /* Check Tx Mailbox 1 status */ |
||
1024 | if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) |
||
1025 | { |
||
1026 | freelevel++; |
||
1027 | } |
||
1028 | |||
1029 | /* Check Tx Mailbox 2 status */ |
||
1030 | if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) |
||
1031 | { |
||
1032 | freelevel++; |
||
1033 | } |
||
1034 | } |
||
1035 | |||
1036 | /* Return Tx Mailboxes free level */ |
||
1037 | return freelevel; |
||
1038 | } |
||
1039 | |||
1040 | /** |
||
1041 | * @brief Check if a transmission request is pending on the selected Tx |
||
1042 | * Mailboxes. |
||
1043 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
1044 | * the configuration information for the specified CAN. |
||
1045 | * @param TxMailboxes List of Tx Mailboxes to check. |
||
1046 | * This parameter can be any combination of @arg CAN_Tx_Mailboxes. |
||
1047 | * @retval Status |
||
1048 | * - 0 : No pending transmission request on any selected Tx Mailboxes. |
||
1049 | * - 1 : Pending transmission request on at least one of the selected |
||
1050 | * Tx Mailbox. |
||
1051 | */ |
||
1052 | uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) |
||
1053 | { |
||
1054 | uint32_t status = 0U; |
||
1055 | HAL_CAN_StateTypeDef state = hcan->State; |
||
1056 | |||
1057 | /* Check function parameters */ |
||
1058 | assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); |
||
1059 | |||
1060 | if ((state == HAL_CAN_STATE_READY) || |
||
1061 | (state == HAL_CAN_STATE_LISTENING)) |
||
1062 | { |
||
1063 | /* Check pending transmission request on the selected Tx Mailboxes */ |
||
1064 | if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_Pos)) |
||
1065 | { |
||
1066 | status = 1U; |
||
1067 | } |
||
1068 | } |
||
1069 | |||
1070 | /* Return status */ |
||
1071 | return status; |
||
1072 | } |
||
1073 | |||
1074 | /** |
||
1075 | * @brief Return timestamp of Tx message sent, if time triggered communication |
||
1076 | mode is enabled. |
||
1077 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1078 | * the configuration information for the specified CAN. |
||
1079 | * @param TxMailbox Tx Mailbox where the timestamp of message sent will be |
||
1080 | * read. |
||
1081 | * This parameter can be one value of @arg CAN_Tx_Mailboxes. |
||
1082 | * @retval Timestamp of message sent from Tx Mailbox. |
||
1083 | */ |
||
1084 | uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox) |
||
1085 | { |
||
1086 | uint32_t timestamp = 0U; |
||
1087 | uint32_t transmitmailbox; |
||
1088 | HAL_CAN_StateTypeDef state = hcan->State; |
||
1089 | |||
1090 | /* Check function parameters */ |
||
1091 | assert_param(IS_CAN_TX_MAILBOX(TxMailbox)); |
||
1092 | |||
1093 | if ((state == HAL_CAN_STATE_READY) || |
||
1094 | (state == HAL_CAN_STATE_LISTENING)) |
||
1095 | { |
||
1096 | /* Select the Tx mailbox */ |
||
1097 | transmitmailbox = POSITION_VAL(TxMailbox); |
||
1098 | |||
1099 | /* Get timestamp */ |
||
1100 | timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TIME_Pos; |
||
1101 | } |
||
1102 | |||
1103 | /* Return the timestamp */ |
||
1104 | return timestamp; |
||
1105 | } |
||
1106 | |||
1107 | /** |
||
1108 | * @brief Get an CAN frame from the Rx FIFO zone into the message RAM. |
||
1109 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
1110 | * the configuration information for the specified CAN. |
||
1111 | * @param RxFifo Fifo number of the received message to be read. |
||
1112 | * This parameter can be a value of @arg CAN_receive_FIFO_number. |
||
1113 | * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header |
||
1114 | * of the Rx frame will be stored. |
||
1115 | * @param aData array where the payload of the Rx frame will be stored. |
||
1116 | * @retval HAL status |
||
1117 | */ |
||
1118 | HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) |
||
1119 | { |
||
1120 | HAL_CAN_StateTypeDef state = hcan->State; |
||
1121 | |||
1122 | assert_param(IS_CAN_RX_FIFO(RxFifo)); |
||
1123 | |||
1124 | if ((state == HAL_CAN_STATE_READY) || |
||
1125 | (state == HAL_CAN_STATE_LISTENING)) |
||
1126 | { |
||
1127 | /* Check the Rx FIFO */ |
||
1128 | if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ |
||
1129 | { |
||
1130 | /* Check that the Rx FIFO 0 is not empty */ |
||
1131 | if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) |
||
1132 | { |
||
1133 | /* Update error code */ |
||
1134 | hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; |
||
1135 | |||
1136 | return HAL_ERROR; |
||
1137 | } |
||
1138 | } |
||
1139 | else /* Rx element is assigned to Rx FIFO 1 */ |
||
1140 | { |
||
1141 | /* Check that the Rx FIFO 1 is not empty */ |
||
1142 | if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) |
||
1143 | { |
||
1144 | /* Update error code */ |
||
1145 | hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; |
||
1146 | |||
1147 | return HAL_ERROR; |
||
1148 | } |
||
1149 | } |
||
1150 | |||
1151 | /* Get the header */ |
||
1152 | pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; |
||
1153 | if (pHeader->IDE == CAN_ID_STD) |
||
1154 | { |
||
1155 | pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; |
||
1156 | } |
||
1157 | else |
||
1158 | { |
||
1159 | pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; |
||
1160 | } |
||
1161 | pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_RTR_Pos; |
||
1162 | pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; |
||
1163 | pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; |
||
1164 | pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; |
||
1165 | |||
1166 | /* Get the data */ |
||
1167 | aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos); |
||
1168 | aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos); |
||
1169 | aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos); |
||
1170 | aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos); |
||
1171 | aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos); |
||
1172 | aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos); |
||
1173 | aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos); |
||
1174 | aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos); |
||
1175 | |||
1176 | /* Release the FIFO */ |
||
1177 | if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ |
||
1178 | { |
||
1179 | /* Release RX FIFO 0 */ |
||
1180 | SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); |
||
1181 | } |
||
1182 | else /* Rx element is assigned to Rx FIFO 1 */ |
||
1183 | { |
||
1184 | /* Release RX FIFO 1 */ |
||
1185 | SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); |
||
1186 | } |
||
1187 | |||
1188 | /* Return function status */ |
||
1189 | return HAL_OK; |
||
1190 | } |
||
1191 | else |
||
1192 | { |
||
1193 | /* Update error code */ |
||
1194 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
||
1195 | |||
1196 | return HAL_ERROR; |
||
1197 | } |
||
1198 | } |
||
1199 | |||
1200 | /** |
||
1201 | * @brief Return Rx FIFO fill level. |
||
1202 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
1203 | * the configuration information for the specified CAN. |
||
1204 | * @param RxFifo Rx FIFO. |
||
1205 | * This parameter can be a value of @arg CAN_receive_FIFO_number. |
||
1206 | * @retval Number of messages available in Rx FIFO. |
||
1207 | */ |
||
1208 | uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo) |
||
1209 | { |
||
1210 | uint32_t filllevel = 0U; |
||
1211 | HAL_CAN_StateTypeDef state = hcan->State; |
||
1212 | |||
1213 | /* Check function parameters */ |
||
1214 | assert_param(IS_CAN_RX_FIFO(RxFifo)); |
||
1215 | |||
1216 | if ((state == HAL_CAN_STATE_READY) || |
||
1217 | (state == HAL_CAN_STATE_LISTENING)) |
||
1218 | { |
||
1219 | if (RxFifo == CAN_RX_FIFO0) |
||
1220 | { |
||
1221 | filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0; |
||
1222 | } |
||
1223 | else /* RxFifo == CAN_RX_FIFO1 */ |
||
1224 | { |
||
1225 | filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1; |
||
1226 | } |
||
1227 | } |
||
1228 | |||
1229 | /* Return Rx FIFO fill level */ |
||
1230 | return filllevel; |
||
1231 | } |
||
1232 | |||
1233 | /** |
||
1234 | * @} |
||
1235 | */ |
||
1236 | |||
1237 | /** @defgroup CAN_Exported_Functions_Group4 Interrupts management |
||
1238 | * @brief Interrupts management |
||
1239 | * |
||
1240 | @verbatim |
||
1241 | ============================================================================== |
||
1242 | ##### Interrupts management ##### |
||
1243 | ============================================================================== |
||
1244 | [..] This section provides functions allowing to: |
||
1245 | (+) HAL_CAN_ActivateNotification : Enable interrupts |
||
1246 | (+) HAL_CAN_DeactivateNotification : Disable interrupts |
||
1247 | (+) HAL_CAN_IRQHandler : Handles CAN interrupt request |
||
1248 | |||
1249 | @endverbatim |
||
1250 | * @{ |
||
1251 | */ |
||
1252 | |||
1253 | /** |
||
1254 | * @brief Enable interrupts. |
||
1255 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
1256 | * the configuration information for the specified CAN. |
||
1257 | * @param ActiveITs indicates which interrupts will be enabled. |
||
1258 | * This parameter can be any combination of @arg CAN_Interrupts. |
||
1259 | * @retval HAL status |
||
1260 | */ |
||
1261 | HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) |
||
1262 | { |
||
1263 | HAL_CAN_StateTypeDef state = hcan->State; |
||
1264 | |||
1265 | /* Check function parameters */ |
||
1266 | assert_param(IS_CAN_IT(ActiveITs)); |
||
1267 | |||
1268 | if ((state == HAL_CAN_STATE_READY) || |
||
1269 | (state == HAL_CAN_STATE_LISTENING)) |
||
1270 | { |
||
1271 | /* Enable the selected interrupts */ |
||
1272 | __HAL_CAN_ENABLE_IT(hcan, ActiveITs); |
||
1273 | |||
1274 | /* Return function status */ |
||
1275 | return HAL_OK; |
||
1276 | } |
||
1277 | else |
||
1278 | { |
||
1279 | /* Update error code */ |
||
1280 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
||
1281 | |||
1282 | return HAL_ERROR; |
||
1283 | } |
||
1284 | } |
||
1285 | |||
1286 | /** |
||
1287 | * @brief Disable interrupts. |
||
1288 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
1289 | * the configuration information for the specified CAN. |
||
1290 | * @param InactiveITs indicates which interrupts will be disabled. |
||
1291 | * This parameter can be any combination of @arg CAN_Interrupts. |
||
1292 | * @retval HAL status |
||
1293 | */ |
||
1294 | HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs) |
||
1295 | { |
||
1296 | HAL_CAN_StateTypeDef state = hcan->State; |
||
1297 | |||
1298 | /* Check function parameters */ |
||
1299 | assert_param(IS_CAN_IT(InactiveITs)); |
||
1300 | |||
1301 | if ((state == HAL_CAN_STATE_READY) || |
||
1302 | (state == HAL_CAN_STATE_LISTENING)) |
||
1303 | { |
||
1304 | /* Disable the selected interrupts */ |
||
1305 | __HAL_CAN_DISABLE_IT(hcan, InactiveITs); |
||
1306 | |||
1307 | /* Return function status */ |
||
1308 | return HAL_OK; |
||
1309 | } |
||
1310 | else |
||
1311 | { |
||
1312 | /* Update error code */ |
||
1313 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
||
1314 | |||
1315 | return HAL_ERROR; |
||
1316 | } |
||
1317 | } |
||
1318 | |||
1319 | /** |
||
1320 | * @brief Handles CAN interrupt request |
||
1321 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1322 | * the configuration information for the specified CAN. |
||
1323 | * @retval None |
||
1324 | */ |
||
1325 | void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) |
||
1326 | { |
||
1327 | uint32_t errorcode = HAL_CAN_ERROR_NONE; |
||
1328 | uint32_t interrupts = READ_REG(hcan->Instance->IER); |
||
1329 | uint32_t msrflags = READ_REG(hcan->Instance->MSR); |
||
1330 | uint32_t tsrflags = READ_REG(hcan->Instance->TSR); |
||
1331 | uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); |
||
1332 | uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); |
||
1333 | uint32_t esrflags = READ_REG(hcan->Instance->ESR); |
||
1334 | |||
1335 | /* Transmit Mailbox empty interrupt management *****************************/ |
||
1336 | if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) |
||
1337 | { |
||
1338 | /* Transmit Mailbox 0 management *****************************************/ |
||
1339 | if ((tsrflags & CAN_TSR_RQCP0) != 0U) |
||
1340 | { |
||
1341 | /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ |
||
1342 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); |
||
1343 | |||
1344 | if ((tsrflags & CAN_TSR_TXOK0) != 0U) |
||
1345 | { |
||
1346 | /* Transmission Mailbox 0 complete callback */ |
||
1347 | /* Call weak (surcharged) callback */ |
||
1348 | HAL_CAN_TxMailbox0CompleteCallback(hcan); |
||
1349 | } |
||
1350 | else |
||
1351 | { |
||
1352 | if ((tsrflags & CAN_TSR_ALST0) != 0U) |
||
1353 | { |
||
1354 | /* Update error code */ |
||
1355 | errorcode |= HAL_CAN_ERROR_TX_ALST0; |
||
1356 | } |
||
1357 | else if ((tsrflags & CAN_TSR_TERR0) != 0U) |
||
1358 | { |
||
1359 | /* Update error code */ |
||
1360 | errorcode |= HAL_CAN_ERROR_TX_TERR0; |
||
1361 | } |
||
1362 | else |
||
1363 | { |
||
1364 | /* Transmission Mailbox 0 abort callback */ |
||
1365 | /* Call weak (surcharged) callback */ |
||
1366 | HAL_CAN_TxMailbox0AbortCallback(hcan); |
||
1367 | } |
||
1368 | } |
||
1369 | } |
||
1370 | |||
1371 | /* Transmit Mailbox 1 management *****************************************/ |
||
1372 | if ((tsrflags & CAN_TSR_RQCP1) != 0U) |
||
1373 | { |
||
1374 | /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ |
||
1375 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); |
||
1376 | |||
1377 | if ((tsrflags & CAN_TSR_TXOK1) != 0U) |
||
1378 | { |
||
1379 | /* Transmission Mailbox 1 complete callback */ |
||
1380 | /* Call weak (surcharged) callback */ |
||
1381 | HAL_CAN_TxMailbox1CompleteCallback(hcan); |
||
1382 | } |
||
1383 | else |
||
1384 | { |
||
1385 | if ((tsrflags & CAN_TSR_ALST1) != 0U) |
||
1386 | { |
||
1387 | /* Update error code */ |
||
1388 | errorcode |= HAL_CAN_ERROR_TX_ALST1; |
||
1389 | } |
||
1390 | else if ((tsrflags & CAN_TSR_TERR1) != 0U) |
||
1391 | { |
||
1392 | /* Update error code */ |
||
1393 | errorcode |= HAL_CAN_ERROR_TX_TERR1; |
||
1394 | } |
||
1395 | else |
||
1396 | { |
||
1397 | /* Transmission Mailbox 1 abort callback */ |
||
1398 | /* Call weak (surcharged) callback */ |
||
1399 | HAL_CAN_TxMailbox1AbortCallback(hcan); |
||
1400 | } |
||
1401 | } |
||
1402 | } |
||
1403 | |||
1404 | /* Transmit Mailbox 2 management *****************************************/ |
||
1405 | if ((tsrflags & CAN_TSR_RQCP2) != 0U) |
||
1406 | { |
||
1407 | /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ |
||
1408 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); |
||
1409 | |||
1410 | if ((tsrflags & CAN_TSR_TXOK2) != 0U) |
||
1411 | { |
||
1412 | /* Transmission Mailbox 2 complete callback */ |
||
1413 | /* Call weak (surcharged) callback */ |
||
1414 | HAL_CAN_TxMailbox2CompleteCallback(hcan); |
||
1415 | } |
||
1416 | else |
||
1417 | { |
||
1418 | if ((tsrflags & CAN_TSR_ALST2) != 0U) |
||
1419 | { |
||
1420 | /* Update error code */ |
||
1421 | errorcode |= HAL_CAN_ERROR_TX_ALST2; |
||
1422 | } |
||
1423 | else if ((tsrflags & CAN_TSR_TERR2) != 0U) |
||
1424 | { |
||
1425 | /* Update error code */ |
||
1426 | errorcode |= HAL_CAN_ERROR_TX_TERR2; |
||
1427 | } |
||
1428 | else |
||
1429 | { |
||
1430 | /* Transmission Mailbox 2 abort callback */ |
||
1431 | /* Call weak (surcharged) callback */ |
||
1432 | HAL_CAN_TxMailbox2AbortCallback(hcan); |
||
1433 | } |
||
1434 | } |
||
1435 | } |
||
1436 | } |
||
1437 | |||
1438 | /* Receive FIFO 0 overrun interrupt management *****************************/ |
||
1439 | if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) |
||
1440 | { |
||
1441 | if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) |
||
1442 | { |
||
1443 | /* Set CAN error code to Rx Fifo 0 overrun error */ |
||
1444 | errorcode |= HAL_CAN_ERROR_RX_FOV0; |
||
1445 | |||
1446 | /* Clear FIFO0 Overrun Flag */ |
||
1447 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); |
||
1448 | } |
||
1449 | } |
||
1450 | |||
1451 | /* Receive FIFO 0 full interrupt management ********************************/ |
||
1452 | if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) |
||
1453 | { |
||
1454 | if ((rf0rflags & CAN_RF0R_FULL0) != 0U) |
||
1455 | { |
||
1456 | /* Clear FIFO 0 full Flag */ |
||
1457 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); |
||
1458 | |||
1459 | /* Receive FIFO 0 full Callback */ |
||
1460 | /* Call weak (surcharged) callback */ |
||
1461 | HAL_CAN_RxFifo0FullCallback(hcan); |
||
1462 | } |
||
1463 | } |
||
1464 | |||
1465 | /* Receive FIFO 0 message pending interrupt management *********************/ |
||
1466 | if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) |
||
1467 | { |
||
1468 | /* Check if message is still pending */ |
||
1469 | if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) |
||
1470 | { |
||
1471 | /* Receive FIFO 0 mesage pending Callback */ |
||
1472 | /* Call weak (surcharged) callback */ |
||
1473 | HAL_CAN_RxFifo0MsgPendingCallback(hcan); |
||
1474 | } |
||
1475 | } |
||
1476 | |||
1477 | /* Receive FIFO 1 overrun interrupt management *****************************/ |
||
1478 | if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) |
||
1479 | { |
||
1480 | if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) |
||
1481 | { |
||
1482 | /* Set CAN error code to Rx Fifo 1 overrun error */ |
||
1483 | errorcode |= HAL_CAN_ERROR_RX_FOV1; |
||
1484 | |||
1485 | /* Clear FIFO1 Overrun Flag */ |
||
1486 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); |
||
1487 | } |
||
1488 | } |
||
1489 | |||
1490 | /* Receive FIFO 1 full interrupt management ********************************/ |
||
1491 | if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) |
||
1492 | { |
||
1493 | if ((rf1rflags & CAN_RF1R_FULL1) != 0U) |
||
1494 | { |
||
1495 | /* Clear FIFO 1 full Flag */ |
||
1496 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); |
||
1497 | |||
1498 | /* Receive FIFO 1 full Callback */ |
||
1499 | /* Call weak (surcharged) callback */ |
||
1500 | HAL_CAN_RxFifo1FullCallback(hcan); |
||
1501 | } |
||
1502 | } |
||
1503 | |||
1504 | /* Receive FIFO 1 message pending interrupt management *********************/ |
||
1505 | if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) |
||
1506 | { |
||
1507 | /* Check if message is still pending */ |
||
1508 | if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) |
||
1509 | { |
||
1510 | /* Receive FIFO 1 mesage pending Callback */ |
||
1511 | /* Call weak (surcharged) callback */ |
||
1512 | HAL_CAN_RxFifo1MsgPendingCallback(hcan); |
||
1513 | } |
||
1514 | } |
||
1515 | |||
1516 | /* Sleep interrupt management *********************************************/ |
||
1517 | if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) |
||
1518 | { |
||
1519 | if ((msrflags & CAN_MSR_SLAKI) != 0U) |
||
1520 | { |
||
1521 | /* Clear Sleep interrupt Flag */ |
||
1522 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); |
||
1523 | |||
1524 | /* Sleep Callback */ |
||
1525 | /* Call weak (surcharged) callback */ |
||
1526 | HAL_CAN_SleepCallback(hcan); |
||
1527 | } |
||
1528 | } |
||
1529 | |||
1530 | /* WakeUp interrupt management *********************************************/ |
||
1531 | if ((interrupts & CAN_IT_WAKEUP) != 0U) |
||
1532 | { |
||
1533 | if ((msrflags & CAN_MSR_WKUI) != 0U) |
||
1534 | { |
||
1535 | /* Clear WakeUp Flag */ |
||
1536 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); |
||
1537 | |||
1538 | /* WakeUp Callback */ |
||
1539 | /* Call weak (surcharged) callback */ |
||
1540 | HAL_CAN_WakeUpFromRxMsgCallback(hcan); |
||
1541 | } |
||
1542 | } |
||
1543 | |||
1544 | /* Error interrupts management *********************************************/ |
||
1545 | if ((interrupts & CAN_IT_ERROR) != 0U) |
||
1546 | { |
||
1547 | if ((msrflags & CAN_MSR_ERRI) != 0U) |
||
1548 | { |
||
1549 | /* Check Error Warning Flag */ |
||
1550 | if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && |
||
1551 | ((esrflags & CAN_ESR_EWGF) != 0U)) |
||
1552 | { |
||
1553 | /* Set CAN error code to Error Warning */ |
||
1554 | errorcode |= HAL_CAN_ERROR_EWG; |
||
1555 | |||
1556 | /* No need for clear of Error Warning Flag as read-only */ |
||
1557 | } |
||
1558 | |||
1559 | /* Check Error Passive Flag */ |
||
1560 | if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && |
||
1561 | ((esrflags & CAN_ESR_EPVF) != 0U)) |
||
1562 | { |
||
1563 | /* Set CAN error code to Error Passive */ |
||
1564 | errorcode |= HAL_CAN_ERROR_EPV; |
||
1565 | |||
1566 | /* No need for clear of Error Passive Flag as read-only */ |
||
1567 | } |
||
1568 | |||
1569 | /* Check Bus-off Flag */ |
||
1570 | if (((interrupts & CAN_IT_BUSOFF) != 0U) && |
||
1571 | ((esrflags & CAN_ESR_BOFF) != 0U)) |
||
1572 | { |
||
1573 | /* Set CAN error code to Bus-Off */ |
||
1574 | errorcode |= HAL_CAN_ERROR_BOF; |
||
1575 | |||
1576 | /* No need for clear of Error Bus-Off as read-only */ |
||
1577 | } |
||
1578 | |||
1579 | /* Check Last Error Code Flag */ |
||
1580 | if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && |
||
1581 | ((esrflags & CAN_ESR_LEC) != 0U)) |
||
1582 | { |
||
1583 | switch (esrflags & CAN_ESR_LEC) |
||
1584 | { |
||
1585 | case (CAN_ESR_LEC_0): |
||
1586 | /* Set CAN error code to Stuff error */ |
||
1587 | errorcode |= HAL_CAN_ERROR_STF; |
||
1588 | break; |
||
1589 | case (CAN_ESR_LEC_1): |
||
1590 | /* Set CAN error code to Form error */ |
||
1591 | errorcode |= HAL_CAN_ERROR_FOR; |
||
1592 | break; |
||
1593 | case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): |
||
1594 | /* Set CAN error code to Acknowledgement error */ |
||
1595 | errorcode |= HAL_CAN_ERROR_ACK; |
||
1596 | break; |
||
1597 | case (CAN_ESR_LEC_2): |
||
1598 | /* Set CAN error code to Bit recessive error */ |
||
1599 | errorcode |= HAL_CAN_ERROR_BR; |
||
1600 | break; |
||
1601 | case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): |
||
1602 | /* Set CAN error code to Bit Dominant error */ |
||
1603 | errorcode |= HAL_CAN_ERROR_BD; |
||
1604 | break; |
||
1605 | case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): |
||
1606 | /* Set CAN error code to CRC error */ |
||
1607 | errorcode |= HAL_CAN_ERROR_CRC; |
||
1608 | break; |
||
1609 | default: |
||
1610 | break; |
||
1611 | } |
||
1612 | |||
1613 | /* Clear Last error code Flag */ |
||
1614 | CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); |
||
1615 | } |
||
1616 | } |
||
1617 | |||
1618 | /* Clear ERRI Flag */ |
||
1619 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); |
||
1620 | } |
||
1621 | |||
1622 | /* Call the Error call Back in case of Errors */ |
||
1623 | if (errorcode != HAL_CAN_ERROR_NONE) |
||
1624 | { |
||
1625 | /* Update error code in handle */ |
||
1626 | hcan->ErrorCode |= errorcode; |
||
1627 | |||
1628 | /* Call Error callback function */ |
||
1629 | /* Call weak (surcharged) callback */ |
||
1630 | HAL_CAN_ErrorCallback(hcan); |
||
1631 | } |
||
1632 | } |
||
1633 | |||
1634 | /** |
||
1635 | * @} |
||
1636 | */ |
||
1637 | |||
1638 | /** @defgroup CAN_Exported_Functions_Group5 Callback functions |
||
1639 | * @brief CAN Callback functions |
||
1640 | * |
||
1641 | @verbatim |
||
1642 | ============================================================================== |
||
1643 | ##### Callback functions ##### |
||
1644 | ============================================================================== |
||
1645 | [..] |
||
1646 | This subsection provides the following callback functions: |
||
1647 | (+) HAL_CAN_TxMailbox0CompleteCallback |
||
1648 | (+) HAL_CAN_TxMailbox1CompleteCallback |
||
1649 | (+) HAL_CAN_TxMailbox2CompleteCallback |
||
1650 | (+) HAL_CAN_TxMailbox0AbortCallback |
||
1651 | (+) HAL_CAN_TxMailbox1AbortCallback |
||
1652 | (+) HAL_CAN_TxMailbox2AbortCallback |
||
1653 | (+) HAL_CAN_RxFifo0MsgPendingCallback |
||
1654 | (+) HAL_CAN_RxFifo0FullCallback |
||
1655 | (+) HAL_CAN_RxFifo1MsgPendingCallback |
||
1656 | (+) HAL_CAN_RxFifo1FullCallback |
||
1657 | (+) HAL_CAN_SleepCallback |
||
1658 | (+) HAL_CAN_WakeUpFromRxMsgCallback |
||
1659 | (+) HAL_CAN_ErrorCallback |
||
1660 | |||
1661 | @endverbatim |
||
1662 | * @{ |
||
1663 | */ |
||
1664 | |||
1665 | /** |
||
1666 | * @brief Transmission Mailbox 0 complete callback. |
||
1667 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1668 | * the configuration information for the specified CAN. |
||
1669 | * @retval None |
||
1670 | */ |
||
1671 | __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) |
||
1672 | { |
||
1673 | /* Prevent unused argument(s) compilation warning */ |
||
1674 | UNUSED(hcan); |
||
1675 | |||
1676 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1677 | the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the |
||
1678 | user file |
||
1679 | */ |
||
1680 | } |
||
1681 | |||
1682 | /** |
||
1683 | * @brief Transmission Mailbox 1 complete callback. |
||
1684 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1685 | * the configuration information for the specified CAN. |
||
1686 | * @retval None |
||
1687 | */ |
||
1688 | __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) |
||
1689 | { |
||
1690 | /* Prevent unused argument(s) compilation warning */ |
||
1691 | UNUSED(hcan); |
||
1692 | |||
1693 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1694 | the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the |
||
1695 | user file |
||
1696 | */ |
||
1697 | } |
||
1698 | |||
1699 | /** |
||
1700 | * @brief Transmission Mailbox 2 complete callback. |
||
1701 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1702 | * the configuration information for the specified CAN. |
||
1703 | * @retval None |
||
1704 | */ |
||
1705 | __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) |
||
1706 | { |
||
1707 | /* Prevent unused argument(s) compilation warning */ |
||
1708 | UNUSED(hcan); |
||
1709 | |||
1710 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1711 | the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the |
||
1712 | user file |
||
1713 | */ |
||
1714 | } |
||
1715 | |||
1716 | /** |
||
1717 | * @brief Transmission Mailbox 0 Cancellation callback. |
||
1718 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
1719 | * the configuration information for the specified CAN. |
||
1720 | * @retval None |
||
1721 | */ |
||
1722 | __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) |
||
1723 | { |
||
1724 | /* Prevent unused argument(s) compilation warning */ |
||
1725 | UNUSED(hcan); |
||
1726 | |||
1727 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1728 | the HAL_CAN_TxMailbox0AbortCallback could be implemented in the |
||
1729 | user file |
||
1730 | */ |
||
1731 | } |
||
1732 | |||
1733 | /** |
||
1734 | * @brief Transmission Mailbox 1 Cancellation callback. |
||
1735 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
1736 | * the configuration information for the specified CAN. |
||
1737 | * @retval None |
||
1738 | */ |
||
1739 | __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) |
||
1740 | { |
||
1741 | /* Prevent unused argument(s) compilation warning */ |
||
1742 | UNUSED(hcan); |
||
1743 | |||
1744 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1745 | the HAL_CAN_TxMailbox1AbortCallback could be implemented in the |
||
1746 | user file |
||
1747 | */ |
||
1748 | } |
||
1749 | |||
1750 | /** |
||
1751 | * @brief Transmission Mailbox 2 Cancellation callback. |
||
1752 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
||
1753 | * the configuration information for the specified CAN. |
||
1754 | * @retval None |
||
1755 | */ |
||
1756 | __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) |
||
1757 | { |
||
1758 | /* Prevent unused argument(s) compilation warning */ |
||
1759 | UNUSED(hcan); |
||
1760 | |||
1761 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1762 | the HAL_CAN_TxMailbox2AbortCallback could be implemented in the |
||
1763 | user file |
||
1764 | */ |
||
1765 | } |
||
1766 | |||
1767 | /** |
||
1768 | * @brief Rx FIFO 0 message pending callback. |
||
1769 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1770 | * the configuration information for the specified CAN. |
||
1771 | * @retval None |
||
1772 | */ |
||
1773 | __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) |
||
1774 | { |
||
1775 | /* Prevent unused argument(s) compilation warning */ |
||
1776 | UNUSED(hcan); |
||
1777 | |||
1778 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1779 | the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the |
||
1780 | user file |
||
1781 | */ |
||
1782 | } |
||
1783 | |||
1784 | /** |
||
1785 | * @brief Rx FIFO 0 full callback. |
||
1786 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1787 | * the configuration information for the specified CAN. |
||
1788 | * @retval None |
||
1789 | */ |
||
1790 | __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) |
||
1791 | { |
||
1792 | /* Prevent unused argument(s) compilation warning */ |
||
1793 | UNUSED(hcan); |
||
1794 | |||
1795 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1796 | the HAL_CAN_RxFifo0FullCallback could be implemented in the user |
||
1797 | file |
||
1798 | */ |
||
1799 | } |
||
1800 | |||
1801 | /** |
||
1802 | * @brief Rx FIFO 1 message pending callback. |
||
1803 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1804 | * the configuration information for the specified CAN. |
||
1805 | * @retval None |
||
1806 | */ |
||
1807 | __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) |
||
1808 | { |
||
1809 | /* Prevent unused argument(s) compilation warning */ |
||
1810 | UNUSED(hcan); |
||
1811 | |||
1812 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1813 | the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the |
||
1814 | user file |
||
1815 | */ |
||
1816 | } |
||
1817 | |||
1818 | /** |
||
1819 | * @brief Rx FIFO 1 full callback. |
||
1820 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1821 | * the configuration information for the specified CAN. |
||
1822 | * @retval None |
||
1823 | */ |
||
1824 | __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) |
||
1825 | { |
||
1826 | /* Prevent unused argument(s) compilation warning */ |
||
1827 | UNUSED(hcan); |
||
1828 | |||
1829 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1830 | the HAL_CAN_RxFifo1FullCallback could be implemented in the user |
||
1831 | file |
||
1832 | */ |
||
1833 | } |
||
1834 | |||
1835 | /** |
||
1836 | * @brief Sleep callback. |
||
1837 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1838 | * the configuration information for the specified CAN. |
||
1839 | * @retval None |
||
1840 | */ |
||
1841 | __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) |
||
1842 | { |
||
1843 | /* Prevent unused argument(s) compilation warning */ |
||
1844 | UNUSED(hcan); |
||
1845 | |||
1846 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1847 | the HAL_CAN_SleepCallback could be implemented in the user file |
||
1848 | */ |
||
1849 | } |
||
1850 | |||
1851 | /** |
||
1852 | * @brief WakeUp from Rx message callback. |
||
1853 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1854 | * the configuration information for the specified CAN. |
||
1855 | * @retval None |
||
1856 | */ |
||
1857 | __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) |
||
1858 | { |
||
1859 | /* Prevent unused argument(s) compilation warning */ |
||
1860 | UNUSED(hcan); |
||
1861 | |||
1862 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1863 | the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the |
||
1864 | user file |
||
1865 | */ |
||
1866 | } |
||
1867 | |||
1868 | /** |
||
1869 | * @brief Error CAN callback. |
||
1870 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1871 | * the configuration information for the specified CAN. |
||
1872 | * @retval None |
||
1873 | */ |
||
1874 | __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) |
||
1875 | { |
||
1876 | /* Prevent unused argument(s) compilation warning */ |
||
1877 | UNUSED(hcan); |
||
1878 | |||
1879 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1880 | the HAL_CAN_ErrorCallback could be implemented in the user file |
||
1881 | */ |
||
1882 | } |
||
1883 | |||
1884 | /** |
||
1885 | * @} |
||
1886 | */ |
||
1887 | |||
1888 | /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions |
||
1889 | * @brief CAN Peripheral State functions |
||
1890 | * |
||
1891 | @verbatim |
||
1892 | ============================================================================== |
||
1893 | ##### Peripheral State and Error functions ##### |
||
1894 | ============================================================================== |
||
1895 | [..] |
||
1896 | This subsection provides functions allowing to : |
||
1897 | (+) HAL_CAN_GetState() : Return the CAN state. |
||
1898 | (+) HAL_CAN_GetError() : Return the CAN error codes if any. |
||
1899 | (+) HAL_CAN_ResetError(): Reset the CAN error codes if any. |
||
1900 | |||
1901 | @endverbatim |
||
1902 | * @{ |
||
1903 | */ |
||
1904 | |||
1905 | /** |
||
1906 | * @brief Return the CAN state. |
||
1907 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1908 | * the configuration information for the specified CAN. |
||
1909 | * @retval HAL state |
||
1910 | */ |
||
1911 | HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan) |
||
1912 | { |
||
1913 | HAL_CAN_StateTypeDef state = hcan->State; |
||
1914 | |||
1915 | if ((state == HAL_CAN_STATE_READY) || |
||
1916 | (state == HAL_CAN_STATE_LISTENING)) |
||
1917 | { |
||
1918 | /* Check sleep mode acknowledge flag */ |
||
1919 | if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) |
||
1920 | { |
||
1921 | /* Sleep mode is active */ |
||
1922 | state = HAL_CAN_STATE_SLEEP_ACTIVE; |
||
1923 | } |
||
1924 | /* Check sleep mode request flag */ |
||
1925 | else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != 0U) |
||
1926 | { |
||
1927 | /* Sleep mode request is pending */ |
||
1928 | state = HAL_CAN_STATE_SLEEP_PENDING; |
||
1929 | } |
||
1930 | else |
||
1931 | { |
||
1932 | /* Neither sleep mode request nor sleep mode acknowledge */ |
||
1933 | } |
||
1934 | } |
||
1935 | |||
1936 | /* Return CAN state */ |
||
1937 | return state; |
||
1938 | } |
||
1939 | |||
1940 | /** |
||
1941 | * @brief Return the CAN error code. |
||
1942 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1943 | * the configuration information for the specified CAN. |
||
1944 | * @retval CAN Error Code |
||
1945 | */ |
||
1946 | uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan) |
||
1947 | { |
||
1948 | /* Return CAN error code */ |
||
1949 | return hcan->ErrorCode; |
||
1950 | } |
||
1951 | |||
1952 | /** |
||
1953 | * @brief Reset the CAN error code. |
||
1954 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
||
1955 | * the configuration information for the specified CAN. |
||
1956 | * @retval HAL status |
||
1957 | */ |
||
1958 | HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan) |
||
1959 | { |
||
1960 | HAL_StatusTypeDef status = HAL_OK; |
||
1961 | HAL_CAN_StateTypeDef state = hcan->State; |
||
1962 | |||
1963 | if ((state == HAL_CAN_STATE_READY) || |
||
1964 | (state == HAL_CAN_STATE_LISTENING)) |
||
1965 | { |
||
1966 | /* Reset CAN error code */ |
||
1967 | hcan->ErrorCode = 0U; |
||
1968 | } |
||
1969 | else |
||
1970 | { |
||
1971 | /* Update error code */ |
||
1972 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
||
1973 | |||
1974 | status = HAL_ERROR; |
||
1975 | } |
||
1976 | |||
1977 | /* Return the status */ |
||
1978 | return status; |
||
1979 | } |
||
1980 | |||
1981 | /** |
||
1982 | * @} |
||
1983 | */ |
||
1984 | |||
1985 | /** |
||
1986 | * @} |
||
1987 | */ |
||
1988 | |||
1989 | #endif /* HAL_CAN_MODULE_ENABLED */ |
||
1990 | |||
1991 | /** |
||
1992 | * @} |
||
1993 | */ |
||
1994 | |||
1995 | #endif /* CAN1 */ |
||
1996 | |||
1997 | /** |
||
1998 | * @} |
||
1999 | */ |
||
2000 | |||
2001 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |