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/**

  ******************************************************************************

  * @file    stm32f1xx_hal_can.c

  * @author  MCD Application Team

  * @version V1.0.1

  * @date    31-July-2015

  * @brief   CAN HAL module driver.

  *          This file provides firmware functions to manage the following

  *          functionalities of the Controller Area Network (CAN) peripheral:          

  *           + Initialization and de-initialization functions

  *           + IO operation functions

  *           + Peripheral Control functions

  *           + Peripheral State and Error functions

  *

  @verbatim

  ==============================================================================

                        ##### How to use this driver #####

  ==============================================================================

    [..]            

      (#) Enable the CAN controller interface clock using

          __HAL_RCC_CAN1_CLK_ENABLE() for CAN1 and __HAL_RCC_CAN2_CLK_ENABLE() for CAN2

      -@- In case you are using CAN2 only, you have to enable the CAN1 clock.

      (#) CAN pins configuration

        (++) Enable the clock for the CAN GPIOs using the following function:

             __HAL_RCC_GPIOx_CLK_ENABLE();  

        (++) Connect and configure the involved CAN pins using the

              following function HAL_GPIO_Init();

      (#) Initialise and configure the CAN using HAL_CAN_Init() function.  

      (#) Transmit the desired CAN frame using HAL_CAN_Transmit() function.

      (#) Receive a CAN frame using HAL_CAN_Receive() function.

     *** Polling mode IO operation ***

     =================================

     [..]    

       (+) Start the CAN peripheral transmission and wait the end of this operation

           using HAL_CAN_Transmit(), at this stage user can specify the value of timeout

           according to his end application

       (+) Start the CAN peripheral reception and wait the end of this operation

           using HAL_CAN_Receive(), at this stage user can specify the value of timeout

           according to his end application

     *** Interrupt mode IO operation ***    

     ===================================

     [..]    

       (+) Start the CAN peripheral transmission using HAL_CAN_Transmit_IT()

       (+) Start the CAN peripheral reception using HAL_CAN_Receive_IT()        

       (+) Use HAL_CAN_IRQHandler() called under the used CAN Interrupt subroutine

       (+) At CAN end of transmission HAL_CAN_TxCpltCallback() function is executed and user can

            add his own code by customization of function pointer HAL_CAN_TxCpltCallback

       (+) In case of CAN Error, HAL_CAN_ErrorCallback() function is executed and user can

            add his own code by customization of function pointer HAL_CAN_ErrorCallback

     *** CAN HAL driver macros list ***

     =============================================

     [..]

       Below the list of most used macros in CAN HAL driver.

      (+) __HAL_CAN_ENABLE_IT: Enable the specified CAN interrupts

      (+) __HAL_CAN_DISABLE_IT: Disable the specified CAN interrupts

      (+) __HAL_CAN_GET_IT_SOURCE: Check if the specified CAN interrupt source is enabled or disabled

      (+) __HAL_CAN_CLEAR_FLAG: Clear the CAN's pending flags

      (+) __HAL_CAN_GET_FLAG: Get the selected CAN's flag status

     [..]

      (@) You can refer to the CAN HAL driver header file for more useful macros

  @endverbatim

  ******************************************************************************

  * @attention

  *

  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>

  *

  * Redistribution and use in source and binary forms, with or without modification,

  * are permitted provided that the following conditions are met:

  *   1. Redistributions of source code must retain the above copyright notice,

  *      this list of conditions and the following disclaimer.

  *   2. Redistributions in binary form must reproduce the above copyright notice,

  *      this list of conditions and the following disclaimer in the documentation

  *      and/or other materials provided with the distribution.

  *   3. Neither the name of STMicroelectronics nor the names of its contributors

  *      may be used to endorse or promote products derived from this software

  *      without specific prior written permission.

  *

  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE

  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

  *

  ******************************************************************************

  */

/* Includes ------------------------------------------------------------------*/

#include "stm32f1xx_hal.h"

#ifdef HAL_CAN_MODULE_ENABLED  

#if defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || \

    defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)

/** @addtogroup STM32F1xx_HAL_Driver

  * @{

  */

/** @defgroup CAN CAN

  * @brief CAN driver modules

  * @{

  */

/* Private typedef -----------------------------------------------------------*/

/* Private define ------------------------------------------------------------*/

/** @defgroup CAN_Private_Constants CAN Private Constants

  * @{

  */

#define CAN_TIMEOUT_VALUE  10

#define CAN_TI0R_STID_BIT_POSITION    ((uint32_t)21)  /* Position of LSB bits STID in register CAN_TI0R */

#define CAN_TI0R_EXID_BIT_POSITION    ((uint32_t) 3)  /* Position of LSB bits EXID in register CAN_TI0R */

#define CAN_TDL0R_DATA0_BIT_POSITION  ((uint32_t) 0)  /* Position of LSB bits DATA0 in register CAN_TDL0R */

#define CAN_TDL0R_DATA1_BIT_POSITION  ((uint32_t) 8)  /* Position of LSB bits DATA1 in register CAN_TDL0R */

#define CAN_TDL0R_DATA2_BIT_POSITION  ((uint32_t)16)  /* Position of LSB bits DATA2 in register CAN_TDL0R */

#define CAN_TDL0R_DATA3_BIT_POSITION  ((uint32_t)24)  /* Position of LSB bits DATA3 in register CAN_TDL0R */

/**

  * @}

  */

/* Private macro -------------------------------------------------------------*/

/* Private variables ---------------------------------------------------------*/

/* Private function prototypes -----------------------------------------------*/

static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber);

static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan);

/* Exported functions ---------------------------------------------------------*/

/** @defgroup CAN_Exported_Functions CAN Exported Functions

  * @{

  */

/** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions

 *  @brief    Initialization and Configuration functions

 *

@verbatim    

  ==============================================================================

              ##### Initialization and de-initialization functions #####

  ==============================================================================

    [..]  This section provides functions allowing to:

      (+) Initialize and configure the CAN.

      (+) De-initialize the CAN.

@endverbatim

  * @{

  */

/**

  * @brief  Initializes the CAN peripheral according to the specified

  *         parameters in the CAN_InitStruct.

  * @param  hcan: pointer to a CAN_HandleTypeDef structure that contains

  *         the configuration information for the specified CAN.  

  * @retval HAL status

  */

HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)

{

  uint32_t status = CAN_INITSTATUS_FAILED;  /* Default init status */

  uint32_t tickstart = 0;

  uint32_t tmp_mcr = 0;

  /* Check CAN handle */

  if(hcan == NULL)

  {

     return HAL_ERROR;

  }

  /* Check the parameters */

  assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));

  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TTCM));

  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ABOM));

  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AWUM));

  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.NART));

  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.RFLM));

  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TXFP));

  assert_param(IS_CAN_MODE(hcan->Init.Mode));

  assert_param(IS_CAN_SJW(hcan->Init.SJW));

  assert_param(IS_CAN_BS1(hcan->Init.BS1));

  assert_param(IS_CAN_BS2(hcan->Init.BS2));

  assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));

  if(hcan->State == HAL_CAN_STATE_RESET)

  {

    /* Allocate lock resource and initialize it */

    hcan->Lock = HAL_UNLOCKED;

    /* Init the low level hardware */

    HAL_CAN_MspInit(hcan);

  }

  /* Initialize the CAN state*/

  hcan->State = HAL_CAN_STATE_BUSY;

  /* Exit from sleep mode */

  CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);

  /* Request initialisation */

  SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);

  /* Get timeout */

  tickstart = HAL_GetTick();  

  /* Wait the acknowledge */

  while(HAL_IS_BIT_CLR(hcan->Instance->MSR, CAN_MSR_INAK))

  {

    if((HAL_GetTick()-tickstart) > CAN_TIMEOUT_VALUE)

    {

      hcan->State= HAL_CAN_STATE_TIMEOUT;

      /* Process unlocked */

      __HAL_UNLOCK(hcan);

      return HAL_TIMEOUT;

    }

  }

  /* Check acknowledge */

  if ((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)

  {

    /* Set the time triggered communication mode */

    if (hcan->Init.TTCM == ENABLE)

    {

      SET_BIT(tmp_mcr, CAN_MCR_TTCM);

    }

    /* Set the automatic bus-off management */

    if (hcan->Init.ABOM == ENABLE)

    {

      SET_BIT(tmp_mcr, CAN_MCR_ABOM);

    }

    /* Set the automatic wake-up mode */

    if (hcan->Init.AWUM == ENABLE)

    {

      SET_BIT(tmp_mcr, CAN_MCR_AWUM);

    }

    /* Set the no automatic retransmission */

    if (hcan->Init.NART == ENABLE)

    {

      SET_BIT(tmp_mcr, CAN_MCR_NART);

    }

    /* Set the receive FIFO locked mode */

    if (hcan->Init.RFLM == ENABLE)

    {

      SET_BIT(tmp_mcr, CAN_MCR_RFLM);

    }

    /* Set the transmit FIFO priority */

    if (hcan->Init.TXFP == ENABLE)

    {

      SET_BIT(tmp_mcr, CAN_MCR_TXFP);

    }

    /* Update register MCR */

    MODIFY_REG(hcan->Instance->MCR,

               CAN_MCR_TTCM |

               CAN_MCR_ABOM |

               CAN_MCR_AWUM |

               CAN_MCR_NART |

               CAN_MCR_RFLM |

               CAN_MCR_TXFP,

               tmp_mcr);

    /* Set the bit timing register */

    WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode           |

                                              hcan->Init.SJW            |

                                              hcan->Init.BS1            |

                                              hcan->Init.BS2            |

                                              (hcan->Init.Prescaler - 1) ));

    /* Request leave initialisation */

    CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);

    /* Get timeout */

    tickstart = HAL_GetTick();  

    /* Wait the acknowledge */

    while(HAL_IS_BIT_CLR(hcan->Instance->MSR, CAN_MSR_INAK))

    {

      if((HAL_GetTick()-tickstart) > CAN_TIMEOUT_VALUE)

      {

        hcan->State= HAL_CAN_STATE_TIMEOUT;

        /* Process unlocked */

        __HAL_UNLOCK(hcan);

        return HAL_TIMEOUT;

      }

    }

    /* Check acknowledged */

    if (HAL_IS_BIT_SET(hcan->Instance->MSR, CAN_MSR_INAK))

    {

      status = CAN_INITSTATUS_SUCCESS;

    }

  }

  if(status == CAN_INITSTATUS_SUCCESS)

  {

    /* Set CAN error code to none */

    hcan->ErrorCode = HAL_CAN_ERROR_NONE;

    /* Initialize the CAN state */

    hcan->State = HAL_CAN_STATE_READY;

    /* Return function status */

    return HAL_OK;

  }

  else

  {

    /* Initialize the CAN state */

    hcan->State = HAL_CAN_STATE_ERROR;

    /* Return function status */

    return HAL_ERROR;

  }

}

/**

  * @brief  Configures the CAN reception filter according to the specified

  *         parameters in the CAN_FilterInitStruct.

  * @param  hcan: pointer to a CAN_HandleTypeDef structure that contains

  *         the configuration information for the specified CAN.

  * @param  sFilterConfig: pointer to a CAN_FilterConfTypeDef structure that

  *         contains the filter configuration information.

  * @retval None

  */

HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig)

{

  uint32_t filternbrbitpos = 0;

  /* Check the parameters */

  assert_param(IS_CAN_FILTER_NUMBER(sFilterConfig->FilterNumber));

  assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));

  assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));

  assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));

  assert_param(IS_FUNCTIONAL_STATE(sFilterConfig->FilterActivation));

  assert_param(IS_CAN_BANKNUMBER(sFilterConfig->BankNumber));

  filternbrbitpos = ((uint32_t)1) << sFilterConfig->FilterNumber;

  /* Initialisation mode for the filter */

  /* Select the start slave bank */

  MODIFY_REG(hcan->Instance->FMR                         ,

             CAN_FMR_CAN2SB                              ,

             CAN_FMR_FINIT                              |

             (uint32_t)(sFilterConfig->BankNumber << 8)   );

  /* Filter Deactivation */

  CLEAR_BIT(hcan->Instance->FA1R, filternbrbitpos);

  /* Filter Scale */

  if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT)

  {

    /* 16-bit scale for the filter */

    CLEAR_BIT(hcan->Instance->FS1R, filternbrbitpos);

    /* First 16-bit identifier and First 16-bit mask */

    /* Or First 16-bit identifier and Second 16-bit identifier */

    hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR1 =

       ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16) |

        (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);

    /* Second 16-bit identifier and Second 16-bit mask */

    /* Or Third 16-bit identifier and Fourth 16-bit identifier */

    hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR2 =

       ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |

        (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh);

  }

  if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT)

  {

    /* 32-bit scale for the filter */

    SET_BIT(hcan->Instance->FS1R, filternbrbitpos);

    /* 32-bit identifier or First 32-bit identifier */

    hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR1 =

       ((0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh) << 16) |

        (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);

    /* 32-bit mask or Second 32-bit identifier */

    hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR2 =

       ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |

        (0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow);

  }

  /* Filter Mode */

  if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK)

  {

    /*Id/Mask mode for the filter*/

    CLEAR_BIT(hcan->Instance->FM1R, filternbrbitpos);

  }

  else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */

  {

    /*Identifier list mode for the filter*/

    SET_BIT(hcan->Instance->FM1R, filternbrbitpos);

  }

  /* Filter FIFO assignment */

  if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0)

  {

    /* FIFO 0 assignation for the filter */

    CLEAR_BIT(hcan->Instance->FFA1R, filternbrbitpos);

  }

  else

  {

    /* FIFO 1 assignation for the filter */

    SET_BIT(hcan->Instance->FFA1R, filternbrbitpos);

  }

  /* Filter activation */

  if (sFilterConfig->FilterActivation == ENABLE)

  {

    SET_BIT(hcan->Instance->FA1R, filternbrbitpos);

  }

  /* Leave the initialisation mode for the filter */

  CLEAR_BIT(hcan->Instance->FMR, ((uint32_t)CAN_FMR_FINIT));

  /* Return function status */

  return HAL_OK;

}

/**

  * @brief  Deinitializes the CANx peripheral registers to their default reset values.

  * @param  hcan: pointer to a CAN_HandleTypeDef structure that contains

  *         the configuration information for the specified CAN.  

  * @retval HAL status

  */

HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)

{

  /* Check CAN handle */

  if(hcan == NULL)

  {

     return HAL_ERROR;

  }

  /* Check the parameters */

  assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));

  /* Change CAN state */

  hcan->State = HAL_CAN_STATE_BUSY;

  /* DeInit the low level hardware */

  HAL_CAN_MspDeInit(hcan);

  /* Change CAN state */

  hcan->State = HAL_CAN_STATE_RESET;

  /* Release Lock */

  __HAL_UNLOCK(hcan);

  /* Return function status */

  return HAL_OK;

}

/**

  * @brief  Initializes the CAN MSP.

  * @param  hcan: pointer to a CAN_HandleTypeDef structure that contains

  *         the configuration information for the specified CAN.  

  * @retval None

  */

__weak void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)

{

  /* NOTE : This function Should not be modified, when the callback is needed,

            the HAL_CAN_MspInit can be implemented in the user file

   */

}

/**

  * @brief  DeInitializes the CAN MSP.

  * @param  hcan: pointer to a CAN_HandleTypeDef structure that contains

  *         the configuration information for the specified CAN.  

  * @retval None

  */

__weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)

{

  /* NOTE : This function Should not be modified, when the callback is needed,

            the HAL_CAN_MspDeInit can be implemented in the user file

   */

}

/**

  * @}

  */

/** @defgroup CAN_Exported_Functions_Group2 Input and Output operation functions

 *  @brief    I/O operation functions

 *

@verbatim  

  ==============================================================================

                      ##### IO operation functions #####

  ==============================================================================

    [..]  This section provides functions allowing to:

      (+) Transmit a CAN frame message.

      (+) Receive a CAN frame message.

      (+) Enter CAN peripheral in sleep mode.

      (+) Wake up the CAN peripheral from sleep mode.

@endverbatim

  * @{

  */

/**

  * @brief  Initiates and transmits a CAN frame message.

  * @param  hcan: pointer to a CAN_HandleTypeDef structure that contains

  *         the configuration information for the specified CAN.  

  * @param  Timeout: Specify Timeout value  

  * @retval HAL status

  */

HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef* hcan, uint32_t Timeout)

{

  uint32_t transmitmailbox = CAN_TXSTATUS_NOMAILBOX;

  uint32_t tickstart = 0;

  /* Check the parameters */

  assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));

  assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));

  assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));

  /* Process locked */

  __HAL_LOCK(hcan);

  if(hcan->State == HAL_CAN_STATE_BUSY_RX)

  {

    /* Change CAN state */

    hcan->State = HAL_CAN_STATE_BUSY_TX_RX;

  }

  else

  {

    /* Change CAN state */

    hcan->State = HAL_CAN_STATE_BUSY_TX;

  }

  /* Select one empty transmit mailbox */

  if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME0))

  {

    transmitmailbox = 0;

  }

  else if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME1))

  {

    transmitmailbox = 1;

  }

  else if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME2))

  {

    transmitmailbox = 2;

  }

  else

  {

    transmitmailbox = CAN_TXSTATUS_NOMAILBOX;

  }

  if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX)

  {

    /* Set up the Id */

    hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;

    if (hcan->pTxMsg->IDE == CAN_ID_STD)

    {

      assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));  

      hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << CAN_TI0R_STID_BIT_POSITION) |

                                                           hcan->pTxMsg->RTR);

    }

    else

    {

      assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));

      hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << CAN_TI0R_EXID_BIT_POSITION) |

                                                           hcan->pTxMsg->IDE |

                                                           hcan->pTxMsg->RTR);

    }

    /* Set up the DLC */

    hcan->pTxMsg->DLC &= (uint8_t)0x0000000F;

    hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;

    hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;

    /* Set up the data field */

    WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, ((uint32_t)hcan->pTxMsg->Data[3] << CAN_TDL0R_DATA3_BIT_POSITION) |

                                                                ((uint32_t)hcan->pTxMsg->Data[2] << CAN_TDL0R_DATA2_BIT_POSITION) |

                                                                ((uint32_t)hcan->pTxMsg->Data[1] << CAN_TDL0R_DATA1_BIT_POSITION) |

                                                                ((uint32_t)hcan->pTxMsg->Data[0] << CAN_TDL0R_DATA0_BIT_POSITION)  );

    WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, ((uint32_t)hcan->pTxMsg->Data[7] << CAN_TDL0R_DATA3_BIT_POSITION) |

                                                                ((uint32_t)hcan->pTxMsg->Data[6] << CAN_TDL0R_DATA2_BIT_POSITION) |

                                                                ((uint32_t)hcan->pTxMsg->Data[5] << CAN_TDL0R_DATA1_BIT_POSITION) |

                                                                ((uint32_t)hcan->pTxMsg->Data[4] << CAN_TDL0R_DATA0_BIT_POSITION)  );

    /* Request transmission */

    SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ);

    /* Get timeout */

    tickstart = HAL_GetTick();  

    /* Check End of transmission flag */

    while(!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox)))

    {

      /* Check for the Timeout */

      if(Timeout != HAL_MAX_DELAY)

      {

        if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))

        {

          hcan->State = HAL_CAN_STATE_TIMEOUT;

          /* Process unlocked */

          __HAL_UNLOCK(hcan);

          return HAL_TIMEOUT;

        }

      }

    }

    if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)

    {

      /* Change CAN state */

      hcan->State = HAL_CAN_STATE_BUSY_RX;

      /* Process unlocked */

      __HAL_UNLOCK(hcan);

    }

    else

    {

      /* Change CAN state */

      hcan->State = HAL_CAN_STATE_READY;

    }

    /* Process unlocked */

    __HAL_UNLOCK(hcan);

    /* Return function status */

    return HAL_OK;

  }

  else

  {

    /* Change CAN state */

    hcan->State = HAL_CAN_STATE_ERROR;

    /* Process unlocked */

    __HAL_UNLOCK(hcan);

    /* Return function status */

    return HAL_ERROR;

  }

}

/**

  * @brief  Initiates and transmits a CAN frame message.

  * @param  hcan: pointer to a CAN_HandleTypeDef structure that contains

  *         the configuration information for the specified CAN.  

  * @retval HAL status

  */

HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef* hcan)

{

  uint32_t transmitmailbox = CAN_TXSTATUS_NOMAILBOX;

  /* Check the parameters */

  assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));

  assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));

  assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));

  if((hcan->State == HAL_CAN_STATE_READY) || (hcan->State == HAL_CAN_STATE_BUSY_RX))

  {

    /* Process Locked */

    __HAL_LOCK(hcan);

    /* Select one empty transmit mailbox */

    if(HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME0))

    {

      transmitmailbox = 0;

    }

    else if(HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME1))

    {

      transmitmailbox = 1;

    }

    else if(HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME2))

    {

      transmitmailbox = 2;

    }

    else

    {

      transmitmailbox = CAN_TXSTATUS_NOMAILBOX;

    }

    if(transmitmailbox != CAN_TXSTATUS_NOMAILBOX)

    {

      /* Set up the Id */

      hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;

      if (hcan->pTxMsg->IDE == CAN_ID_STD)

      {

        assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));  

        hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << CAN_TI0R_STID_BIT_POSITION) |

                                                             hcan->pTxMsg->RTR);

      }

      else

      {

        assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));

        hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << CAN_TI0R_EXID_BIT_POSITION) |

                                                             hcan->pTxMsg->IDE |

                                                             hcan->pTxMsg->RTR);

      }

      /* Set up the DLC */

      hcan->pTxMsg->DLC &= (uint8_t)0x0000000F;

      hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;

      hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;

      /* Set up the data field */

      WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, ((uint32_t)hcan->pTxMsg->Data[3] << CAN_TDL0R_DATA3_BIT_POSITION) |

                                                                  ((uint32_t)hcan->pTxMsg->Data[2] << CAN_TDL0R_DATA2_BIT_POSITION) |

                                                                  ((uint32_t)hcan->pTxMsg->Data[1] << CAN_TDL0R_DATA1_BIT_POSITION) |

                                                                  ((uint32_t)hcan->pTxMsg->Data[0] << CAN_TDL0R_DATA0_BIT_POSITION)  );

      WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, ((uint32_t)hcan->pTxMsg->Data[7] << CAN_TDL0R_DATA3_BIT_POSITION) |

                                                                  ((uint32_t)hcan->pTxMsg->Data[6] << CAN_TDL0R_DATA2_BIT_POSITION) |

                                                                  ((uint32_t)hcan->pTxMsg->Data[5] << CAN_TDL0R_DATA1_BIT_POSITION) |

                                                                  ((uint32_t)hcan->pTxMsg->Data[4] << CAN_TDL0R_DATA0_BIT_POSITION)  );

      if(hcan->State == HAL_CAN_STATE_BUSY_RX)

      {

        /* Change CAN state */

        hcan->State = HAL_CAN_STATE_BUSY_TX_RX;

      }

      else

      {

        /* Change CAN state */

        hcan->State = HAL_CAN_STATE_BUSY_TX;

      }

      /* Set CAN error code to none */

      hcan->ErrorCode = HAL_CAN_ERROR_NONE;

      /* Process Unlocked */

      __HAL_UNLOCK(hcan);

      /* Enable interrupts: */

      /*  - Enable Error warning Interrupt */

      /*  - Enable Error passive Interrupt */

      /*  - Enable Bus-off Interrupt */

      /*  - Enable Last error code Interrupt */

      /*  - Enable Error Interrupt */

      /*  - Enable Transmit mailbox empty Interrupt */

      __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG |

                                CAN_IT_EPV |

                                CAN_IT_BOF |

                                CAN_IT_LEC |

                                CAN_IT_ERR |

                                CAN_IT_TME  );

      /* Request transmission */

      hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;

    }

  }

  else

  {

    return HAL_BUSY;

  }

  return HAL_OK;

}

/**

  * @brief  Receives a correct CAN frame.

  * @param  hcan: pointer to a CAN_HandleTypeDef structure that contains

  *         the configuration information for the specified CAN.  

  * @param  FIFONumber: FIFO Number value

  * @param  Timeout: Specify Timeout value

  * @retval HAL status

  * @retval None

  */

HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef* hcan, uint8_t FIFONumber, uint32_t Timeout)

{

  uint32_t tickstart = 0;

  /* Check the parameters */

  assert_param(IS_CAN_FIFO(FIFONumber));

  /* Process locked */

  __HAL_LOCK(hcan);

  if(hcan->State == HAL_CAN_STATE_BUSY_TX)

  {

    /* Change CAN state */

    hcan->State = HAL_CAN_STATE_BUSY_TX_RX;

  }

  else

  {

    /* Change CAN state */

    hcan->State = HAL_CAN_STATE_BUSY_RX;

  }

  /* Get tick */

  tickstart = HAL_GetTick();

  /* Check pending message */

  while(__HAL_CAN_MSG_PENDING(hcan, FIFONumber) == 0)

  {

    /* Check for the Timeout */

    if(Timeout != HAL_MAX_DELAY)

    {

      if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))

      {

        hcan->State = HAL_CAN_STATE_TIMEOUT;

        /* Process unlocked */

        __HAL_UNLOCK(hcan);

        return HAL_TIMEOUT;

      }

    }

  }

  /* Get the Id */

  hcan->pRxMsg->IDE = (uint8_t)CAN_ID_EXT & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;

  if (hcan->pRxMsg->IDE == CAN_ID_STD)

  {

    hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21);

  }

  else

  {

    hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3);

  }

  hcan->pRxMsg->RTR = (uint8_t)CAN_RTR_REMOTE & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;

  /* Get the DLC */

  hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;

  /* Get the FMI */

  hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8);

  /* Get the data field */

  hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;

  hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8);