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2 mjames 1
/**
2
  ******************************************************************************
3
  * @file    stm32f1xx_hal_adc_ex.c
4
  * @author  MCD Application Team
5
  * @brief   This file provides firmware functions to manage the following
6
  *          functionalities of the Analog to Digital Convertor (ADC)
7
  *          peripheral:
8
  *           + Operation functions
9
  *             ++ Start, stop, get result of conversions of injected
10
  *                group, using 2 possible modes: polling, interruption.
11
  *             ++ Multimode feature (available on devices with 2 ADCs or more)
12
  *             ++ Calibration (ADC automatic self-calibration)
13
  *           + Control functions
14
  *             ++ Channels configuration on injected group
15
  *          Other functions (generic functions) are available in file
16
  *          "stm32f1xx_hal_adc.c".
17
  *
18
  @verbatim
19
  [..]
20
  (@) Sections "ADC peripheral features" and "How to use this driver" are
21
      available in file of generic functions "stm32f1xx_hal_adc.c".
22
  [..]
23
  @endverbatim
24
  ******************************************************************************
25
  * @attention
26
  *
27
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
28
  * All rights reserved.</center></h2>
29
  *
30
  * This software component is licensed by ST under BSD 3-Clause license,
31
  * the "License"; You may not use this file except in compliance with the
32
  * License. You may obtain a copy of the License at:
33
  *                        opensource.org/licenses/BSD-3-Clause
34
  *
35
  ******************************************************************************
36
  */
37
 
38
/* Includes ------------------------------------------------------------------*/
39
#include "stm32f1xx_hal.h"
40
 
41
/** @addtogroup STM32F1xx_HAL_Driver
42
  * @{
43
  */
44
 
45
/** @defgroup ADCEx ADCEx
46
  * @brief ADC Extension HAL module driver
47
  * @{
48
  */
49
 
50
#ifdef HAL_ADC_MODULE_ENABLED
51
 
52
/* Private typedef -----------------------------------------------------------*/
53
/* Private define ------------------------------------------------------------*/
54
/** @defgroup ADCEx_Private_Constants ADCEx Private Constants
55
  * @{
56
  */
57
 
58
  /* Delay for ADC calibration:                                               */
59
  /* Hardware prerequisite before starting a calibration: the ADC must have   */
60
  /* been in power-on state for at least two ADC clock cycles.                */
61
  /* Unit: ADC clock cycles                                                   */
62
  #define ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES       2U
63
 
64
  /* Timeout value for ADC calibration                                        */
65
  /* Value defined to be higher than worst cases: low clocks freq,            */
66
  /* maximum prescaler.                                                       */
67
  /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock         */
68
  /* prescaler 4, sampling time 12.5 ADC clock cycles, resolution 12 bits.    */
69
  /* Unit: ms                                                                 */
70
  #define ADC_CALIBRATION_TIMEOUT          10U
71
 
72
  /* Delay for temperature sensor stabilization time.                         */
73
  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
74
  /* Unit: us                                                                 */
75
  #define ADC_TEMPSENSOR_DELAY_US         10U
76
 
77
/**
78
  * @}
79
  */
80
 
81
/* Private macro -------------------------------------------------------------*/
82
/* Private variables ---------------------------------------------------------*/
83
/* Private function prototypes -----------------------------------------------*/
84
/* Private functions ---------------------------------------------------------*/
85
 
86
/** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
87
  * @{
88
  */
89
 
90
/** @defgroup ADCEx_Exported_Functions_Group1 Extended Extended IO operation functions
91
 *  @brief    Extended Extended Input and Output operation functions
92
 *
93
@verbatim    
94
 ===============================================================================
95
                      ##### IO operation functions #####
96
 ===============================================================================
97
    [..]  This section provides functions allowing to:
98
      (+) Start conversion of injected group.
99
      (+) Stop conversion of injected group.
100
      (+) Poll for conversion complete on injected group.
101
      (+) Get result of injected channel conversion.
102
      (+) Start conversion of injected group and enable interruptions.
103
      (+) Stop conversion of injected group and disable interruptions.
104
 
105
      (+) Start multimode and enable DMA transfer.
106
      (+) Stop multimode and disable ADC DMA transfer.
107
      (+) Get result of multimode conversion.
108
 
109
      (+) Perform the ADC self-calibration for single or differential ending.
110
      (+) Get calibration factors for single or differential ending.
111
      (+) Set calibration factors for single or differential ending.
112
 
113
@endverbatim
114
  * @{
115
  */
116
 
117
/**
118
  * @brief  Perform an ADC automatic self-calibration
119
  *         Calibration prerequisite: ADC must be disabled (execute this
120
  *         function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
121
  *         During calibration process, ADC is enabled. ADC is let enabled at
122
  *         the completion of this function.
123
  * @param  hadc: ADC handle
124
  * @retval HAL status
125
  */
126
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
127
{
128
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
129
  uint32_t tickstart;
130
  __IO uint32_t wait_loop_index = 0U;
131
 
132
  /* Check the parameters */
133
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
134
 
135
  /* Process locked */
136
  __HAL_LOCK(hadc);
137
 
138
  /* 1. Calibration prerequisite:                                             */
139
  /*    - ADC must be disabled for at least two ADC clock cycles in disable   */
140
  /*      mode before ADC enable                                              */
141
  /* Stop potential conversion on going, on regular and injected groups       */
142
  /* Disable ADC peripheral */
143
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
144
 
145
  /* Check if ADC is effectively disabled */
146
  if (tmp_hal_status == HAL_OK)
147
  {
148
    /* Set ADC state */
149
    ADC_STATE_CLR_SET(hadc->State,
150
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
151
                      HAL_ADC_STATE_BUSY_INTERNAL);
152
 
153
    /* Hardware prerequisite: delay before starting the calibration.          */
154
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles.  */
155
    /*  - Wait for the expected ADC clock cycles delay */
156
    wait_loop_index = ((SystemCoreClock
157
                        / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
158
                       * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES        );
159
 
160
    while(wait_loop_index != 0U)
161
    {
162
      wait_loop_index--;
163
    }
164
 
165
    /* 2. Enable the ADC peripheral */
166
    ADC_Enable(hadc);
167
 
168
    /* 3. Resets ADC calibration registers */  
169
    SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL);
170
 
171
    tickstart = HAL_GetTick();  
172
 
173
    /* Wait for calibration reset completion */
174
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
175
    {
176
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
177
      {
178
        /* New check to avoid false timeout detection in case of preemption */
179
        if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
180
        {
181
          /* Update ADC state machine to error */
182
          ADC_STATE_CLR_SET(hadc->State,
183
                            HAL_ADC_STATE_BUSY_INTERNAL,
184
                            HAL_ADC_STATE_ERROR_INTERNAL);
185
 
186
          /* Process unlocked */
187
          __HAL_UNLOCK(hadc);
188
 
189
          return HAL_ERROR;
190
        }
191
      }
192
    }
193
 
194
    /* 4. Start ADC calibration */
195
    SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL);
196
 
197
    tickstart = HAL_GetTick();  
198
 
199
    /* Wait for calibration completion */
200
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
201
    {
202
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
203
      {
204
        /* New check to avoid false timeout detection in case of preemption */
205
        if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
206
        {
207
          /* Update ADC state machine to error */
208
          ADC_STATE_CLR_SET(hadc->State,
209
                            HAL_ADC_STATE_BUSY_INTERNAL,
210
                            HAL_ADC_STATE_ERROR_INTERNAL);
211
 
212
          /* Process unlocked */
213
          __HAL_UNLOCK(hadc);
214
 
215
          return HAL_ERROR;
216
        }
217
      }
218
    }
219
 
220
    /* Set ADC state */
221
    ADC_STATE_CLR_SET(hadc->State,
222
                      HAL_ADC_STATE_BUSY_INTERNAL,
223
                      HAL_ADC_STATE_READY);
224
  }
225
 
226
  /* Process unlocked */
227
  __HAL_UNLOCK(hadc);
228
 
229
  /* Return function status */
230
  return tmp_hal_status;
231
}
232
 
233
/**
234
  * @brief  Enables ADC, starts conversion of injected group.
235
  *         Interruptions enabled in this function: None.
236
  * @param  hadc: ADC handle
237
  * @retval HAL status
238
  */
239
HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
240
{
241
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
242
 
243
  /* Check the parameters */
244
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
245
 
246
  /* Process locked */
247
  __HAL_LOCK(hadc);
248
 
249
  /* Enable the ADC peripheral */
250
  tmp_hal_status = ADC_Enable(hadc);
251
 
252
  /* Start conversion if ADC is effectively enabled */
253
  if (tmp_hal_status == HAL_OK)
254
  {
255
    /* Set ADC state                                                          */
256
    /* - Clear state bitfield related to injected group conversion results    */
257
    /* - Set state bitfield related to injected operation                     */
258
    ADC_STATE_CLR_SET(hadc->State,
259
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
260
                      HAL_ADC_STATE_INJ_BUSY);
261
 
262
    /* Case of independent mode or multimode (for devices with several ADCs): */
263
    /* Set multimode state.                                                   */
264
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
265
    {
266
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
267
    }
268
    else
269
    {
270
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
271
    }
272
 
273
    /* Check if a regular conversion is ongoing */
274
    /* Note: On this device, there is no ADC error code fields related to     */
275
    /*       conversions on group injected only. In case of conversion on     */
276
    /*       going on group regular, no error code is reset.                  */
277
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
278
    {
279
      /* Reset ADC all error code fields */
280
      ADC_CLEAR_ERRORCODE(hadc);
281
    }
282
 
283
    /* Process unlocked */
284
    /* Unlock before starting ADC conversions: in case of potential           */
285
    /* interruption, to let the process to ADC IRQ Handler.                   */
286
    __HAL_UNLOCK(hadc);
287
 
288
    /* Clear injected group conversion flag */
289
    /* (To ensure of no unknown state from potential previous ADC operations) */
290
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
291
 
292
    /* Enable conversion of injected group.                                   */
293
    /* If software start has been selected, conversion starts immediately.    */
294
    /* If external trigger has been selected, conversion will start at next   */
295
    /* trigger event.                                                         */
296
    /* If automatic injected conversion is enabled, conversion will start     */
297
    /* after next regular group conversion.                                   */
298
    /* Case of multimode enabled (for devices with several ADCs): if ADC is   */
299
    /* slave, ADC is enabled only (conversion is not started). If ADC is      */
300
    /* master, ADC is enabled and conversion is started.                      */
301
    if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO))
302
    {
303
      if (ADC_IS_SOFTWARE_START_INJECTED(hadc)     &&
304
          ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
305
      {
306
        /* Start ADC conversion on injected group with SW start */
307
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_JSWSTART | ADC_CR2_JEXTTRIG));
308
      }
309
      else
310
      {
311
        /* Start ADC conversion on injected group with external trigger */
312
        SET_BIT(hadc->Instance->CR2, ADC_CR2_JEXTTRIG);
313
      }
314
    }
315
  }
316
  else
317
  {
318
    /* Process unlocked */
319
    __HAL_UNLOCK(hadc);
320
  }
321
 
322
  /* Return function status */
323
  return tmp_hal_status;
324
}
325
 
326
/**
327
  * @brief  Stop conversion of injected channels. Disable ADC peripheral if
328
  *         no regular conversion is on going.
329
  * @note   If ADC must be disabled and if conversion is on going on
330
  *         regular group, function HAL_ADC_Stop must be used to stop both
331
  *         injected and regular groups, and disable the ADC.
332
  * @note   If injected group mode auto-injection is enabled,
333
  *         function HAL_ADC_Stop must be used.
334
  * @note   In case of auto-injection mode, HAL_ADC_Stop must be used.
335
  * @param  hadc: ADC handle
336
  * @retval None
337
  */
338
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
339
{
340
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
341
 
342
  /* Check the parameters */
343
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
344
 
345
  /* Process locked */
346
  __HAL_LOCK(hadc);
347
 
348
  /* Stop potential conversion and disable ADC peripheral                     */
349
  /* Conditioned to:                                                          */
350
  /* - No conversion on the other group (regular group) is intended to        */
351
  /*   continue (injected and regular groups stop conversion and ADC disable  */
352
  /*   are common)                                                            */
353
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
354
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
355
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
356
  {
357
    /* Stop potential conversion on going, on regular and injected groups */
358
    /* Disable ADC peripheral */
359
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
360
 
361
    /* Check if ADC is effectively disabled */
362
    if (tmp_hal_status == HAL_OK)
363
    {
364
      /* Set ADC state */
365
      ADC_STATE_CLR_SET(hadc->State,
366
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
367
                        HAL_ADC_STATE_READY);
368
    }
369
  }
370
  else
371
  {
372
    /* Update ADC state machine to error */
373
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
374
 
375
    tmp_hal_status = HAL_ERROR;
376
  }
377
 
378
  /* Process unlocked */
379
  __HAL_UNLOCK(hadc);
380
 
381
  /* Return function status */
382
  return tmp_hal_status;
383
}
384
 
385
/**
386
  * @brief  Wait for injected group conversion to be completed.
387
  * @param  hadc: ADC handle
388
  * @param  Timeout: Timeout value in millisecond.
389
  * @retval HAL status
390
  */
391
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
392
{
393
  uint32_t tickstart;
394
 
395
  /* Variables for polling in case of scan mode enabled and polling for each  */
396
  /* conversion.                                                              */
397
  __IO uint32_t Conversion_Timeout_CPU_cycles = 0U;
398
  uint32_t Conversion_Timeout_CPU_cycles_max = 0U;
399
 
400
  /* Check the parameters */
401
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
402
 
403
  /* Get timeout */
404
  tickstart = HAL_GetTick();  
405
 
406
  /* Polling for end of conversion: differentiation if single/sequence        */
407
  /* conversion.                                                              */
408
  /* For injected group, flag JEOC is set only at the end of the sequence,    */
409
  /* not for each conversion within the sequence.                             */
410
  /*  - If single conversion for injected group (scan mode disabled or        */
411
  /*    InjectedNbrOfConversion ==1), flag JEOC is used to determine the      */
412
  /*    conversion completion.                                                */
413
  /*  - If sequence conversion for injected group (scan mode enabled and      */
414
  /*    InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
415
  /*    sequence.                                                             */
416
  /*    To poll for each conversion, the maximum conversion time is computed  */
417
  /*    from ADC conversion time (selected sampling time + conversion time of */
418
  /*    12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on    */
419
  /*    settings, conversion time range can be from 28 to 32256 CPU cycles).  */
420
  /*    As flag JEOC is not set after each conversion, no timeout status can  */
421
  /*    be set.                                                               */
422
  if ((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)
423
  {
424
    /* Wait until End of Conversion flag is raised */
425
    while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
426
    {
427
      /* Check if timeout is disabled (set to infinite wait) */
428
      if(Timeout != HAL_MAX_DELAY)
429
      {
430
        if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
431
        {
432
          /* New check to avoid false timeout detection in case of preemption */
433
          if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
434
          {
435
            /* Update ADC state machine to timeout */
436
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
437
 
438
            /* Process unlocked */
439
            __HAL_UNLOCK(hadc);
440
 
441
            return HAL_TIMEOUT;
442
          }
443
        }
444
      }
445
    }
446
  }
447
  else
448
  {
449
    /* Replace polling by wait for maximum conversion time */
450
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles   */
451
    /*    and ADC maximum conversion cycles on all channels.                  */
452
    /*  - Wait for the expected ADC clock cycles delay                        */
453
    Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock
454
                                          / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
455
                                         * ADC_CONVCYCLES_MAX_RANGE(hadc)                 );
456
 
457
    while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
458
    {
459
      /* Check if timeout is disabled (set to infinite wait) */
460
      if(Timeout != HAL_MAX_DELAY)
461
      {
462
        if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
463
        {
464
          /* New check to avoid false timeout detection in case of preemption */
465
          if(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
466
          {
467
            /* Update ADC state machine to timeout */
468
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
469
 
470
            /* Process unlocked */
471
            __HAL_UNLOCK(hadc);
472
 
473
            return HAL_TIMEOUT;
474
          }
475
        }
476
      }
477
      Conversion_Timeout_CPU_cycles ++;
478
    }
479
  }
480
 
481
  /* Clear injected group conversion flag */
482
  /* Note: On STM32F1 ADC, clear regular conversion flag raised               */
483
  /* simultaneously.                                                          */
484
  __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC | ADC_FLAG_EOC);
485
 
486
  /* Update ADC state machine */
487
  SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
488
 
489
  /* Determine whether any further conversion upcoming on group injected      */
490
  /* by external trigger or by automatic injected conversion                  */
491
  /* from group regular.                                                      */
492
  if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                     ||
493
     (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&    
494
     (ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
495
      (hadc->Init.ContinuousConvMode == DISABLE)   )        )   )
496
  {
497
    /* Set ADC state */
498
    CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);  
499
 
500
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
501
    {
502
      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
503
    }
504
  }
505
 
506
  /* Return ADC state */
507
  return HAL_OK;
508
}
509
 
510
/**
511
  * @brief  Enables ADC, starts conversion of injected group with interruption.
512
  *          - JEOC (end of conversion of injected group)
513
  *         Each of these interruptions has its dedicated callback function.
514
  * @param  hadc: ADC handle
515
  * @retval HAL status.
516
  */
517
HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
518
{
519
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
520
 
521
  /* Check the parameters */
522
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
523
 
524
  /* Process locked */
525
  __HAL_LOCK(hadc);
526
 
527
  /* Enable the ADC peripheral */
528
  tmp_hal_status = ADC_Enable(hadc);
529
 
530
  /* Start conversion if ADC is effectively enabled */
531
  if (tmp_hal_status == HAL_OK)
532
  {
533
    /* Set ADC state                                                          */
534
    /* - Clear state bitfield related to injected group conversion results    */
535
    /* - Set state bitfield related to injected operation                     */
536
    ADC_STATE_CLR_SET(hadc->State,
537
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
538
                      HAL_ADC_STATE_INJ_BUSY);
539
 
540
    /* Case of independent mode or multimode (for devices with several ADCs): */
541
    /* Set multimode state.                                                   */
542
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
543
    {
544
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
545
    }
546
    else
547
    {
548
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
549
    }
550
 
551
    /* Check if a regular conversion is ongoing */
552
    /* Note: On this device, there is no ADC error code fields related to     */
553
    /*       conversions on group injected only. In case of conversion on     */
554
    /*       going on group regular, no error code is reset.                  */
555
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
556
    {
557
      /* Reset ADC all error code fields */
558
      ADC_CLEAR_ERRORCODE(hadc);
559
    }
560
 
561
    /* Process unlocked */
562
    /* Unlock before starting ADC conversions: in case of potential           */
563
    /* interruption, to let the process to ADC IRQ Handler.                   */
564
    __HAL_UNLOCK(hadc);
565
 
566
    /* Clear injected group conversion flag */
567
    /* (To ensure of no unknown state from potential previous ADC operations) */
568
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
569
 
570
    /* Enable end of conversion interrupt for injected channels */
571
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
572
 
573
    /* Start conversion of injected group if software start has been selected */
574
    /* and if automatic injected conversion is disabled.                      */
575
    /* If external trigger has been selected, conversion will start at next   */
576
    /* trigger event.                                                         */
577
    /* If automatic injected conversion is enabled, conversion will start     */
578
    /* after next regular group conversion.                                   */
579
    if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO))
580
    {
581
      if (ADC_IS_SOFTWARE_START_INJECTED(hadc)     &&
582
          ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
583
      {
584
        /* Start ADC conversion on injected group with SW start */
585
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_JSWSTART | ADC_CR2_JEXTTRIG));
586
      }
587
      else
588
      {
589
        /* Start ADC conversion on injected group with external trigger */
590
        SET_BIT(hadc->Instance->CR2, ADC_CR2_JEXTTRIG);
591
      }
592
    }
593
  }
594
  else
595
  {
596
    /* Process unlocked */
597
    __HAL_UNLOCK(hadc);
598
  }
599
 
600
  /* Return function status */
601
  return tmp_hal_status;
602
}
603
 
604
/**
605
  * @brief  Stop conversion of injected channels, disable interruption of
606
  *         end-of-conversion. Disable ADC peripheral if no regular conversion
607
  *         is on going.
608
  * @note   If ADC must be disabled and if conversion is on going on
609
  *         regular group, function HAL_ADC_Stop must be used to stop both
610
  *         injected and regular groups, and disable the ADC.
611
  * @note   If injected group mode auto-injection is enabled,
612
  *         function HAL_ADC_Stop must be used.
613
  * @param  hadc: ADC handle
614
  * @retval None
615
  */
616
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
617
{
618
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
619
 
620
  /* Check the parameters */
621
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
622
 
623
  /* Process locked */
624
  __HAL_LOCK(hadc);
625
 
626
  /* Stop potential conversion and disable ADC peripheral                     */
627
  /* Conditioned to:                                                          */
628
  /* - No conversion on the other group (regular group) is intended to        */
629
  /*   continue (injected and regular groups stop conversion and ADC disable  */
630
  /*   are common)                                                            */
631
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
632
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
633
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
634
  {
635
    /* Stop potential conversion on going, on regular and injected groups */
636
    /* Disable ADC peripheral */
637
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
638
 
639
    /* Check if ADC is effectively disabled */
640
    if (tmp_hal_status == HAL_OK)
641
    {
642
      /* Disable ADC end of conversion interrupt for injected channels */
643
      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
644
 
645
      /* Set ADC state */
646
      ADC_STATE_CLR_SET(hadc->State,
647
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
648
                        HAL_ADC_STATE_READY);
649
    }
650
  }
651
  else
652
  {
653
    /* Update ADC state machine to error */
654
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
655
 
656
    tmp_hal_status = HAL_ERROR;
657
  }
658
 
659
  /* Process unlocked */
660
  __HAL_UNLOCK(hadc);
661
 
662
  /* Return function status */
663
  return tmp_hal_status;
664
}
665
 
666
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
667
/**
668
  * @brief  Enables ADC, starts conversion of regular group and transfers result
669
  *         through DMA.
670
  *         Multimode must have been previously configured using
671
  *         HAL_ADCEx_MultiModeConfigChannel() function.
672
  *         Interruptions enabled in this function:
673
  *          - DMA transfer complete
674
  *          - DMA half transfer
675
  *         Each of these interruptions has its dedicated callback function.
676
  * @note:  On STM32F1 devices, ADC slave regular group must be configured
677
  *         with conversion trigger ADC_SOFTWARE_START.
678
  * @note:  ADC slave can be enabled preliminarily using single-mode  
679
  *         HAL_ADC_Start() function.
680
  * @param  hadc: ADC handle of ADC master (handle of ADC slave must not be used)
681
  * @param  pData: The destination Buffer address.
682
  * @param  Length: The length of data to be transferred from ADC peripheral to memory.
683
  * @retval None
684
  */
685
HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
686
{
687
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
688
  ADC_HandleTypeDef tmphadcSlave={0};
689
 
690
  /* Check the parameters */
691
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
692
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
693
 
694
  /* Process locked */
695
  __HAL_LOCK(hadc);
696
 
697
  /* Set a temporary handle of the ADC slave associated to the ADC master     */
698
  ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
699
 
700
  /* On STM32F1 devices, ADC slave regular group must be configured with      */
701
  /* conversion trigger ADC_SOFTWARE_START.                                   */
702
  /* Note: External trigger of ADC slave must be enabled, it is already done  */
703
  /*       into function "HAL_ADC_Init()".                                    */
704
  if(!ADC_IS_SOFTWARE_START_REGULAR(&tmphadcSlave))  
705
  {
706
    /* Update ADC state machine to error */
707
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
708
 
709
    /* Process unlocked */
710
    __HAL_UNLOCK(hadc);
711
 
712
    return HAL_ERROR;
713
  }
714
 
715
  /* Enable the ADC peripherals: master and slave (in case if not already     */
716
  /* enabled previously)                                                      */
717
  tmp_hal_status = ADC_Enable(hadc);
718
  if (tmp_hal_status == HAL_OK)
719
  {
720
    tmp_hal_status = ADC_Enable(&tmphadcSlave);
721
  }
722
 
723
  /* Start conversion if all ADCs of multimode are effectively enabled */
724
  if (tmp_hal_status == HAL_OK)
725
  {
726
    /* Set ADC state (ADC master)                                             */
727
    /* - Clear state bitfield related to regular group conversion results     */
728
    /* - Set state bitfield related to regular operation                      */
729
    ADC_STATE_CLR_SET(hadc->State,
730
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_MULTIMODE_SLAVE,
731
                      HAL_ADC_STATE_REG_BUSY);
732
 
733
    /* If conversions on group regular are also triggering group injected,    */
734
    /* update ADC state.                                                      */
735
    if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
736
    {
737
      ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
738
    }
739
 
740
    /* Process unlocked */
741
    /* Unlock before starting ADC conversions: in case of potential           */
742
    /* interruption, to let the process to ADC IRQ Handler.                   */
743
    __HAL_UNLOCK(hadc);
744
 
745
    /* Set ADC error code to none */
746
    ADC_CLEAR_ERRORCODE(hadc);
747
 
748
 
749
    /* Set the DMA transfer complete callback */
750
    hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
751
 
752
    /* Set the DMA half transfer complete callback */
753
    hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
754
 
755
    /* Set the DMA error callback */
756
    hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
757
 
758
 
759
    /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC     */
760
    /* start (in case of SW start):                                           */
761
 
762
    /* Clear regular group conversion flag and overrun flag */
763
    /* (To ensure of no unknown state from potential previous ADC operations) */
764
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
765
 
766
    /* Enable ADC DMA mode of ADC master */
767
    SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
768
 
769
    /* Start the DMA channel */
770
    HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
771
 
772
    /* Start conversion of regular group if software start has been selected. */
773
    /* If external trigger has been selected, conversion will start at next   */
774
    /* trigger event.                                                         */
775
    /* Note: Alternate trigger for single conversion could be to force an     */
776
    /*       additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/
777
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
778
    {
779
      /* Start ADC conversion on regular group with SW start */
780
      SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
781
    }
782
    else
783
    {
784
      /* Start ADC conversion on regular group with external trigger */
785
      SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
786
    }
787
  }
788
  else
789
  {
790
    /* Process unlocked */
791
    __HAL_UNLOCK(hadc);
792
  }
793
 
794
  /* Return function status */
795
  return tmp_hal_status;
796
}
797
 
798
/**
799
  * @brief  Stop ADC conversion of regular group (and injected channels in
800
  *         case of auto_injection mode), disable ADC DMA transfer, disable
801
  *         ADC peripheral.
802
  * @note   Multimode is kept enabled after this function. To disable multimode
803
  *         (set with HAL_ADCEx_MultiModeConfigChannel(), ADC must be
804
  *         reinitialized using HAL_ADC_Init() or HAL_ADC_ReInit().
805
  * @note   In case of DMA configured in circular mode, function
806
  *         HAL_ADC_Stop_DMA must be called after this function with handle of
807
  *         ADC slave, to properly disable the DMA channel.
808
  * @param  hadc: ADC handle of ADC master (handle of ADC slave must not be used)
809
  * @retval None
810
  */
811
HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
812
{
813
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
814
  ADC_HandleTypeDef tmphadcSlave={0};
815
 
816
  /* Check the parameters */
817
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
818
 
819
  /* Process locked */
820
  __HAL_LOCK(hadc);
821
 
822
  /* Stop potential conversion on going, on regular and injected groups */
823
  /* Disable ADC master peripheral */
824
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
825
 
826
  /* Check if ADC is effectively disabled */
827
  if(tmp_hal_status == HAL_OK)
828
  {
829
    /* Set a temporary handle of the ADC slave associated to the ADC master   */
830
    ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
831
 
832
    /* Disable ADC slave peripheral */
833
    tmp_hal_status = ADC_ConversionStop_Disable(&tmphadcSlave);
834
 
835
    /* Check if ADC is effectively disabled */
836
    if(tmp_hal_status != HAL_OK)
837
    {
838
      /* Update ADC state machine to error */
839
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
840
 
841
      /* Process unlocked */
842
      __HAL_UNLOCK(hadc);
843
 
844
      return HAL_ERROR;
845
    }
846
 
847
    /* Disable ADC DMA mode */
848
    CLEAR_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
849
 
850
    /* Reset configuration of ADC DMA continuous request for dual mode */
851
    CLEAR_BIT(hadc->Instance->CR1, ADC_CR1_DUALMOD);
852
 
853
    /* Disable the DMA channel (in case of DMA in circular mode or stop while */
854
    /* while DMA transfer is on going)                                        */
855
    tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
856
 
857
    /* Change ADC state (ADC master) */
858
    ADC_STATE_CLR_SET(hadc->State,
859
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
860
                      HAL_ADC_STATE_READY);
861
  }
862
 
863
  /* Process unlocked */
864
  __HAL_UNLOCK(hadc);
865
 
866
  /* Return function status */
867
  return tmp_hal_status;
868
}
869
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
870
 
871
/**
872
  * @brief  Get ADC injected group conversion result.
873
  * @note   Reading register JDRx automatically clears ADC flag JEOC
874
  *         (ADC group injected end of unitary conversion).
875
  * @note   This function does not clear ADC flag JEOS
876
  *         (ADC group injected end of sequence conversion)
877
  *         Occurrence of flag JEOS rising:
878
  *          - If sequencer is composed of 1 rank, flag JEOS is equivalent
879
  *            to flag JEOC.
880
  *          - If sequencer is composed of several ranks, during the scan
881
  *            sequence flag JEOC only is raised, at the end of the scan sequence
882
  *            both flags JEOC and EOS are raised.
883
  *         Flag JEOS must not be cleared by this function because
884
  *         it would not be compliant with low power features
885
  *         (feature low power auto-wait, not available on all STM32 families).
886
  *         To clear this flag, either use function:
887
  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
888
  *         model polling: @ref HAL_ADCEx_InjectedPollForConversion()
889
  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
890
  * @param  hadc: ADC handle
891
  * @param  InjectedRank: the converted ADC injected rank.
892
  *          This parameter can be one of the following values:
893
  *            @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
894
  *            @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
895
  *            @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
896
  *            @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
897
  * @retval ADC group injected conversion data
898
  */
899
uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
900
{
901
  uint32_t tmp_jdr = 0U;
902
 
903
  /* Check the parameters */
904
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
905
  assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
906
 
907
  /* Get ADC converted value */
908
  switch(InjectedRank)
909
  {  
910
    case ADC_INJECTED_RANK_4:
911
      tmp_jdr = hadc->Instance->JDR4;
912
      break;
913
    case ADC_INJECTED_RANK_3:
914
      tmp_jdr = hadc->Instance->JDR3;
915
      break;
916
    case ADC_INJECTED_RANK_2:
917
      tmp_jdr = hadc->Instance->JDR2;
918
      break;
919
    case ADC_INJECTED_RANK_1:
920
    default:
921
      tmp_jdr = hadc->Instance->JDR1;
922
      break;
923
  }
924
 
925
  /* Return ADC converted value */
926
  return tmp_jdr;
927
}
928
 
929
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
930
/**
931
  * @brief  Returns the last ADC Master&Slave regular conversions results data
932
  *         in the selected multi mode.
933
  * @param  hadc: ADC handle of ADC master (handle of ADC slave must not be used)
934
  * @retval The converted data value.
935
  */
936
uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
937
{
938
  uint32_t tmpDR = 0U;
939
 
940
  /* Check the parameters */
941
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
942
 
943
  /* Check the parameters */
944
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
945
 
946
  /* Note: EOC flag is not cleared here by software because automatically     */
947
  /*       cleared by hardware when reading register DR.                      */
948
 
949
  /* On STM32F1 devices, ADC1 data register DR contains ADC2 conversions      */
950
  /* only if ADC1 DMA mode is enabled.                                        */
951
  tmpDR = hadc->Instance->DR;
952
 
953
  if (HAL_IS_BIT_CLR(ADC1->CR2, ADC_CR2_DMA))
954
  {
955
    tmpDR |= (ADC2->DR << 16U);
956
  }
957
 
958
  /* Return ADC converted value */
959
  return tmpDR;
960
}
961
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
962
 
963
/**
964
  * @brief  Injected conversion complete callback in non blocking mode
965
  * @param  hadc: ADC handle
966
  * @retval None
967
  */
968
__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
969
{
970
  /* Prevent unused argument(s) compilation warning */
971
  UNUSED(hadc);
972
  /* NOTE : This function Should not be modified, when the callback is needed,
973
            the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
974
  */
975
}
976
 
977
/**
978
  * @}
979
  */
980
 
981
/** @defgroup ADCEx_Exported_Functions_Group2 Extended Peripheral Control functions
982
  * @brief    Extended Peripheral Control functions
983
  *
984
@verbatim  
985
 ===============================================================================
986
             ##### Peripheral Control functions #####
987
 ===============================================================================  
988
    [..]  This section provides functions allowing to:
989
      (+) Configure channels on injected group
990
      (+) Configure multimode
991
 
992
@endverbatim
993
  * @{
994
  */
995
 
996
/**
997
  * @brief  Configures the ADC injected group and the selected channel to be
998
  *         linked to the injected group.
999
  * @note   Possibility to update parameters on the fly:
1000
  *         This function initializes injected group, following calls to this
1001
  *         function can be used to reconfigure some parameters of structure
1002
  *         "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
1003
  *         The setting of these parameters is conditioned to ADC state:
1004
  *         this function must be called when ADC is not under conversion.
1005
  * @param  hadc: ADC handle
1006
  * @param  sConfigInjected: Structure of ADC injected group and ADC channel for
1007
  *         injected group.
1008
  * @retval None
1009
  */
1010
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
1011
{
1012
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1013
  __IO uint32_t wait_loop_index = 0U;
1014
 
1015
  /* Check the parameters */
1016
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1017
  assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
1018
  assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
1019
  assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
1020
  assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
1021
  assert_param(IS_ADC_RANGE(sConfigInjected->InjectedOffset));
1022
 
1023
  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
1024
  {
1025
    assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
1026
    assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
1027
    assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
1028
  }
1029
 
1030
  /* Process locked */
1031
  __HAL_LOCK(hadc);
1032
 
1033
  /* Configuration of injected group sequencer:                               */
1034
  /* - if scan mode is disabled, injected channels sequence length is set to  */
1035
  /*   0x00: 1 channel converted (channel on regular rank 1)                  */
1036
  /*   Parameter "InjectedNbrOfConversion" is discarded.                      */
1037
  /*   Note: Scan mode is present by hardware on this device and, if          */
1038
  /*   disabled, discards automatically nb of conversions. Anyway, nb of      */
1039
  /*   conversions is forced to 0x00 for alignment over all STM32 devices.    */
1040
  /* - if scan mode is enabled, injected channels sequence length is set to   */
1041
  /*   parameter "InjectedNbrOfConversion".                                   */
1042
  if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
1043
  {
1044
    if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
1045
    {
1046
      /* Clear the old SQx bits for all injected ranks */
1047
      MODIFY_REG(hadc->Instance->JSQR                             ,
1048
                 ADC_JSQR_JL   |
1049
                 ADC_JSQR_JSQ4 |
1050
                 ADC_JSQR_JSQ3 |
1051
                 ADC_JSQR_JSQ2 |
1052
                 ADC_JSQR_JSQ1                                    ,
1053
                 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
1054
                                  ADC_INJECTED_RANK_1,
1055
                                  0x01U));
1056
    }
1057
    /* If another injected rank than rank1 was intended to be set, and could  */
1058
    /* not due to ScanConvMode disabled, error is reported.                   */
1059
    else
1060
    {
1061
      /* Update ADC state machine to error */
1062
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1063
 
1064
      tmp_hal_status = HAL_ERROR;
1065
    }
1066
  }
1067
  else
1068
  {
1069
    /* Since injected channels rank conv. order depends on total number of   */
1070
    /* injected conversions, selected rank must be below or equal to total   */
1071
    /* number of injected conversions to be updated.                         */
1072
    if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
1073
    {
1074
      /* Clear the old SQx bits for the selected rank */
1075
      /* Set the SQx bits for the selected rank */
1076
      MODIFY_REG(hadc->Instance->JSQR                                         ,
1077
 
1078
                 ADC_JSQR_JL                                               |
1079
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
1080
                                  sConfigInjected->InjectedRank,        
1081
                                  sConfigInjected->InjectedNbrOfConversion)   ,
1082
 
1083
                 ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion) |
1084
                 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,      
1085
                                  sConfigInjected->InjectedRank,        
1086
                                  sConfigInjected->InjectedNbrOfConversion)    );
1087
    }
1088
    else
1089
    {
1090
      /* Clear the old SQx bits for the selected rank */
1091
      MODIFY_REG(hadc->Instance->JSQR                                       ,
1092
 
1093
                 ADC_JSQR_JL                                               |
1094
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
1095
                                  sConfigInjected->InjectedRank,        
1096
                                  sConfigInjected->InjectedNbrOfConversion) ,
1097
 
1098
                 0x00000000U);
1099
    }
1100
  }
1101
 
1102
  /* Configuration of injected group                                          */
1103
  /* Parameters update conditioned to ADC state:                              */
1104
  /* Parameters that can be updated only when ADC is disabled:                */
1105
  /*  - external trigger to start conversion                                  */
1106
  /* Parameters update not conditioned to ADC state:                          */
1107
  /*  - Automatic injected conversion                                         */
1108
  /*  - Injected discontinuous mode                                           */
1109
  /* Note: In case of ADC already enabled, caution to not launch an unwanted  */
1110
  /*       conversion while modifying register CR2 by writing 1 to bit ADON.  */
1111
  if (ADC_IS_ENABLE(hadc) == RESET)
1112
  {    
1113
    MODIFY_REG(hadc->Instance->CR2                                           ,
1114
               ADC_CR2_JEXTSEL |
1115
               ADC_CR2_ADON                                                  ,
1116
               ADC_CFGR_JEXTSEL(hadc, sConfigInjected->ExternalTrigInjecConv) );
1117
  }
1118
 
1119
 
1120
  /* Configuration of injected group                                          */
1121
  /*  - Automatic injected conversion                                         */
1122
  /*  - Injected discontinuous mode                                           */
1123
 
1124
    /* Automatic injected conversion can be enabled if injected group         */
1125
    /* external triggers are disabled.                                        */
1126
    if (sConfigInjected->AutoInjectedConv == ENABLE)
1127
    {
1128
      if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
1129
      {
1130
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
1131
      }
1132
      else
1133
      {
1134
        /* Update ADC state machine to error */
1135
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1136
 
1137
        tmp_hal_status = HAL_ERROR;
1138
      }
1139
    }
1140
 
1141
    /* Injected discontinuous can be enabled only if auto-injected mode is    */
1142
    /* disabled.                                                              */  
1143
    if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
1144
    {
1145
      if (sConfigInjected->AutoInjectedConv == DISABLE)
1146
      {
1147
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
1148
      }
1149
      else
1150
      {
1151
        /* Update ADC state machine to error */
1152
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1153
 
1154
        tmp_hal_status = HAL_ERROR;
1155
      }
1156
    }
1157
 
1158
 
1159
  /* InjectedChannel sampling time configuration */
1160
  /* For channels 10 to 17 */
1161
  if (sConfigInjected->InjectedChannel >= ADC_CHANNEL_10)
1162
  {
1163
    MODIFY_REG(hadc->Instance->SMPR1                                                             ,
1164
               ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel)                      ,
1165
               ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
1166
  }
1167
  else /* For channels 0 to 9 */
1168
  {
1169
    MODIFY_REG(hadc->Instance->SMPR2                                                             ,
1170
               ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel)                       ,
1171
               ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
1172
  }
1173
 
1174
  /* If ADC1 InjectedChannel_16 or InjectedChannel_17 is selected, enable Temperature sensor  */
1175
  /* and VREFINT measurement path.                                            */
1176
  if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
1177
      (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)      )
1178
  {
1179
    SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
1180
  }
1181
 
1182
 
1183
  /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
1184
  switch(sConfigInjected->InjectedRank)
1185
  {
1186
    case 1:
1187
      /* Set injected channel 1 offset */
1188
      MODIFY_REG(hadc->Instance->JOFR1,
1189
                 ADC_JOFR1_JOFFSET1,
1190
                 sConfigInjected->InjectedOffset);
1191
      break;
1192
    case 2:
1193
      /* Set injected channel 2 offset */
1194
      MODIFY_REG(hadc->Instance->JOFR2,
1195
                 ADC_JOFR2_JOFFSET2,
1196
                 sConfigInjected->InjectedOffset);
1197
      break;
1198
    case 3:
1199
      /* Set injected channel 3 offset */
1200
      MODIFY_REG(hadc->Instance->JOFR3,
1201
                 ADC_JOFR3_JOFFSET3,
1202
                 sConfigInjected->InjectedOffset);
1203
      break;
1204
    case 4:
1205
    default:
1206
      MODIFY_REG(hadc->Instance->JOFR4,
1207
                 ADC_JOFR4_JOFFSET4,
1208
                 sConfigInjected->InjectedOffset);
1209
      break;
1210
  }
1211
 
1212
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
1213
  /* and VREFINT measurement path.                                            */
1214
  if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
1215
      (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)      )
1216
  {
1217
    /* For STM32F1 devices with several ADC: Only ADC1 can access internal    */
1218
    /* measurement channels (VrefInt/TempSensor). If these channels are       */
1219
    /* intended to be set on other ADC instances, an error is reported.       */
1220
    if (hadc->Instance == ADC1)
1221
    {
1222
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
1223
      {
1224
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
1225
 
1226
        if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
1227
        {
1228
          /* Delay for temperature sensor stabilization time */
1229
          /* Compute number of CPU cycles to wait for */
1230
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
1231
          while(wait_loop_index != 0U)
1232
          {
1233
            wait_loop_index--;
1234
          }
1235
        }
1236
      }
1237
    }
1238
    else
1239
    {
1240
      /* Update ADC state machine to error */
1241
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1242
 
1243
      tmp_hal_status = HAL_ERROR;
1244
    }
1245
  }
1246
 
1247
  /* Process unlocked */
1248
  __HAL_UNLOCK(hadc);
1249
 
1250
  /* Return function status */
1251
  return tmp_hal_status;
1252
}
1253
 
1254
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
1255
/**
1256
  * @brief  Enable ADC multimode and configure multimode parameters
1257
  * @note   Possibility to update parameters on the fly:
1258
  *         This function initializes multimode parameters, following  
1259
  *         calls to this function can be used to reconfigure some parameters
1260
  *         of structure "ADC_MultiModeTypeDef" on the fly, without reseting
1261
  *         the ADCs (both ADCs of the common group).
1262
  *         The setting of these parameters is conditioned to ADC state.
1263
  *         For parameters constraints, see comments of structure
1264
  *         "ADC_MultiModeTypeDef".
1265
  * @note   To change back configuration from multimode to single mode, ADC must
1266
  *         be reset (using function HAL_ADC_Init() ).
1267
  * @param  hadc: ADC handle
1268
  * @param  multimode: Structure of ADC multimode configuration
1269
  * @retval HAL status
1270
  */
1271
HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
1272
{
1273
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1274
  ADC_HandleTypeDef tmphadcSlave={0};
1275
 
1276
  /* Check the parameters */
1277
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1278
  assert_param(IS_ADC_MODE(multimode->Mode));
1279
 
1280
  /* Process locked */
1281
  __HAL_LOCK(hadc);
1282
 
1283
  /* Set a temporary handle of the ADC slave associated to the ADC master     */
1284
  ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
1285
 
1286
  /* Parameters update conditioned to ADC state:                              */
1287
  /* Parameters that can be updated when ADC is disabled or enabled without   */
1288
  /* conversion on going on regular group:                                    */
1289
  /*  - ADC master and ADC slave DMA configuration                            */
1290
  /* Parameters that can be updated only when ADC is disabled:                */
1291
  /*  - Multimode mode selection                                              */
1292
  /* To optimize code, all multimode settings can be set when both ADCs of    */
1293
  /* the common group are in state: disabled.                                 */
1294
  if ((ADC_IS_ENABLE(hadc) == RESET)                     &&
1295
      (ADC_IS_ENABLE(&tmphadcSlave) == RESET)            &&
1296
      (IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance))   )
1297
  {
1298
    MODIFY_REG(hadc->Instance->CR1,
1299
               ADC_CR1_DUALMOD    ,
1300
               multimode->Mode     );
1301
  }
1302
  /* If one of the ADC sharing the same common group is enabled, no update    */
1303
  /* could be done on neither of the multimode structure parameters.          */
1304
  else
1305
  {
1306
    /* Update ADC state machine to error */
1307
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1308
 
1309
    tmp_hal_status = HAL_ERROR;
1310
  }
1311
 
1312
 
1313
  /* Process unlocked */
1314
  __HAL_UNLOCK(hadc);
1315
 
1316
  /* Return function status */
1317
  return tmp_hal_status;
1318
}
1319
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
1320
/**
1321
  * @}
1322
  */  
1323
 
1324
/**
1325
  * @}
1326
  */
1327
 
1328
#endif /* HAL_ADC_MODULE_ENABLED */
1329
/**
1330
  * @}
1331
  */
1332
 
1333
/**
1334
  * @}
1335
  */
1336
 
1337
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/