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/**

  ******************************************************************************

  * @file    stm32f1xx_hal_adc.c

  * @author  MCD Application Team

  * @version V1.0.1

  * @date    31-July-2015

  * @brief   This file provides firmware functions to manage the following

  *          functionalities of the Analog to Digital Convertor (ADC)

  *          peripheral:

  *           + Initialization and de-initialization functions

  *             ++ Initialization and Configuration of ADC

  *           + Operation functions

  *             ++ Start, stop, get result of conversions of regular

  *                group, using 3 possible modes: polling, interruption or DMA.

  *           + Control functions

  *             ++ Channels configuration on regular group

  *             ++ Channels configuration on injected group

  *             ++ Analog Watchdog configuration

  *           + State functions

  *             ++ ADC state machine management

  *             ++ Interrupts and flags management

  *          Other functions (extended functions) are available in file

  *          "stm32f1xx_hal_adc_ex.c".

  *

  @verbatim

  ==============================================================================

                     ##### ADC peripheral features #####

  ==============================================================================

  [..]

  (+) 12-bit resolution

  (+) Interrupt generation at the end of regular conversion, end of injected

      conversion, and in case of analog watchdog or overrun events.

  (+) Single and continuous conversion modes.

  (+) Scan mode for conversion of several channels sequentially.

  (+) Data alignment with in-built data coherency.

  (+) Programmable sampling time (channel wise)

  (+) ADC conversion of regular group and injected group.

  (+) External trigger (timer or EXTI)

      for both regular and injected groups.

  (+) DMA request generation for transfer of conversions data of regular group.

  (+) Multimode Dual mode (available on devices with 2 ADCs or more).

  (+) Configurable DMA data storage in Multimode Dual mode (available on devices

      with 2 DCs or more).

  (+) Configurable delay between conversions in Dual interleaved mode (available

      on devices with 2 DCs or more).

  (+) ADC calibration

  (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at

      slower speed.

  (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to

      Vdda or to an external voltage reference).

                     ##### How to use this driver #####

  ==============================================================================

    [..]

     *** Configuration of top level parameters related to ADC ***

     ============================================================

     [..]

    (#) Enable the ADC interface

      (++) As prerequisite, ADC clock must be configured at RCC top level.

           Caution: On STM32F1, ADC clock frequency max is 14MHz (refer

                    to device datasheet).

                    Therefore, ADC clock prescaler must be configured in

                    function of ADC clock source frequency to remain below

                    this maximum frequency.

        (++) One clock setting is mandatory:

             ADC clock (core clock, also possibly conversion clock).

             (+++) Example:

                   Into HAL_ADC_MspInit() (recommended code location) or with

                   other device clock parameters configuration:

               (+++) RCC_PeriphCLKInitTypeDef  PeriphClkInit;

               (+++) __ADC1_CLK_ENABLE();

               (+++) PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;

               (+++) PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV2;

               (+++) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);

    (#) ADC pins configuration

         (++) Enable the clock for the ADC GPIOs

              using macro __HAL_RCC_GPIOx_CLK_ENABLE()

         (++) Configure these ADC pins in analog mode

              using function HAL_GPIO_Init()

    (#) Optionally, in case of usage of ADC with interruptions:

         (++) Configure the NVIC for ADC

              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)

         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()

              into the function of corresponding ADC interruption vector

              ADCx_IRQHandler().

    (#) Optionally, in case of usage of DMA:

         (++) Configure the DMA (DMA channel, mode normal or circular, ...)

              using function HAL_DMA_Init().

         (++) Configure the NVIC for DMA

              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)

         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()

              into the function of corresponding DMA interruption vector

              DMAx_Channelx_IRQHandler().

     *** Configuration of ADC, groups regular/injected, channels parameters ***

     ==========================================================================

     [..]

    (#) Configure the ADC parameters (resolution, data alignment, ...)

        and regular group parameters (conversion trigger, sequencer, ...)

        using function HAL_ADC_Init().

    (#) Configure the channels for regular group parameters (channel number,

        channel rank into sequencer, ..., into regular group)

        using function HAL_ADC_ConfigChannel().

    (#) Optionally, configure the injected group parameters (conversion trigger,

        sequencer, ..., of injected group)

        and the channels for injected group parameters (channel number,

        channel rank into sequencer, ..., into injected group)

        using function HAL_ADCEx_InjectedConfigChannel().

    (#) Optionally, configure the analog watchdog parameters (channels

        monitored, thresholds, ...)

        using function HAL_ADC_AnalogWDGConfig().

    (#) Optionally, for devices with several ADC instances: configure the

        multimode parameters

        using function HAL_ADCEx_MultiModeConfigChannel().

     *** Execution of ADC conversions ***

     ====================================

     [..]

    (#) Optionally, perform an automatic ADC calibration to improve the

        conversion accuracy

        using function HAL_ADCEx_Calibration_Start().

    (#) ADC driver can be used among three modes: polling, interruption,

        transfer by DMA.

        (++) ADC conversion by polling:

          (+++) Activate the ADC peripheral and start conversions

                using function HAL_ADC_Start()

          (+++) Wait for ADC conversion completion

                using function HAL_ADC_PollForConversion()

                (or for injected group: HAL_ADCEx_InjectedPollForConversion() )

          (+++) Retrieve conversion results

                using function HAL_ADC_GetValue()

                (or for injected group: HAL_ADCEx_InjectedGetValue() )

          (+++) Stop conversion and disable the ADC peripheral

                using function HAL_ADC_Stop()

        (++) ADC conversion by interruption:

          (+++) Activate the ADC peripheral and start conversions

                using function HAL_ADC_Start_IT()

          (+++) Wait for ADC conversion completion by call of function

                HAL_ADC_ConvCpltCallback()

                (this function must be implemented in user program)

                (or for injected group: HAL_ADCEx_InjectedConvCpltCallback() )

          (+++) Retrieve conversion results

                using function HAL_ADC_GetValue()

                (or for injected group: HAL_ADCEx_InjectedGetValue() )

          (+++) Stop conversion and disable the ADC peripheral

                using function HAL_ADC_Stop_IT()

        (++) ADC conversion with transfer by DMA:

          (+++) Activate the ADC peripheral and start conversions

                using function HAL_ADC_Start_DMA()

          (+++) Wait for ADC conversion completion by call of function

                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()

                (these functions must be implemented in user program)

          (+++) Conversion results are automatically transferred by DMA into

                destination variable address.

          (+++) Stop conversion and disable the ADC peripheral

                using function HAL_ADC_Stop_DMA()

        (++) For devices with several ADCs: ADC multimode conversion

             with transfer by DMA:

          (+++) Activate the ADC peripheral (slave) and start conversions

                using function HAL_ADC_Start()

          (+++) Activate the ADC peripheral (master) and start conversions

                using function HAL_ADCEx_MultiModeStart_DMA()

          (+++) Wait for ADC conversion completion by call of function

                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()

                (these functions must be implemented in user program)

          (+++) Conversion results are automatically transferred by DMA into

                destination variable address.

          (+++) Stop conversion and disable the ADC peripheral (master)

                using function HAL_ADCEx_MultiModeStop_DMA()

          (+++) Stop conversion and disable the ADC peripheral (slave)

                using function HAL_ADC_Stop_IT()

     [..]

    (@) Callback functions must be implemented in user program:

      (+@) HAL_ADC_ErrorCallback()

      (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)

      (+@) HAL_ADC_ConvCpltCallback()

      (+@) HAL_ADC_ConvHalfCpltCallback

      (+@) HAL_ADCEx_InjectedConvCpltCallback()

     *** Deinitialization of ADC ***

     ============================================================

     [..]

    (#) Disable the ADC interface

      (++) ADC clock can be hard reset and disabled at RCC top level.

        (++) Hard reset of ADC peripherals

             using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().

        (++) ADC clock disable

             using the equivalent macro/functions as configuration step.

             (+++) Example:

                   Into HAL_ADC_MspDeInit() (recommended code location) or with

                   other device clock parameters configuration:

               (+++) PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC

               (+++) PeriphClkInit.AdcClockSelection = RCC_ADCPLLCLK2_OFF

               (+++) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit)

    (#) ADC pins configuration

         (++) Disable the clock for the ADC GPIOs

              using macro __HAL_RCC_GPIOx_CLK_DISABLE()

    (#) Optionally, in case of usage of ADC with interruptions:

         (++) Disable the NVIC for ADC

              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)

    (#) Optionally, in case of usage of DMA:

         (++) Deinitialize the DMA

              using function HAL_DMA_Init().

         (++) Disable the NVIC for DMA

              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)

    [..]

    @endverbatim

  ******************************************************************************

  * @attention

  *

  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>

  *

  * Redistribution and use in source and binary forms, with or without modification,

  * are permitted provided that the following conditions are met:

  *   1. Redistributions of source code must retain the above copyright notice,

  *      this list of conditions and the following disclaimer.

  *   2. Redistributions in binary form must reproduce the above copyright notice,

  *      this list of conditions and the following disclaimer in the documentation

  *      and/or other materials provided with the distribution.

  *   3. Neither the name of STMicroelectronics nor the names of its contributors

  *      may be used to endorse or promote products derived from this software

  *      without specific prior written permission.

  *

  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE

  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

  *

  ******************************************************************************  

  */

/* Includes ------------------------------------------------------------------*/

#include "stm32f1xx_hal.h"

/** @addtogroup STM32F1xx_HAL_Driver

  * @{

  */

/** @defgroup ADC ADC

  * @brief ADC HAL module driver

  * @{

  */

#ifdef HAL_ADC_MODULE_ENABLED

/* Private typedef -----------------------------------------------------------*/

/* Private define ------------------------------------------------------------*/

/** @defgroup ADC_Private_Constants ADC Private Constants

  * @{

  */

  /* Timeout values for ADC enable and disable settling time.                 */

  /* Values defined to be higher than worst cases: low clocks freq,           */

  /* maximum prescaler.                                                       */

  /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock         */

  /* prescaler 4, sampling time 12.5 ADC clock cycles, resolution 12 bits.    */

  /* Unit: ms                                                                 */

  #define ADC_ENABLE_TIMEOUT              ((uint32_t) 2)

  #define ADC_DISABLE_TIMEOUT             ((uint32_t) 2)

  /* Delay for ADC stabilization time.                                        */

  /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB).       */

  /* Unit: us                                                                 */

  #define ADC_STAB_DELAY_US               ((uint32_t) 1)

  /* Delay for temperature sensor stabilization time.                         */

  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */

  /* Unit: us                                                                 */

  #define ADC_TEMPSENSOR_DELAY_US         ((uint32_t) 10)

/**

  * @}

  */

/* Private macro -------------------------------------------------------------*/

/* Private variables ---------------------------------------------------------*/

/* Private function prototypes -----------------------------------------------*/

/** @defgroup ADC_Private_Functions ADC Private Functions

  * @{

  */

/**

  * @}

  */

/* Exported functions --------------------------------------------------------*/

/** @defgroup ADC_Exported_Functions ADC Exported Functions

  * @{

  */

/** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions

  * @brief    Initialization and Configuration functions

  *

@verbatim    

 ===============================================================================

              ##### Initialization and de-initialization functions #####

 ===============================================================================

    [..]  This section provides functions allowing to:

      (+) Initialize and configure the ADC.

      (+) De-initialize the ADC.

@endverbatim

  * @{

  */

/**

  * @brief  Initializes the ADC peripheral and regular group according to  

  *         parameters specified in structure "ADC_InitTypeDef".

  * @note   As prerequisite, ADC clock must be configured at RCC top level

  *         (clock source APB2).

  *         See commented example code below that can be copied and uncommented

  *         into HAL_ADC_MspInit().

  * @note   Possibility to update parameters on the fly:

  *         This function initializes the ADC MSP (HAL_ADC_MspInit()) only when

  *         coming from ADC state reset. Following calls to this function can

  *         be used to reconfigure some parameters of ADC_InitTypeDef  

  *         structure on the fly, without modifying MSP configuration. If ADC  

  *         MSP has to be modified again, HAL_ADC_DeInit() must be called

  *         before HAL_ADC_Init().

  *         The setting of these parameters is conditioned to ADC state.

  *         For parameters constraints, see comments of structure

  *         "ADC_InitTypeDef".

  * @note   This function configures the ADC within 2 scopes: scope of entire

  *         ADC and scope of regular group. For parameters details, see comments

  *         of structure "ADC_InitTypeDef".

  * @param  hadc: ADC handle

  * @retval HAL status

  */

HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)

{

  HAL_StatusTypeDef tmp_hal_status = HAL_OK;

  uint32_t tmp_cr1 = 0;

  uint32_t tmp_cr2 = 0;

  uint32_t tmp_sqr1 = 0;

  /* Check ADC handle */

  if(hadc == NULL)

  {

    return HAL_ERROR;

  }

  /* Check the parameters */

  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));

  assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));

  assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));

  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));

  assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));

  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)

  {

    assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));

    assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));

    assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));

  }

  /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured    */

  /* at RCC top level.                                                        */

  /* Refer to header of this file for more details on clock enabling          */

  /* procedure.                                                               */

  /* Actions performed only if ADC is coming from state reset:                */

  /* - Initialization of ADC MSP                                              */

  if (hadc->State == HAL_ADC_STATE_RESET)

  {

    /* Initialize ADC error code */

    ADC_CLEAR_ERRORCODE(hadc);

    /* Allocate lock resource and initialize it */

    hadc->Lock = HAL_UNLOCKED;

    /* Init the low level hardware */

    HAL_ADC_MspInit(hadc);

  }

  /* Stop potential conversion on going, on regular and injected groups */

  /* Disable ADC peripheral */

  /* Note: In case of ADC already enabled, precaution to not launch an        */

  /*       unwanted conversion while modifying register CR2 by writing 1 to   */

  /*       bit ADON.                                                          */

  tmp_hal_status = ADC_ConversionStop_Disable(hadc);

  /* Configuration of ADC parameters if previous preliminary actions are      */

  /* correctly completed.                                                     */

  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&

      (tmp_hal_status == HAL_OK)                                  )

  {

    /* Set ADC state */

    ADC_STATE_CLR_SET(hadc->State,

                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,

                      HAL_ADC_STATE_BUSY_INTERNAL);

    /* Set ADC parameters */

    /* Configuration of ADC:                                                  */

    /*  - data alignment                                                      */

    /*  - external trigger to start conversion                                */

    /*  - external trigger polarity (always set to 1, because needed for all  */

    /*    triggers: external trigger of SW start)                             */

    /*  - continuous conversion mode                                          */

    /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into          */

    /*       HAL_ADC_Start_xxx functions because if set in this function,     */

    /*       a conversion on injected group would start a conversion also on  */

    /*       regular group after ADC enabling.                                */

    tmp_cr2 |= (hadc->Init.DataAlign                               |

                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |

                ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode)   );

    /* Configuration of ADC:                                                  */

    /*  - scan mode                                                           */

    /*  - discontinuous mode disable/enable                                   */

    /*  - discontinuous mode number of conversions                            */

    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));

    /* Enable discontinuous mode only if continuous mode is disabled */

    if (hadc->Init.DiscontinuousConvMode == ENABLE)

    {

      if (hadc->Init.ContinuousConvMode == DISABLE)

      {

        /* Enable the selected ADC regular discontinuous mode */

        /* Set the number of channels to be converted in discontinuous mode */

        SET_BIT(tmp_cr1, ADC_CR1_DISCEN                                            |

                         ADC_CR1_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion)  );

      }

      else

      {

        /* ADC regular group settings continuous and sequencer discontinuous*/

        /* cannot be enabled simultaneously.                                */

        /* Update ADC state machine to error */

        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);

        /* Set ADC error code to ADC IP internal error */

        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);

      }

    }

    /* Update ADC configuration register CR1 with previous settings */

      MODIFY_REG(hadc->Instance->CR1,

                 ADC_CR1_SCAN    |

                 ADC_CR1_DISCEN  |

                 ADC_CR1_DISCNUM    ,

                 tmp_cr1             );

    /* Update ADC configuration register CR2 with previous settings */

      MODIFY_REG(hadc->Instance->CR2,

                 ADC_CR2_ALIGN   |

                 ADC_CR2_EXTSEL  |

                 ADC_CR2_EXTTRIG |

                 ADC_CR2_CONT       ,

                 tmp_cr2             );

    /* Configuration of regular group sequencer:                              */

    /* - if scan mode is disabled, regular channels sequence length is set to */

    /*   0x00: 1 channel converted (channel on regular rank 1)                */

    /*   Parameter "NbrOfConversion" is discarded.                            */

    /*   Note: Scan mode is present by hardware on this device and, if        */

    /*   disabled, discards automatically nb of conversions. Anyway, nb of    */

    /*   conversions is forced to 0x00 for alignment over all STM32 devices.  */

    /* - if scan mode is enabled, regular channels sequence length is set to  */

    /*   parameter "NbrOfConversion"                                          */

    if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE)

    {

      tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);

    }

    MODIFY_REG(hadc->Instance->SQR1,

               ADC_SQR1_L          ,

               tmp_sqr1             );

    /* Check back that ADC registers have effectively been configured to      */

    /* ensure of no potential problem of ADC core IP clocking.                */

    /* Check through register CR2 (excluding bits set in other functions:     */

    /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits   */

    /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal    */

    /* measurement path bit (TSVREFE).                                        */

    if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |

                                        ADC_CR2_SWSTART | ADC_CR2_JSWSTART |

                                        ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |

                                        ADC_CR2_TSVREFE                     ))

         == tmp_cr2)

    {

      /* Set ADC error code to none */

      ADC_CLEAR_ERRORCODE(hadc);

      /* Set the ADC state */

      ADC_STATE_CLR_SET(hadc->State,

                        HAL_ADC_STATE_BUSY_INTERNAL,

                        HAL_ADC_STATE_READY);

    }

    else

    {

      /* Update ADC state machine to error */

      ADC_STATE_CLR_SET(hadc->State,

                        HAL_ADC_STATE_BUSY_INTERNAL,

                        HAL_ADC_STATE_ERROR_INTERNAL);

      /* Set ADC error code to ADC IP internal error */

      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);

      tmp_hal_status = HAL_ERROR;

    }

  }

  else

  {

    /* Update ADC state machine to error */

    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);

    tmp_hal_status = HAL_ERROR;

  }

  /* Return function status */

  return tmp_hal_status;

}

/**

  * @brief  Deinitialize the ADC peripheral registers to their default reset

  *         values, with deinitialization of the ADC MSP.

  *         If needed, the example code can be copied and uncommented into

  *         function HAL_ADC_MspDeInit().

  * @param  hadc: ADC handle

  * @retval HAL status

  */

HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)

{

  HAL_StatusTypeDef tmp_hal_status = HAL_OK;

  /* Check ADC handle */

  if(hadc == NULL)

  {

     return HAL_ERROR;

  }

  /* Check the parameters */

  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));

  /* Set ADC state */

  SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);

  /* Stop potential conversion on going, on regular and injected groups */

  /* Disable ADC peripheral */

  tmp_hal_status = ADC_ConversionStop_Disable(hadc);

  /* Configuration of ADC parameters if previous preliminary actions are      */

  /* correctly completed.                                                     */

  if (tmp_hal_status == HAL_OK)

  {

    /* ========== Reset ADC registers ========== */

    /* Reset register SR */

    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_JEOC | ADC_FLAG_EOC |

                                ADC_FLAG_JSTRT | ADC_FLAG_STRT));

    /* Reset register CR1 */

    CLEAR_BIT(hadc->Instance->CR1, (ADC_CR1_AWDEN   | ADC_CR1_JAWDEN | ADC_CR1_DISCNUM |

                                    ADC_CR1_JDISCEN | ADC_CR1_DISCEN | ADC_CR1_JAUTO   |

                                    ADC_CR1_AWDSGL  | ADC_CR1_SCAN   | ADC_CR1_JEOCIE  |  

                                    ADC_CR1_AWDIE   | ADC_CR1_EOCIE  | ADC_CR1_AWDCH    ));

    /* Reset register CR2 */

    CLEAR_BIT(hadc->Instance->CR2, (ADC_CR2_TSVREFE | ADC_CR2_SWSTART | ADC_CR2_JSWSTART |

                                    ADC_CR2_EXTTRIG | ADC_CR2_EXTSEL  | ADC_CR2_JEXTTRIG |  

                                    ADC_CR2_JEXTSEL | ADC_CR2_ALIGN   | ADC_CR2_DMA      |        

                                    ADC_CR2_RSTCAL  | ADC_CR2_CAL     | ADC_CR2_CONT     |          

                                    ADC_CR2_ADON                                          ));

    /* Reset register SMPR1 */

    CLEAR_BIT(hadc->Instance->SMPR1, (ADC_SMPR1_SMP17 | ADC_SMPR1_SMP16 | ADC_SMPR1_SMP15 |

                                      ADC_SMPR1_SMP14 | ADC_SMPR1_SMP13 | ADC_SMPR1_SMP12 |

                                      ADC_SMPR1_SMP11 | ADC_SMPR1_SMP10                    ));

    /* Reset register SMPR2 */

    CLEAR_BIT(hadc->Instance->SMPR2, (ADC_SMPR2_SMP9 | ADC_SMPR2_SMP8 | ADC_SMPR2_SMP7 |

                                      ADC_SMPR2_SMP6 | ADC_SMPR2_SMP5 | ADC_SMPR2_SMP4 |

                                      ADC_SMPR2_SMP3 | ADC_SMPR2_SMP2 | ADC_SMPR2_SMP1 |

                                      ADC_SMPR2_SMP0                                    ));

    /* Reset register JOFR1 */

    CLEAR_BIT(hadc->Instance->JOFR1, ADC_JOFR1_JOFFSET1);

    /* Reset register JOFR2 */

    CLEAR_BIT(hadc->Instance->JOFR2, ADC_JOFR2_JOFFSET2);

    /* Reset register JOFR3 */

    CLEAR_BIT(hadc->Instance->JOFR3, ADC_JOFR3_JOFFSET3);

    /* Reset register JOFR4 */

    CLEAR_BIT(hadc->Instance->JOFR4, ADC_JOFR4_JOFFSET4);

    /* Reset register HTR */

    CLEAR_BIT(hadc->Instance->HTR, ADC_HTR_HT);

    /* Reset register LTR */

    CLEAR_BIT(hadc->Instance->LTR, ADC_LTR_LT);

    /* Reset register SQR1 */

    CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L    |

                                    ADC_SQR1_SQ16 | ADC_SQR1_SQ15 |

                                    ADC_SQR1_SQ14 | ADC_SQR1_SQ13  );

    /* Reset register SQR1 */

    CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L    |

                                    ADC_SQR1_SQ16 | ADC_SQR1_SQ15 |

                                    ADC_SQR1_SQ14 | ADC_SQR1_SQ13  );

    /* Reset register SQR2 */

    CLEAR_BIT(hadc->Instance->SQR2, ADC_SQR2_SQ12 | ADC_SQR2_SQ11 | ADC_SQR2_SQ10 |

                                    ADC_SQR2_SQ9  | ADC_SQR2_SQ8  | ADC_SQR2_SQ7   );

    /* Reset register SQR3 */

    CLEAR_BIT(hadc->Instance->SQR3, ADC_SQR3_SQ6 | ADC_SQR3_SQ5 | ADC_SQR3_SQ4 |

                                    ADC_SQR3_SQ3 | ADC_SQR3_SQ2 | ADC_SQR3_SQ1  );

    /* Reset register JSQR */

    CLEAR_BIT(hadc->Instance->JSQR, ADC_JSQR_JL |

                                    ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3 |

                                    ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1  );

    /* Reset register JSQR */

    CLEAR_BIT(hadc->Instance->JSQR, ADC_JSQR_JL |

                                    ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3 |

                                    ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1  );

    /* Reset register DR */

    /* bits in access mode read only, no direct reset applicable*/

    /* Reset registers JDR1, JDR2, JDR3, JDR4 */

    /* bits in access mode read only, no direct reset applicable*/

    /* ========== Hard reset ADC peripheral ========== */

    /* Performs a global reset of the entire ADC peripheral: ADC state is     */

    /* forced to a similar state after device power-on.                       */

    /* If needed, copy-paste and uncomment the following reset code into      */

    /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)":              */

    /*                                                                        */

    /*  __HAL_RCC_ADC1_FORCE_RESET()                                          */

    /*  __HAL_RCC_ADC1_RELEASE_RESET()                                        */

    /* DeInit the low level hardware */

    HAL_ADC_MspDeInit(hadc);

    /* Set ADC error code to none */

    ADC_CLEAR_ERRORCODE(hadc);

    /* Set ADC state */

    hadc->State = HAL_ADC_STATE_RESET;

  }

  /* Process unlocked */

  __HAL_UNLOCK(hadc);

  /* Return function status */

  return tmp_hal_status;

}

/**

  * @brief  Initializes the ADC MSP.

  * @param  hadc: ADC handle

  * @retval None

  */

__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)

{

  /* NOTE : This function should not be modified. When the callback is needed,

            function HAL_ADC_MspInit must be implemented in the user file.

   */

}

/**

  * @brief  DeInitializes the ADC MSP.

  * @param  hadc: ADC handle

  * @retval None

  */

__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)

{

  /* NOTE : This function should not be modified. When the callback is needed,

            function HAL_ADC_MspDeInit must be implemented in the user file.

   */

}

/**

  * @}

  */

/** @defgroup ADC_Exported_Functions_Group2 IO operation functions

 *  @brief    Input and Output operation functions

 *

@verbatim  

 ===============================================================================

                      ##### IO operation functions #####

 ===============================================================================

    [..]  This section provides functions allowing to:

      (+) Start conversion of regular group.

      (+) Stop conversion of regular group.

      (+) Poll for conversion complete on regular group.

      (+) Poll for conversion event.

      (+) Get result of regular channel conversion.

      (+) Start conversion of regular group and enable interruptions.

      (+) Stop conversion of regular group and disable interruptions.

      (+) Handle ADC interrupt request

      (+) Start conversion of regular group and enable DMA transfer.

      (+) Stop conversion of regular group and disable ADC DMA transfer.

@endverbatim

  * @{

  */

/**

  * @brief  Enables ADC, starts conversion of regular group.

  *         Interruptions enabled in this function: None.

  * @param  hadc: ADC handle

  * @retval HAL status

  */

HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)

{

  HAL_StatusTypeDef tmp_hal_status = HAL_OK;

  /* Check the parameters */

  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));

  /* Process locked */

  __HAL_LOCK(hadc);

  /* Enable the ADC peripheral */

  tmp_hal_status = ADC_Enable(hadc);

  /* Start conversion if ADC is effectively enabled */

  if (tmp_hal_status == HAL_OK)

  {

    /* Set ADC state                                                          */

    /* - Clear state bitfield related to regular group conversion results     */

    /* - Set state bitfield related to regular operation                      */

    ADC_STATE_CLR_SET(hadc->State,

                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC,

                      HAL_ADC_STATE_REG_BUSY);

    /* Set group injected state (from auto-injection) and multimode state     */

    /* for all cases of multimode: independent mode, multimode ADC master     */

    /* or multimode ADC slave (for devices with several ADCs):                */

    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))

    {

      /* Set ADC state (ADC independent or master) */

      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);

      /* If conversions on group regular are also triggering group injected,  */

      /* update ADC state.                                                    */

      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)

      {

        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  

      }

    }

    else

    {

      /* Set ADC state (ADC slave) */

      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);

      /* If conversions on group regular are also triggering group injected,  */

      /* update ADC state.                                                    */

      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))

      {

        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);

      }

    }

    /* State machine update: Check if an injected conversion is ongoing */

    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))

    {

      /* Reset ADC error code fields related to conversions on group regular */

      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        

    }

    else

    {

      /* Reset ADC all error code fields */

      ADC_CLEAR_ERRORCODE(hadc);

    }

    /* Process unlocked */

    /* Unlock before starting ADC conversions: in case of potential           */

    /* interruption, to let the process to ADC IRQ Handler.                   */

    __HAL_UNLOCK(hadc);

    /* Clear regular group conversion flag */

    /* (To ensure of no unknown state from potential previous ADC operations) */

    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);

    /* Enable conversion of regular group.                                    */

    /* If software start has been selected, conversion starts immediately.    */

    /* If external trigger has been selected, conversion will start at next   */

    /* trigger event.                                                         */

    /* Case of multimode enabled:                                             */

    /*  - if ADC is slave, ADC is enabled only (conversion is not started).   */

    /*  - if ADC is master, ADC is enabled and conversion is started.         */

    /* If ADC is master, ADC is enabled and conversion is started.            */

    /* Note: Alternate trigger for single conversion could be to force an     */

    /*       additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/

    if (ADC_IS_SOFTWARE_START_REGULAR(hadc)      &&

        ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )

    {

      /* Start ADC conversion on regular group with SW start */

      SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));

    }

    else

    {

      /* Start ADC conversion on regular group with external trigger */

      SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);

    }

  }

  else

  {

    /* Process unlocked */

    __HAL_UNLOCK(hadc);

  }

  /* Return function status */

  return tmp_hal_status;

}

/**

  * @brief  Stop ADC conversion of regular group (and injected channels in

  *         case of auto_injection mode), disable ADC peripheral.

  * @note:  ADC peripheral disable is forcing stop of potential

  *         conversion on injected group. If injected group is under use, it

  *         should be preliminarily stopped using HAL_ADCEx_InjectedStop function.

  * @param  hadc: ADC handle

  * @retval HAL status.

  */

HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)

{

  HAL_StatusTypeDef tmp_hal_status = HAL_OK;

  /* Check the parameters */

  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));

  /* Process locked */

  __HAL_LOCK(hadc);

  /* Stop potential conversion on going, on regular and injected groups */

  /* Disable ADC peripheral */

  tmp_hal_status = ADC_ConversionStop_Disable(hadc);

  /* Check if ADC is effectively disabled */

  if (tmp_hal_status == HAL_OK)

  {

    /* Set ADC state */

    ADC_STATE_CLR_SET(hadc->State,

                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,

                      HAL_ADC_STATE_READY);

  }

  /* Process unlocked */

  __HAL_UNLOCK(hadc);

  /* Return function status */

  return tmp_hal_status;

}

/**

  * @brief  Wait for regular group conversion to be completed.

  * @note   This function cannot be used in a particular setup: ADC configured

  *         in DMA mode.

  *         In this case, DMA resets the flag EOC and polling cannot be

  *         performed on each conversion.

  * @note   On STM32F1 devices, limitation in case of sequencer enabled

  *         (several ranks selected): polling cannot be done on each

  *         conversion inside the sequence. In this case, polling is replaced by

  *         wait for maximum conversion time.

  * @param  hadc: ADC handle

  * @param  Timeout: Timeout value in millisecond.

  * @retval HAL status

  */

HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)

{

  uint32_t tickstart = 0;

  /* Variables for polling in case of scan mode enabled and polling for each  */

  /* conversion.                                                              */

  __IO uint32_t Conversion_Timeout_CPU_cycles = 0;

  uint32_t Conversion_Timeout_CPU_cycles_max = 0;

  /* Check the parameters */

  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));

  /* Get tick count */

  tickstart = HAL_GetTick();

  /* Verification that ADC configuration is compliant with polling for        */

  /* each conversion:                                                         */

  /* Particular case is ADC configured in DMA mode                            */

  if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA))

  {

    /* Update ADC state machine to error */

    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);

    /* Process unlocked */