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/**
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  ******************************************************************************
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  * @file    stm32f1xx_ll_pwr.h
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  * @author  MCD Application Team
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  * @brief   Header file of PWR LL module.
6
  ******************************************************************************
7
  * @attention
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  *
9
  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
10
  *
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  * Redistribution and use in source and binary forms, with or without modification,
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  * are permitted provided that the following conditions are met:
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  *   1. Redistributions of source code must retain the above copyright notice,
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  *      this list of conditions and the following disclaimer.
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  *   2. Redistributions in binary form must reproduce the above copyright notice,
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  *      this list of conditions and the following disclaimer in the documentation
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  *      and/or other materials provided with the distribution.
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  *   3. Neither the name of STMicroelectronics nor the names of its contributors
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  *      may be used to endorse or promote products derived from this software
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  *      without specific prior written permission.
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  *
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  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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  *
33
  ******************************************************************************
34
  */
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36
/* Define to prevent recursive inclusion -------------------------------------*/
37
#ifndef __STM32F1xx_LL_PWR_H
38
#define __STM32F1xx_LL_PWR_H
39
 
40
#ifdef __cplusplus
41
extern "C" {
42
#endif
43
 
44
/* Includes ------------------------------------------------------------------*/
45
#include "stm32f1xx.h"
46
 
47
/** @addtogroup STM32F1xx_LL_Driver
48
  * @{
49
  */
50
 
51
#if defined(PWR)
52
 
53
/** @defgroup PWR_LL PWR
54
  * @{
55
  */
56
 
57
/* Private types -------------------------------------------------------------*/
58
/* Private variables ---------------------------------------------------------*/
59
/* Private constants ---------------------------------------------------------*/
60
/* Private macros ------------------------------------------------------------*/
61
/* Exported types ------------------------------------------------------------*/
62
/* Exported constants --------------------------------------------------------*/
63
/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
64
  * @{
65
  */
66
 
67
/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
68
  * @brief    Flags defines which can be used with LL_PWR_WriteReg function
69
  * @{
70
  */
71
#define LL_PWR_CR_CSBF                     PWR_CR_CSBF            /*!< Clear standby flag */
72
#define LL_PWR_CR_CWUF                     PWR_CR_CWUF            /*!< Clear wakeup flag */
73
/**
74
  * @}
75
  */
76
 
77
/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
78
  * @brief    Flags defines which can be used with LL_PWR_ReadReg function
79
  * @{
80
  */
81
#define LL_PWR_CSR_WUF                     PWR_CSR_WUF            /*!< Wakeup flag */
82
#define LL_PWR_CSR_SBF                     PWR_CSR_SBF            /*!< Standby flag */
83
#define LL_PWR_CSR_PVDO                    PWR_CSR_PVDO           /*!< Power voltage detector output flag */
84
#define LL_PWR_CSR_EWUP1                   PWR_CSR_EWUP           /*!< Enable WKUP pin 1 */
85
/**
86
  * @}
87
  */
88
 
89
 
90
/** @defgroup PWR_LL_EC_MODE_PWR Mode Power
91
  * @{
92
  */
93
#define LL_PWR_MODE_STOP_MAINREGU             0x00000000U                    /*!< Enter Stop mode when the CPU enters deepsleep */
94
#define LL_PWR_MODE_STOP_LPREGU               (PWR_CR_LPDS)                  /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
95
#define LL_PWR_MODE_STANDBY                   (PWR_CR_PDDS)                  /*!< Enter Standby mode when the CPU enters deepsleep */
96
/**
97
  * @}
98
  */
99
 
100
/** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE  Regulator Mode In Deep Sleep Mode
101
 * @{
102
 */
103
#define LL_PWR_REGU_DSMODE_MAIN        0x00000000U           /*!< Voltage Regulator in main mode during deepsleep mode */
104
#define LL_PWR_REGU_DSMODE_LOW_POWER   (PWR_CR_LPDS)         /*!< Voltage Regulator in low-power mode during deepsleep mode */
105
/**
106
  * @}
107
  */
108
 
109
/** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
110
  * @{
111
  */
112
#define LL_PWR_PVDLEVEL_0                  (PWR_CR_PLS_LEV0)      /*!< Voltage threshold detected by PVD 2.2 V */
113
#define LL_PWR_PVDLEVEL_1                  (PWR_CR_PLS_LEV1)      /*!< Voltage threshold detected by PVD 2.3 V */
114
#define LL_PWR_PVDLEVEL_2                  (PWR_CR_PLS_LEV2)      /*!< Voltage threshold detected by PVD 2.4 V */
115
#define LL_PWR_PVDLEVEL_3                  (PWR_CR_PLS_LEV3)      /*!< Voltage threshold detected by PVD 2.5 V */
116
#define LL_PWR_PVDLEVEL_4                  (PWR_CR_PLS_LEV4)      /*!< Voltage threshold detected by PVD 2.6 V */
117
#define LL_PWR_PVDLEVEL_5                  (PWR_CR_PLS_LEV5)      /*!< Voltage threshold detected by PVD 2.7 V */
118
#define LL_PWR_PVDLEVEL_6                  (PWR_CR_PLS_LEV6)      /*!< Voltage threshold detected by PVD 2.8 V */
119
#define LL_PWR_PVDLEVEL_7                  (PWR_CR_PLS_LEV7)      /*!< Voltage threshold detected by PVD 2.9 V */
120
/**
121
  * @}
122
  */
123
/** @defgroup PWR_LL_EC_WAKEUP_PIN  Wakeup Pins
124
  * @{
125
  */
126
#define LL_PWR_WAKEUP_PIN1                 (PWR_CSR_EWUP)         /*!< WKUP pin 1 : PA0 */
127
/**
128
  * @}
129
  */
130
 
131
/**
132
  * @}
133
  */
134
 
135
 
136
/* Exported macro ------------------------------------------------------------*/
137
/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
138
  * @{
139
  */
140
 
141
/** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
142
  * @{
143
  */
144
 
145
/**
146
  * @brief  Write a value in PWR register
147
  * @param  __REG__ Register to be written
148
  * @param  __VALUE__ Value to be written in the register
149
  * @retval None
150
  */
151
#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
152
 
153
/**
154
  * @brief  Read a value in PWR register
155
  * @param  __REG__ Register to be read
156
  * @retval Register value
157
  */
158
#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
159
/**
160
  * @}
161
  */
162
 
163
/**
164
  * @}
165
  */
166
 
167
/* Exported functions --------------------------------------------------------*/
168
/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
169
  * @{
170
  */
171
 
172
/** @defgroup PWR_LL_EF_Configuration Configuration
173
  * @{
174
  */
175
 
176
/**
177
  * @brief  Enable access to the backup domain
178
  * @rmtoll CR    DBP       LL_PWR_EnableBkUpAccess
179
  * @retval None
180
  */
181
__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
182
{
183
  SET_BIT(PWR->CR, PWR_CR_DBP);
184
}
185
 
186
/**
187
  * @brief  Disable access to the backup domain
188
  * @rmtoll CR    DBP       LL_PWR_DisableBkUpAccess
189
  * @retval None
190
  */
191
__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
192
{
193
  CLEAR_BIT(PWR->CR, PWR_CR_DBP);
194
}
195
 
196
/**
197
  * @brief  Check if the backup domain is enabled
198
  * @rmtoll CR    DBP       LL_PWR_IsEnabledBkUpAccess
199
  * @retval State of bit (1 or 0).
200
  */
201
__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
202
{
203
  return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
204
}
205
 
206
/**
207
  * @brief  Set voltage Regulator mode during deep sleep mode
208
  * @rmtoll CR    LPDS         LL_PWR_SetRegulModeDS
209
  * @param  RegulMode This parameter can be one of the following values:
210
  *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
211
  *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
212
  * @retval None
213
  */
214
__STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
215
{
216
  MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
217
}
218
 
219
/**
220
  * @brief  Get voltage Regulator mode during deep sleep mode
221
  * @rmtoll CR    LPDS         LL_PWR_GetRegulModeDS
222
  * @retval Returned value can be one of the following values:
223
  *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
224
  *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
225
  */
226
__STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
227
{
228
  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
229
}
230
 
231
/**
232
  * @brief  Set Power Down mode when CPU enters deepsleep
233
  * @rmtoll CR    PDDS         LL_PWR_SetPowerMode\n
234
  * @rmtoll CR    LPDS         LL_PWR_SetPowerMode
235
  * @param  PDMode This parameter can be one of the following values:
236
  *         @arg @ref LL_PWR_MODE_STOP_MAINREGU
237
  *         @arg @ref LL_PWR_MODE_STOP_LPREGU
238
  *         @arg @ref LL_PWR_MODE_STANDBY
239
  * @retval None
240
  */
241
__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
242
{
243
  MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
244
}
245
 
246
/**
247
  * @brief  Get Power Down mode when CPU enters deepsleep
248
  * @rmtoll CR    PDDS         LL_PWR_GetPowerMode\n
249
  * @rmtoll CR    LPDS         LL_PWR_GetPowerMode
250
  * @retval Returned value can be one of the following values:
251
  *         @arg @ref LL_PWR_MODE_STOP_MAINREGU
252
  *         @arg @ref LL_PWR_MODE_STOP_LPREGU
253
  *         @arg @ref LL_PWR_MODE_STANDBY
254
  */
255
__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
256
{
257
  return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
258
}
259
 
260
/**
261
  * @brief  Configure the voltage threshold detected by the Power Voltage Detector
262
  * @rmtoll CR    PLS       LL_PWR_SetPVDLevel
263
  * @param  PVDLevel This parameter can be one of the following values:
264
  *         @arg @ref LL_PWR_PVDLEVEL_0
265
  *         @arg @ref LL_PWR_PVDLEVEL_1
266
  *         @arg @ref LL_PWR_PVDLEVEL_2
267
  *         @arg @ref LL_PWR_PVDLEVEL_3
268
  *         @arg @ref LL_PWR_PVDLEVEL_4
269
  *         @arg @ref LL_PWR_PVDLEVEL_5
270
  *         @arg @ref LL_PWR_PVDLEVEL_6
271
  *         @arg @ref LL_PWR_PVDLEVEL_7
272
  * @retval None
273
  */
274
__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
275
{
276
  MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
277
}
278
 
279
/**
280
  * @brief  Get the voltage threshold detection
281
  * @rmtoll CR    PLS       LL_PWR_GetPVDLevel
282
  * @retval Returned value can be one of the following values:
283
  *         @arg @ref LL_PWR_PVDLEVEL_0
284
  *         @arg @ref LL_PWR_PVDLEVEL_1
285
  *         @arg @ref LL_PWR_PVDLEVEL_2
286
  *         @arg @ref LL_PWR_PVDLEVEL_3
287
  *         @arg @ref LL_PWR_PVDLEVEL_4
288
  *         @arg @ref LL_PWR_PVDLEVEL_5
289
  *         @arg @ref LL_PWR_PVDLEVEL_6
290
  *         @arg @ref LL_PWR_PVDLEVEL_7
291
  */
292
__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
293
{
294
  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
295
}
296
 
297
/**
298
  * @brief  Enable Power Voltage Detector
299
  * @rmtoll CR    PVDE       LL_PWR_EnablePVD
300
  * @retval None
301
  */
302
__STATIC_INLINE void LL_PWR_EnablePVD(void)
303
{
304
  SET_BIT(PWR->CR, PWR_CR_PVDE);
305
}
306
 
307
/**
308
  * @brief  Disable Power Voltage Detector
309
  * @rmtoll CR    PVDE       LL_PWR_DisablePVD
310
  * @retval None
311
  */
312
__STATIC_INLINE void LL_PWR_DisablePVD(void)
313
{
314
  CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
315
}
316
 
317
/**
318
  * @brief  Check if Power Voltage Detector is enabled
319
  * @rmtoll CR    PVDE       LL_PWR_IsEnabledPVD
320
  * @retval State of bit (1 or 0).
321
  */
322
__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
323
{
324
  return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
325
}
326
 
327
/**
328
  * @brief  Enable the WakeUp PINx functionality
329
  * @rmtoll CSR   EWUP       LL_PWR_EnableWakeUpPin
330
  * @param  WakeUpPin This parameter can be one of the following values:
331
  *         @arg @ref LL_PWR_WAKEUP_PIN1
332
  * @retval None
333
  */
334
__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
335
{
336
  SET_BIT(PWR->CSR, WakeUpPin);
337
}
338
 
339
/**
340
  * @brief  Disable the WakeUp PINx functionality
341
  * @rmtoll CSR   EWUP       LL_PWR_DisableWakeUpPin
342
  * @param  WakeUpPin This parameter can be one of the following values:
343
  *         @arg @ref LL_PWR_WAKEUP_PIN1
344
  * @retval None
345
  */
346
__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
347
{
348
  CLEAR_BIT(PWR->CSR, WakeUpPin);
349
}
350
 
351
/**
352
  * @brief  Check if the WakeUp PINx functionality is enabled
353
  * @rmtoll CSR   EWUP       LL_PWR_IsEnabledWakeUpPin
354
  * @param  WakeUpPin This parameter can be one of the following values:
355
  *         @arg @ref LL_PWR_WAKEUP_PIN1
356
  * @retval State of bit (1 or 0).
357
  */
358
__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
359
{
360
  return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
361
}
362
 
363
 
364
/**
365
  * @}
366
  */
367
 
368
/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
369
  * @{
370
  */
371
 
372
/**
373
  * @brief  Get Wake-up Flag
374
  * @rmtoll CSR   WUF       LL_PWR_IsActiveFlag_WU
375
  * @retval State of bit (1 or 0).
376
  */
377
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
378
{
379
  return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
380
}
381
 
382
/**
383
  * @brief  Get Standby Flag
384
  * @rmtoll CSR   SBF       LL_PWR_IsActiveFlag_SB
385
  * @retval State of bit (1 or 0).
386
  */
387
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
388
{
389
  return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
390
}
391
 
392
/**
393
  * @brief  Indicate whether VDD voltage is below the selected PVD threshold
394
  * @rmtoll CSR   PVDO       LL_PWR_IsActiveFlag_PVDO
395
  * @retval State of bit (1 or 0).
396
  */
397
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
398
{
399
  return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
400
}
401
 
402
/**
403
  * @brief  Clear Standby Flag
404
  * @rmtoll CR   CSBF       LL_PWR_ClearFlag_SB
405
  * @retval None
406
  */
407
__STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
408
{
409
  SET_BIT(PWR->CR, PWR_CR_CSBF);
410
}
411
 
412
/**
413
  * @brief  Clear Wake-up Flags
414
  * @rmtoll CR   CWUF       LL_PWR_ClearFlag_WU
415
  * @retval None
416
  */
417
__STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
418
{
419
  SET_BIT(PWR->CR, PWR_CR_CWUF);
420
}
421
 
422
/**
423
  * @}
424
  */
425
 
426
#if defined(USE_FULL_LL_DRIVER)
427
/** @defgroup PWR_LL_EF_Init De-initialization function
428
  * @{
429
  */
430
ErrorStatus LL_PWR_DeInit(void);
431
/**
432
  * @}
433
  */
434
#endif /* USE_FULL_LL_DRIVER */
435
 
436
/**
437
  * @}
438
  */
439
 
440
/**
441
  * @}
442
  */
443
 
444
#endif /* defined(PWR) */
445
 
446
/**
447
  * @}
448
  */
449
 
450
#ifdef __cplusplus
451
}
452
#endif
453
 
454
#endif /* __STM32F1xx_LL_PWR_H */
455
 
456
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/