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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_ll_exti.h |
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4 | * @author MCD Application Team |
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5 | * @brief Header file of EXTI LL module. |
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6 | ****************************************************************************** |
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7 | * @attention |
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8 | * |
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9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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10 | * |
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11 | * Redistribution and use in source and binary forms, with or without modification, |
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12 | * are permitted provided that the following conditions are met: |
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13 | * 1. Redistributions of source code must retain the above copyright notice, |
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14 | * this list of conditions and the following disclaimer. |
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15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 | * this list of conditions and the following disclaimer in the documentation |
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17 | * and/or other materials provided with the distribution. |
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18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 | * may be used to endorse or promote products derived from this software |
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20 | * without specific prior written permission. |
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21 | * |
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22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 | * |
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33 | ****************************************************************************** |
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34 | */ |
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35 | |||
36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 | #ifndef __STM32F1xx_LL_EXTI_H |
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38 | #define __STM32F1xx_LL_EXTI_H |
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39 | |||
40 | #ifdef __cplusplus |
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41 | extern "C" { |
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42 | #endif |
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43 | |||
44 | /* Includes ------------------------------------------------------------------*/ |
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45 | #include "stm32f1xx.h" |
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46 | |||
47 | /** @addtogroup STM32F1xx_LL_Driver |
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48 | * @{ |
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49 | */ |
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50 | |||
51 | #if defined (EXTI) |
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52 | |||
53 | /** @defgroup EXTI_LL EXTI |
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54 | * @{ |
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55 | */ |
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56 | |||
57 | /* Private types -------------------------------------------------------------*/ |
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58 | /* Private variables ---------------------------------------------------------*/ |
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59 | /* Private constants ---------------------------------------------------------*/ |
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60 | /* Private Macros ------------------------------------------------------------*/ |
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61 | #if defined(USE_FULL_LL_DRIVER) |
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62 | /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros |
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63 | * @{ |
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64 | */ |
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65 | /** |
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66 | * @} |
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67 | */ |
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68 | #endif /*USE_FULL_LL_DRIVER*/ |
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69 | /* Exported types ------------------------------------------------------------*/ |
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70 | #if defined(USE_FULL_LL_DRIVER) |
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71 | /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure |
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72 | * @{ |
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73 | */ |
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74 | typedef struct |
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75 | { |
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76 | |||
77 | uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31 |
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78 | This parameter can be any combination of @ref EXTI_LL_EC_LINE */ |
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79 | |||
80 | FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines. |
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81 | This parameter can be set either to ENABLE or DISABLE */ |
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82 | |||
83 | uint8_t Mode; /*!< Specifies the mode for the EXTI lines. |
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84 | This parameter can be a value of @ref EXTI_LL_EC_MODE. */ |
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85 | |||
86 | uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. |
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87 | This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */ |
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88 | } LL_EXTI_InitTypeDef; |
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89 | |||
90 | /** |
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91 | * @} |
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92 | */ |
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93 | #endif /*USE_FULL_LL_DRIVER*/ |
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94 | |||
95 | /* Exported constants --------------------------------------------------------*/ |
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96 | /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants |
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97 | * @{ |
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98 | */ |
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99 | |||
100 | /** @defgroup EXTI_LL_EC_LINE LINE |
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101 | * @{ |
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102 | */ |
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103 | #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */ |
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104 | #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */ |
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105 | #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */ |
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106 | #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */ |
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107 | #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */ |
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108 | #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */ |
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109 | #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */ |
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110 | #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */ |
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111 | #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */ |
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112 | #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */ |
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113 | #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */ |
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114 | #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */ |
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115 | #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */ |
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116 | #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */ |
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117 | #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */ |
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118 | #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */ |
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119 | #if defined(EXTI_IMR_IM16) |
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120 | #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */ |
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121 | #endif |
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122 | #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */ |
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123 | #if defined(EXTI_IMR_IM18) |
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124 | #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */ |
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125 | #endif |
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126 | #if defined(EXTI_IMR_IM19) |
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127 | #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */ |
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128 | #endif |
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129 | #if defined(EXTI_IMR_IM20) |
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130 | #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */ |
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131 | #endif |
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132 | #if defined(EXTI_IMR_IM21) |
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133 | #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */ |
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134 | #endif |
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135 | #if defined(EXTI_IMR_IM22) |
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136 | #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */ |
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137 | #endif |
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138 | #if defined(EXTI_IMR_IM23) |
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139 | #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */ |
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140 | #endif |
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141 | #if defined(EXTI_IMR_IM24) |
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142 | #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */ |
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143 | #endif |
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144 | #if defined(EXTI_IMR_IM25) |
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145 | #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */ |
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146 | #endif |
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147 | #if defined(EXTI_IMR_IM26) |
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148 | #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */ |
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149 | #endif |
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150 | #if defined(EXTI_IMR_IM27) |
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151 | #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */ |
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152 | #endif |
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153 | #if defined(EXTI_IMR_IM28) |
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154 | #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */ |
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155 | #endif |
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156 | #if defined(EXTI_IMR_IM29) |
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157 | #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */ |
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158 | #endif |
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159 | #if defined(EXTI_IMR_IM30) |
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160 | #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */ |
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161 | #endif |
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162 | #if defined(EXTI_IMR_IM31) |
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163 | #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */ |
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164 | #endif |
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165 | #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/ |
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166 | |||
167 | |||
168 | #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */ |
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169 | |||
170 | #if defined(USE_FULL_LL_DRIVER) |
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171 | #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */ |
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172 | #endif /*USE_FULL_LL_DRIVER*/ |
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173 | |||
174 | /** |
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175 | * @} |
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176 | */ |
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177 | #if defined(USE_FULL_LL_DRIVER) |
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178 | |||
179 | /** @defgroup EXTI_LL_EC_MODE Mode |
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180 | * @{ |
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181 | */ |
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182 | #define LL_EXTI_MODE_IT ((uint8_t)0x00) /*!< Interrupt Mode */ |
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183 | #define LL_EXTI_MODE_EVENT ((uint8_t)0x01) /*!< Event Mode */ |
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184 | #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02) /*!< Interrupt & Event Mode */ |
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185 | /** |
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186 | * @} |
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187 | */ |
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188 | |||
189 | /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger |
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190 | * @{ |
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191 | */ |
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192 | #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00) /*!< No Trigger Mode */ |
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193 | #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01) /*!< Trigger Rising Mode */ |
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194 | #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02) /*!< Trigger Falling Mode */ |
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195 | #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03) /*!< Trigger Rising & Falling Mode */ |
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196 | |||
197 | /** |
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198 | * @} |
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199 | */ |
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200 | |||
201 | |||
202 | #endif /*USE_FULL_LL_DRIVER*/ |
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203 | |||
204 | |||
205 | /** |
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206 | * @} |
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207 | */ |
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208 | |||
209 | /* Exported macro ------------------------------------------------------------*/ |
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210 | /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros |
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211 | * @{ |
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212 | */ |
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213 | |||
214 | /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros |
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215 | * @{ |
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216 | */ |
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217 | |||
218 | /** |
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219 | * @brief Write a value in EXTI register |
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220 | * @param __REG__ Register to be written |
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221 | * @param __VALUE__ Value to be written in the register |
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222 | * @retval None |
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223 | */ |
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224 | #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__)) |
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225 | |||
226 | /** |
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227 | * @brief Read a value in EXTI register |
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228 | * @param __REG__ Register to be read |
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229 | * @retval Register value |
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230 | */ |
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231 | #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__) |
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232 | /** |
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233 | * @} |
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234 | */ |
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235 | |||
236 | |||
237 | /** |
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238 | * @} |
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239 | */ |
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240 | |||
241 | |||
242 | |||
243 | /* Exported functions --------------------------------------------------------*/ |
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244 | /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions |
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245 | * @{ |
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246 | */ |
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247 | /** @defgroup EXTI_LL_EF_IT_Management IT_Management |
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248 | * @{ |
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249 | */ |
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250 | |||
251 | /** |
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252 | * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 |
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253 | * @note The reset value for the direct or internal lines (see RM) |
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254 | * is set to 1 in order to enable the interrupt by default. |
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255 | * Bits are set automatically at Power on. |
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256 | * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31 |
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257 | * @param ExtiLine This parameter can be one of the following values: |
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258 | * @arg @ref LL_EXTI_LINE_0 |
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259 | * @arg @ref LL_EXTI_LINE_1 |
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260 | * @arg @ref LL_EXTI_LINE_2 |
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261 | * @arg @ref LL_EXTI_LINE_3 |
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262 | * @arg @ref LL_EXTI_LINE_4 |
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263 | * @arg @ref LL_EXTI_LINE_5 |
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264 | * @arg @ref LL_EXTI_LINE_6 |
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265 | * @arg @ref LL_EXTI_LINE_7 |
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266 | * @arg @ref LL_EXTI_LINE_8 |
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267 | * @arg @ref LL_EXTI_LINE_9 |
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268 | * @arg @ref LL_EXTI_LINE_10 |
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269 | * @arg @ref LL_EXTI_LINE_11 |
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270 | * @arg @ref LL_EXTI_LINE_12 |
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271 | * @arg @ref LL_EXTI_LINE_13 |
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272 | * @arg @ref LL_EXTI_LINE_14 |
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273 | * @arg @ref LL_EXTI_LINE_15 |
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274 | * @arg @ref LL_EXTI_LINE_16 |
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275 | * @arg @ref LL_EXTI_LINE_17 |
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276 | * @arg @ref LL_EXTI_LINE_18 |
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277 | * @arg @ref LL_EXTI_LINE_19 |
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278 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
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279 | * @note Please check each device line mapping for EXTI Line availability |
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280 | * @retval None |
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281 | */ |
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282 | __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) |
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283 | { |
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284 | SET_BIT(EXTI->IMR, ExtiLine); |
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285 | } |
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286 | |||
287 | /** |
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288 | * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 |
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289 | * @note The reset value for the direct or internal lines (see RM) |
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290 | * is set to 1 in order to enable the interrupt by default. |
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291 | * Bits are set automatically at Power on. |
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292 | * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31 |
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293 | * @param ExtiLine This parameter can be one of the following values: |
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294 | * @arg @ref LL_EXTI_LINE_0 |
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295 | * @arg @ref LL_EXTI_LINE_1 |
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296 | * @arg @ref LL_EXTI_LINE_2 |
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297 | * @arg @ref LL_EXTI_LINE_3 |
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298 | * @arg @ref LL_EXTI_LINE_4 |
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299 | * @arg @ref LL_EXTI_LINE_5 |
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300 | * @arg @ref LL_EXTI_LINE_6 |
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301 | * @arg @ref LL_EXTI_LINE_7 |
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302 | * @arg @ref LL_EXTI_LINE_8 |
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303 | * @arg @ref LL_EXTI_LINE_9 |
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304 | * @arg @ref LL_EXTI_LINE_10 |
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305 | * @arg @ref LL_EXTI_LINE_11 |
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306 | * @arg @ref LL_EXTI_LINE_12 |
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307 | * @arg @ref LL_EXTI_LINE_13 |
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308 | * @arg @ref LL_EXTI_LINE_14 |
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309 | * @arg @ref LL_EXTI_LINE_15 |
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310 | * @arg @ref LL_EXTI_LINE_16 |
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311 | * @arg @ref LL_EXTI_LINE_17 |
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312 | * @arg @ref LL_EXTI_LINE_18 |
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313 | * @arg @ref LL_EXTI_LINE_19 |
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314 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
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315 | * @note Please check each device line mapping for EXTI Line availability |
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316 | * @retval None |
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317 | */ |
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318 | __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine) |
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319 | { |
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320 | CLEAR_BIT(EXTI->IMR, ExtiLine); |
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321 | } |
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322 | |||
323 | |||
324 | /** |
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325 | * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 |
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326 | * @note The reset value for the direct or internal lines (see RM) |
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327 | * is set to 1 in order to enable the interrupt by default. |
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328 | * Bits are set automatically at Power on. |
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329 | * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31 |
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330 | * @param ExtiLine This parameter can be one of the following values: |
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331 | * @arg @ref LL_EXTI_LINE_0 |
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332 | * @arg @ref LL_EXTI_LINE_1 |
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333 | * @arg @ref LL_EXTI_LINE_2 |
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334 | * @arg @ref LL_EXTI_LINE_3 |
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335 | * @arg @ref LL_EXTI_LINE_4 |
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336 | * @arg @ref LL_EXTI_LINE_5 |
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337 | * @arg @ref LL_EXTI_LINE_6 |
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338 | * @arg @ref LL_EXTI_LINE_7 |
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339 | * @arg @ref LL_EXTI_LINE_8 |
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340 | * @arg @ref LL_EXTI_LINE_9 |
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341 | * @arg @ref LL_EXTI_LINE_10 |
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342 | * @arg @ref LL_EXTI_LINE_11 |
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343 | * @arg @ref LL_EXTI_LINE_12 |
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344 | * @arg @ref LL_EXTI_LINE_13 |
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345 | * @arg @ref LL_EXTI_LINE_14 |
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346 | * @arg @ref LL_EXTI_LINE_15 |
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347 | * @arg @ref LL_EXTI_LINE_16 |
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348 | * @arg @ref LL_EXTI_LINE_17 |
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349 | * @arg @ref LL_EXTI_LINE_18 |
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350 | * @arg @ref LL_EXTI_LINE_19 |
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351 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
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352 | * @note Please check each device line mapping for EXTI Line availability |
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353 | * @retval State of bit (1 or 0). |
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354 | */ |
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355 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) |
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356 | { |
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357 | return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine)); |
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358 | } |
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359 | |||
360 | |||
361 | /** |
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362 | * @} |
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363 | */ |
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364 | |||
365 | /** @defgroup EXTI_LL_EF_Event_Management Event_Management |
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366 | * @{ |
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367 | */ |
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368 | |||
369 | /** |
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370 | * @brief Enable ExtiLine Event request for Lines in range 0 to 31 |
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371 | * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31 |
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372 | * @param ExtiLine This parameter can be one of the following values: |
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373 | * @arg @ref LL_EXTI_LINE_0 |
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374 | * @arg @ref LL_EXTI_LINE_1 |
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375 | * @arg @ref LL_EXTI_LINE_2 |
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376 | * @arg @ref LL_EXTI_LINE_3 |
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377 | * @arg @ref LL_EXTI_LINE_4 |
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378 | * @arg @ref LL_EXTI_LINE_5 |
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379 | * @arg @ref LL_EXTI_LINE_6 |
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380 | * @arg @ref LL_EXTI_LINE_7 |
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381 | * @arg @ref LL_EXTI_LINE_8 |
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382 | * @arg @ref LL_EXTI_LINE_9 |
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383 | * @arg @ref LL_EXTI_LINE_10 |
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384 | * @arg @ref LL_EXTI_LINE_11 |
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385 | * @arg @ref LL_EXTI_LINE_12 |
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386 | * @arg @ref LL_EXTI_LINE_13 |
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387 | * @arg @ref LL_EXTI_LINE_14 |
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388 | * @arg @ref LL_EXTI_LINE_15 |
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389 | * @arg @ref LL_EXTI_LINE_16 |
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390 | * @arg @ref LL_EXTI_LINE_17 |
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391 | * @arg @ref LL_EXTI_LINE_18 |
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392 | * @arg @ref LL_EXTI_LINE_19 |
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393 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
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394 | * @note Please check each device line mapping for EXTI Line availability |
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395 | * @retval None |
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396 | */ |
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397 | __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine) |
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398 | { |
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399 | SET_BIT(EXTI->EMR, ExtiLine); |
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400 | |||
401 | } |
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402 | |||
403 | |||
404 | /** |
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405 | * @brief Disable ExtiLine Event request for Lines in range 0 to 31 |
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406 | * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31 |
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407 | * @param ExtiLine This parameter can be one of the following values: |
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408 | * @arg @ref LL_EXTI_LINE_0 |
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409 | * @arg @ref LL_EXTI_LINE_1 |
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410 | * @arg @ref LL_EXTI_LINE_2 |
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411 | * @arg @ref LL_EXTI_LINE_3 |
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412 | * @arg @ref LL_EXTI_LINE_4 |
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413 | * @arg @ref LL_EXTI_LINE_5 |
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414 | * @arg @ref LL_EXTI_LINE_6 |
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415 | * @arg @ref LL_EXTI_LINE_7 |
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416 | * @arg @ref LL_EXTI_LINE_8 |
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417 | * @arg @ref LL_EXTI_LINE_9 |
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418 | * @arg @ref LL_EXTI_LINE_10 |
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419 | * @arg @ref LL_EXTI_LINE_11 |
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420 | * @arg @ref LL_EXTI_LINE_12 |
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421 | * @arg @ref LL_EXTI_LINE_13 |
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422 | * @arg @ref LL_EXTI_LINE_14 |
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423 | * @arg @ref LL_EXTI_LINE_15 |
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424 | * @arg @ref LL_EXTI_LINE_16 |
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425 | * @arg @ref LL_EXTI_LINE_17 |
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426 | * @arg @ref LL_EXTI_LINE_18 |
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427 | * @arg @ref LL_EXTI_LINE_19 |
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428 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
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429 | * @note Please check each device line mapping for EXTI Line availability |
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430 | * @retval None |
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431 | */ |
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432 | __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine) |
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433 | { |
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434 | CLEAR_BIT(EXTI->EMR, ExtiLine); |
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435 | } |
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436 | |||
437 | |||
438 | /** |
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439 | * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 |
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440 | * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31 |
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441 | * @param ExtiLine This parameter can be one of the following values: |
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442 | * @arg @ref LL_EXTI_LINE_0 |
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443 | * @arg @ref LL_EXTI_LINE_1 |
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444 | * @arg @ref LL_EXTI_LINE_2 |
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445 | * @arg @ref LL_EXTI_LINE_3 |
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446 | * @arg @ref LL_EXTI_LINE_4 |
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447 | * @arg @ref LL_EXTI_LINE_5 |
||
448 | * @arg @ref LL_EXTI_LINE_6 |
||
449 | * @arg @ref LL_EXTI_LINE_7 |
||
450 | * @arg @ref LL_EXTI_LINE_8 |
||
451 | * @arg @ref LL_EXTI_LINE_9 |
||
452 | * @arg @ref LL_EXTI_LINE_10 |
||
453 | * @arg @ref LL_EXTI_LINE_11 |
||
454 | * @arg @ref LL_EXTI_LINE_12 |
||
455 | * @arg @ref LL_EXTI_LINE_13 |
||
456 | * @arg @ref LL_EXTI_LINE_14 |
||
457 | * @arg @ref LL_EXTI_LINE_15 |
||
458 | * @arg @ref LL_EXTI_LINE_16 |
||
459 | * @arg @ref LL_EXTI_LINE_17 |
||
460 | * @arg @ref LL_EXTI_LINE_18 |
||
461 | * @arg @ref LL_EXTI_LINE_19 |
||
462 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
||
463 | * @note Please check each device line mapping for EXTI Line availability |
||
464 | * @retval State of bit (1 or 0). |
||
465 | */ |
||
466 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) |
||
467 | { |
||
468 | return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine)); |
||
469 | |||
470 | } |
||
471 | |||
472 | |||
473 | /** |
||
474 | * @} |
||
475 | */ |
||
476 | |||
477 | /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management |
||
478 | * @{ |
||
479 | */ |
||
480 | |||
481 | /** |
||
482 | * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 |
||
483 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
||
484 | * generated on these lines. If a rising edge on a configurable interrupt |
||
485 | * line occurs during a write operation in the EXTI_RTSR register, the |
||
486 | * pending bit is not set. |
||
487 | * Rising and falling edge triggers can be set for |
||
488 | * the same interrupt line. In this case, both generate a trigger |
||
489 | * condition. |
||
490 | * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31 |
||
491 | * @param ExtiLine This parameter can be a combination of the following values: |
||
492 | * @arg @ref LL_EXTI_LINE_0 |
||
493 | * @arg @ref LL_EXTI_LINE_1 |
||
494 | * @arg @ref LL_EXTI_LINE_2 |
||
495 | * @arg @ref LL_EXTI_LINE_3 |
||
496 | * @arg @ref LL_EXTI_LINE_4 |
||
497 | * @arg @ref LL_EXTI_LINE_5 |
||
498 | * @arg @ref LL_EXTI_LINE_6 |
||
499 | * @arg @ref LL_EXTI_LINE_7 |
||
500 | * @arg @ref LL_EXTI_LINE_8 |
||
501 | * @arg @ref LL_EXTI_LINE_9 |
||
502 | * @arg @ref LL_EXTI_LINE_10 |
||
503 | * @arg @ref LL_EXTI_LINE_11 |
||
504 | * @arg @ref LL_EXTI_LINE_12 |
||
505 | * @arg @ref LL_EXTI_LINE_13 |
||
506 | * @arg @ref LL_EXTI_LINE_14 |
||
507 | * @arg @ref LL_EXTI_LINE_15 |
||
508 | * @arg @ref LL_EXTI_LINE_16 |
||
509 | * @arg @ref LL_EXTI_LINE_18 |
||
510 | * @arg @ref LL_EXTI_LINE_19 |
||
511 | * @note Please check each device line mapping for EXTI Line availability |
||
512 | * @retval None |
||
513 | */ |
||
514 | __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) |
||
515 | { |
||
516 | SET_BIT(EXTI->RTSR, ExtiLine); |
||
517 | |||
518 | } |
||
519 | |||
520 | |||
521 | /** |
||
522 | * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 |
||
523 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
||
524 | * generated on these lines. If a rising edge on a configurable interrupt |
||
525 | * line occurs during a write operation in the EXTI_RTSR register, the |
||
526 | * pending bit is not set. |
||
527 | * Rising and falling edge triggers can be set for |
||
528 | * the same interrupt line. In this case, both generate a trigger |
||
529 | * condition. |
||
530 | * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31 |
||
531 | * @param ExtiLine This parameter can be a combination of the following values: |
||
532 | * @arg @ref LL_EXTI_LINE_0 |
||
533 | * @arg @ref LL_EXTI_LINE_1 |
||
534 | * @arg @ref LL_EXTI_LINE_2 |
||
535 | * @arg @ref LL_EXTI_LINE_3 |
||
536 | * @arg @ref LL_EXTI_LINE_4 |
||
537 | * @arg @ref LL_EXTI_LINE_5 |
||
538 | * @arg @ref LL_EXTI_LINE_6 |
||
539 | * @arg @ref LL_EXTI_LINE_7 |
||
540 | * @arg @ref LL_EXTI_LINE_8 |
||
541 | * @arg @ref LL_EXTI_LINE_9 |
||
542 | * @arg @ref LL_EXTI_LINE_10 |
||
543 | * @arg @ref LL_EXTI_LINE_11 |
||
544 | * @arg @ref LL_EXTI_LINE_12 |
||
545 | * @arg @ref LL_EXTI_LINE_13 |
||
546 | * @arg @ref LL_EXTI_LINE_14 |
||
547 | * @arg @ref LL_EXTI_LINE_15 |
||
548 | * @arg @ref LL_EXTI_LINE_16 |
||
549 | * @arg @ref LL_EXTI_LINE_18 |
||
550 | * @arg @ref LL_EXTI_LINE_19 |
||
551 | * @note Please check each device line mapping for EXTI Line availability |
||
552 | * @retval None |
||
553 | */ |
||
554 | __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine) |
||
555 | { |
||
556 | CLEAR_BIT(EXTI->RTSR, ExtiLine); |
||
557 | |||
558 | } |
||
559 | |||
560 | |||
561 | /** |
||
562 | * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31 |
||
563 | * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31 |
||
564 | * @param ExtiLine This parameter can be a combination of the following values: |
||
565 | * @arg @ref LL_EXTI_LINE_0 |
||
566 | * @arg @ref LL_EXTI_LINE_1 |
||
567 | * @arg @ref LL_EXTI_LINE_2 |
||
568 | * @arg @ref LL_EXTI_LINE_3 |
||
569 | * @arg @ref LL_EXTI_LINE_4 |
||
570 | * @arg @ref LL_EXTI_LINE_5 |
||
571 | * @arg @ref LL_EXTI_LINE_6 |
||
572 | * @arg @ref LL_EXTI_LINE_7 |
||
573 | * @arg @ref LL_EXTI_LINE_8 |
||
574 | * @arg @ref LL_EXTI_LINE_9 |
||
575 | * @arg @ref LL_EXTI_LINE_10 |
||
576 | * @arg @ref LL_EXTI_LINE_11 |
||
577 | * @arg @ref LL_EXTI_LINE_12 |
||
578 | * @arg @ref LL_EXTI_LINE_13 |
||
579 | * @arg @ref LL_EXTI_LINE_14 |
||
580 | * @arg @ref LL_EXTI_LINE_15 |
||
581 | * @arg @ref LL_EXTI_LINE_16 |
||
582 | * @arg @ref LL_EXTI_LINE_18 |
||
583 | * @arg @ref LL_EXTI_LINE_19 |
||
584 | * @note Please check each device line mapping for EXTI Line availability |
||
585 | * @retval State of bit (1 or 0). |
||
586 | */ |
||
587 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine) |
||
588 | { |
||
589 | return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine)); |
||
590 | } |
||
591 | |||
592 | |||
593 | /** |
||
594 | * @} |
||
595 | */ |
||
596 | |||
597 | /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management |
||
598 | * @{ |
||
599 | */ |
||
600 | |||
601 | /** |
||
602 | * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 |
||
603 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
||
604 | * generated on these lines. If a falling edge on a configurable interrupt |
||
605 | * line occurs during a write operation in the EXTI_FTSR register, the |
||
606 | * pending bit is not set. |
||
607 | * Rising and falling edge triggers can be set for |
||
608 | * the same interrupt line. In this case, both generate a trigger |
||
609 | * condition. |
||
610 | * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31 |
||
611 | * @param ExtiLine This parameter can be a combination of the following values: |
||
612 | * @arg @ref LL_EXTI_LINE_0 |
||
613 | * @arg @ref LL_EXTI_LINE_1 |
||
614 | * @arg @ref LL_EXTI_LINE_2 |
||
615 | * @arg @ref LL_EXTI_LINE_3 |
||
616 | * @arg @ref LL_EXTI_LINE_4 |
||
617 | * @arg @ref LL_EXTI_LINE_5 |
||
618 | * @arg @ref LL_EXTI_LINE_6 |
||
619 | * @arg @ref LL_EXTI_LINE_7 |
||
620 | * @arg @ref LL_EXTI_LINE_8 |
||
621 | * @arg @ref LL_EXTI_LINE_9 |
||
622 | * @arg @ref LL_EXTI_LINE_10 |
||
623 | * @arg @ref LL_EXTI_LINE_11 |
||
624 | * @arg @ref LL_EXTI_LINE_12 |
||
625 | * @arg @ref LL_EXTI_LINE_13 |
||
626 | * @arg @ref LL_EXTI_LINE_14 |
||
627 | * @arg @ref LL_EXTI_LINE_15 |
||
628 | * @arg @ref LL_EXTI_LINE_16 |
||
629 | * @arg @ref LL_EXTI_LINE_18 |
||
630 | * @arg @ref LL_EXTI_LINE_19 |
||
631 | * @note Please check each device line mapping for EXTI Line availability |
||
632 | * @retval None |
||
633 | */ |
||
634 | __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine) |
||
635 | { |
||
636 | SET_BIT(EXTI->FTSR, ExtiLine); |
||
637 | } |
||
638 | |||
639 | |||
640 | /** |
||
641 | * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 |
||
642 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
||
643 | * generated on these lines. If a Falling edge on a configurable interrupt |
||
644 | * line occurs during a write operation in the EXTI_FTSR register, the |
||
645 | * pending bit is not set. |
||
646 | * Rising and falling edge triggers can be set for the same interrupt line. |
||
647 | * In this case, both generate a trigger condition. |
||
648 | * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31 |
||
649 | * @param ExtiLine This parameter can be a combination of the following values: |
||
650 | * @arg @ref LL_EXTI_LINE_0 |
||
651 | * @arg @ref LL_EXTI_LINE_1 |
||
652 | * @arg @ref LL_EXTI_LINE_2 |
||
653 | * @arg @ref LL_EXTI_LINE_3 |
||
654 | * @arg @ref LL_EXTI_LINE_4 |
||
655 | * @arg @ref LL_EXTI_LINE_5 |
||
656 | * @arg @ref LL_EXTI_LINE_6 |
||
657 | * @arg @ref LL_EXTI_LINE_7 |
||
658 | * @arg @ref LL_EXTI_LINE_8 |
||
659 | * @arg @ref LL_EXTI_LINE_9 |
||
660 | * @arg @ref LL_EXTI_LINE_10 |
||
661 | * @arg @ref LL_EXTI_LINE_11 |
||
662 | * @arg @ref LL_EXTI_LINE_12 |
||
663 | * @arg @ref LL_EXTI_LINE_13 |
||
664 | * @arg @ref LL_EXTI_LINE_14 |
||
665 | * @arg @ref LL_EXTI_LINE_15 |
||
666 | * @arg @ref LL_EXTI_LINE_16 |
||
667 | * @arg @ref LL_EXTI_LINE_18 |
||
668 | * @arg @ref LL_EXTI_LINE_19 |
||
669 | * @note Please check each device line mapping for EXTI Line availability |
||
670 | * @retval None |
||
671 | */ |
||
672 | __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine) |
||
673 | { |
||
674 | CLEAR_BIT(EXTI->FTSR, ExtiLine); |
||
675 | } |
||
676 | |||
677 | |||
678 | /** |
||
679 | * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31 |
||
680 | * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31 |
||
681 | * @param ExtiLine This parameter can be a combination of the following values: |
||
682 | * @arg @ref LL_EXTI_LINE_0 |
||
683 | * @arg @ref LL_EXTI_LINE_1 |
||
684 | * @arg @ref LL_EXTI_LINE_2 |
||
685 | * @arg @ref LL_EXTI_LINE_3 |
||
686 | * @arg @ref LL_EXTI_LINE_4 |
||
687 | * @arg @ref LL_EXTI_LINE_5 |
||
688 | * @arg @ref LL_EXTI_LINE_6 |
||
689 | * @arg @ref LL_EXTI_LINE_7 |
||
690 | * @arg @ref LL_EXTI_LINE_8 |
||
691 | * @arg @ref LL_EXTI_LINE_9 |
||
692 | * @arg @ref LL_EXTI_LINE_10 |
||
693 | * @arg @ref LL_EXTI_LINE_11 |
||
694 | * @arg @ref LL_EXTI_LINE_12 |
||
695 | * @arg @ref LL_EXTI_LINE_13 |
||
696 | * @arg @ref LL_EXTI_LINE_14 |
||
697 | * @arg @ref LL_EXTI_LINE_15 |
||
698 | * @arg @ref LL_EXTI_LINE_16 |
||
699 | * @arg @ref LL_EXTI_LINE_18 |
||
700 | * @arg @ref LL_EXTI_LINE_19 |
||
701 | * @note Please check each device line mapping for EXTI Line availability |
||
702 | * @retval State of bit (1 or 0). |
||
703 | */ |
||
704 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine) |
||
705 | { |
||
706 | return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine)); |
||
707 | } |
||
708 | |||
709 | |||
710 | /** |
||
711 | * @} |
||
712 | */ |
||
713 | |||
714 | /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management |
||
715 | * @{ |
||
716 | */ |
||
717 | |||
718 | /** |
||
719 | * @brief Generate a software Interrupt Event for Lines in range 0 to 31 |
||
720 | * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to |
||
721 | * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR |
||
722 | * resulting in an interrupt request generation. |
||
723 | * This bit is cleared by clearing the corresponding bit in the EXTI_PR |
||
724 | * register (by writing a 1 into the bit) |
||
725 | * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31 |
||
726 | * @param ExtiLine This parameter can be a combination of the following values: |
||
727 | * @arg @ref LL_EXTI_LINE_0 |
||
728 | * @arg @ref LL_EXTI_LINE_1 |
||
729 | * @arg @ref LL_EXTI_LINE_2 |
||
730 | * @arg @ref LL_EXTI_LINE_3 |
||
731 | * @arg @ref LL_EXTI_LINE_4 |
||
732 | * @arg @ref LL_EXTI_LINE_5 |
||
733 | * @arg @ref LL_EXTI_LINE_6 |
||
734 | * @arg @ref LL_EXTI_LINE_7 |
||
735 | * @arg @ref LL_EXTI_LINE_8 |
||
736 | * @arg @ref LL_EXTI_LINE_9 |
||
737 | * @arg @ref LL_EXTI_LINE_10 |
||
738 | * @arg @ref LL_EXTI_LINE_11 |
||
739 | * @arg @ref LL_EXTI_LINE_12 |
||
740 | * @arg @ref LL_EXTI_LINE_13 |
||
741 | * @arg @ref LL_EXTI_LINE_14 |
||
742 | * @arg @ref LL_EXTI_LINE_15 |
||
743 | * @arg @ref LL_EXTI_LINE_16 |
||
744 | * @arg @ref LL_EXTI_LINE_18 |
||
745 | * @arg @ref LL_EXTI_LINE_19 |
||
746 | * @note Please check each device line mapping for EXTI Line availability |
||
747 | * @retval None |
||
748 | */ |
||
749 | __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine) |
||
750 | { |
||
751 | SET_BIT(EXTI->SWIER, ExtiLine); |
||
752 | } |
||
753 | |||
754 | |||
755 | /** |
||
756 | * @} |
||
757 | */ |
||
758 | |||
759 | /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management |
||
760 | * @{ |
||
761 | */ |
||
762 | |||
763 | /** |
||
764 | * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 |
||
765 | * @note This bit is set when the selected edge event arrives on the interrupt |
||
766 | * line. This bit is cleared by writing a 1 to the bit. |
||
767 | * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31 |
||
768 | * @param ExtiLine This parameter can be a combination of the following values: |
||
769 | * @arg @ref LL_EXTI_LINE_0 |
||
770 | * @arg @ref LL_EXTI_LINE_1 |
||
771 | * @arg @ref LL_EXTI_LINE_2 |
||
772 | * @arg @ref LL_EXTI_LINE_3 |
||
773 | * @arg @ref LL_EXTI_LINE_4 |
||
774 | * @arg @ref LL_EXTI_LINE_5 |
||
775 | * @arg @ref LL_EXTI_LINE_6 |
||
776 | * @arg @ref LL_EXTI_LINE_7 |
||
777 | * @arg @ref LL_EXTI_LINE_8 |
||
778 | * @arg @ref LL_EXTI_LINE_9 |
||
779 | * @arg @ref LL_EXTI_LINE_10 |
||
780 | * @arg @ref LL_EXTI_LINE_11 |
||
781 | * @arg @ref LL_EXTI_LINE_12 |
||
782 | * @arg @ref LL_EXTI_LINE_13 |
||
783 | * @arg @ref LL_EXTI_LINE_14 |
||
784 | * @arg @ref LL_EXTI_LINE_15 |
||
785 | * @arg @ref LL_EXTI_LINE_16 |
||
786 | * @arg @ref LL_EXTI_LINE_18 |
||
787 | * @arg @ref LL_EXTI_LINE_19 |
||
788 | * @note Please check each device line mapping for EXTI Line availability |
||
789 | * @retval State of bit (1 or 0). |
||
790 | */ |
||
791 | __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) |
||
792 | { |
||
793 | return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine)); |
||
794 | } |
||
795 | |||
796 | |||
797 | /** |
||
798 | * @brief Read ExtLine Combination Flag for Lines in range 0 to 31 |
||
799 | * @note This bit is set when the selected edge event arrives on the interrupt |
||
800 | * line. This bit is cleared by writing a 1 to the bit. |
||
801 | * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31 |
||
802 | * @param ExtiLine This parameter can be a combination of the following values: |
||
803 | * @arg @ref LL_EXTI_LINE_0 |
||
804 | * @arg @ref LL_EXTI_LINE_1 |
||
805 | * @arg @ref LL_EXTI_LINE_2 |
||
806 | * @arg @ref LL_EXTI_LINE_3 |
||
807 | * @arg @ref LL_EXTI_LINE_4 |
||
808 | * @arg @ref LL_EXTI_LINE_5 |
||
809 | * @arg @ref LL_EXTI_LINE_6 |
||
810 | * @arg @ref LL_EXTI_LINE_7 |
||
811 | * @arg @ref LL_EXTI_LINE_8 |
||
812 | * @arg @ref LL_EXTI_LINE_9 |
||
813 | * @arg @ref LL_EXTI_LINE_10 |
||
814 | * @arg @ref LL_EXTI_LINE_11 |
||
815 | * @arg @ref LL_EXTI_LINE_12 |
||
816 | * @arg @ref LL_EXTI_LINE_13 |
||
817 | * @arg @ref LL_EXTI_LINE_14 |
||
818 | * @arg @ref LL_EXTI_LINE_15 |
||
819 | * @arg @ref LL_EXTI_LINE_16 |
||
820 | * @arg @ref LL_EXTI_LINE_18 |
||
821 | * @arg @ref LL_EXTI_LINE_19 |
||
822 | * @note Please check each device line mapping for EXTI Line availability |
||
823 | * @retval @note This bit is set when the selected edge event arrives on the interrupt |
||
824 | */ |
||
825 | __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine) |
||
826 | { |
||
827 | return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine)); |
||
828 | } |
||
829 | |||
830 | |||
831 | /** |
||
832 | * @brief Clear ExtLine Flags for Lines in range 0 to 31 |
||
833 | * @note This bit is set when the selected edge event arrives on the interrupt |
||
834 | * line. This bit is cleared by writing a 1 to the bit. |
||
835 | * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31 |
||
836 | * @param ExtiLine This parameter can be a combination of the following values: |
||
837 | * @arg @ref LL_EXTI_LINE_0 |
||
838 | * @arg @ref LL_EXTI_LINE_1 |
||
839 | * @arg @ref LL_EXTI_LINE_2 |
||
840 | * @arg @ref LL_EXTI_LINE_3 |
||
841 | * @arg @ref LL_EXTI_LINE_4 |
||
842 | * @arg @ref LL_EXTI_LINE_5 |
||
843 | * @arg @ref LL_EXTI_LINE_6 |
||
844 | * @arg @ref LL_EXTI_LINE_7 |
||
845 | * @arg @ref LL_EXTI_LINE_8 |
||
846 | * @arg @ref LL_EXTI_LINE_9 |
||
847 | * @arg @ref LL_EXTI_LINE_10 |
||
848 | * @arg @ref LL_EXTI_LINE_11 |
||
849 | * @arg @ref LL_EXTI_LINE_12 |
||
850 | * @arg @ref LL_EXTI_LINE_13 |
||
851 | * @arg @ref LL_EXTI_LINE_14 |
||
852 | * @arg @ref LL_EXTI_LINE_15 |
||
853 | * @arg @ref LL_EXTI_LINE_16 |
||
854 | * @arg @ref LL_EXTI_LINE_18 |
||
855 | * @arg @ref LL_EXTI_LINE_19 |
||
856 | * @note Please check each device line mapping for EXTI Line availability |
||
857 | * @retval None |
||
858 | */ |
||
859 | __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) |
||
860 | { |
||
861 | WRITE_REG(EXTI->PR, ExtiLine); |
||
862 | } |
||
863 | |||
864 | |||
865 | /** |
||
866 | * @} |
||
867 | */ |
||
868 | |||
869 | #if defined(USE_FULL_LL_DRIVER) |
||
870 | /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions |
||
871 | * @{ |
||
872 | */ |
||
873 | |||
874 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct); |
||
875 | uint32_t LL_EXTI_DeInit(void); |
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876 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); |
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877 | |||
878 | |||
879 | /** |
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880 | * @} |
||
881 | */ |
||
882 | #endif /* USE_FULL_LL_DRIVER */ |
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883 | |||
884 | /** |
||
885 | * @} |
||
886 | */ |
||
887 | |||
888 | /** |
||
889 | * @} |
||
890 | */ |
||
891 | |||
892 | #endif /* EXTI */ |
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893 | |||
894 | /** |
||
895 | * @} |
||
896 | */ |
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897 | |||
898 | #ifdef __cplusplus |
||
899 | } |
||
900 | #endif |
||
901 | |||
902 | #endif /* __STM32F1xx_LL_EXTI_H */ |
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903 | |||
904 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |