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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_uart.h |
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4 | * @author MCD Application Team |
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5 | * @brief Header file of UART HAL module. |
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6 | ****************************************************************************** |
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7 | * @attention |
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8 | * |
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9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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10 | * All rights reserved.</center></h2> |
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11 | * |
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12 | * This software component is licensed by ST under BSD 3-Clause license, |
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13 | * the "License"; You may not use this file except in compliance with the |
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14 | * License. You may obtain a copy of the License at: |
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15 | * opensource.org/licenses/BSD-3-Clause |
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16 | * |
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17 | ****************************************************************************** |
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18 | */ |
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19 | |||
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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21 | #ifndef __STM32F1xx_HAL_UART_H |
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22 | #define __STM32F1xx_HAL_UART_H |
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23 | |||
24 | #ifdef __cplusplus |
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25 | extern "C" { |
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26 | #endif |
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27 | |||
28 | /* Includes ------------------------------------------------------------------*/ |
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29 | #include "stm32f1xx_hal_def.h" |
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30 | |||
31 | /** @addtogroup STM32F1xx_HAL_Driver |
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32 | * @{ |
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33 | */ |
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34 | |||
35 | /** @addtogroup UART |
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36 | * @{ |
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37 | */ |
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38 | |||
39 | /* Exported types ------------------------------------------------------------*/ |
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40 | /** @defgroup UART_Exported_Types UART Exported Types |
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41 | * @{ |
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42 | */ |
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43 | |||
44 | /** |
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45 | * @brief UART Init Structure definition |
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46 | */ |
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47 | typedef struct |
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48 | { |
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49 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
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50 | The baud rate is computed using the following formula: |
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51 | - IntegerDivider = ((PCLKx) / (16 * (huart->Init.BaudRate))) |
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52 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */ |
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53 | |||
54 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
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55 | This parameter can be a value of @ref UART_Word_Length */ |
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56 | |||
57 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
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58 | This parameter can be a value of @ref UART_Stop_Bits */ |
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59 | |||
60 | uint32_t Parity; /*!< Specifies the parity mode. |
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61 | This parameter can be a value of @ref UART_Parity |
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62 | @note When parity is enabled, the computed parity is inserted |
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63 | at the MSB position of the transmitted data (9th bit when |
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64 | the word length is set to 9 data bits; 8th bit when the |
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65 | word length is set to 8 data bits). */ |
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66 | |||
67 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
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68 | This parameter can be a value of @ref UART_Mode */ |
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69 | |||
70 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. |
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71 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
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72 | |||
73 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
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74 | This parameter can be a value of @ref UART_Over_Sampling. This feature is only available |
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75 | on STM32F100xx family, so OverSampling parameter should always be set to 16. */ |
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76 | } UART_InitTypeDef; |
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77 | |||
78 | /** |
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79 | * @brief HAL UART State structures definition |
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80 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
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81 | * - gState contains UART state information related to global Handle management |
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82 | * and also information related to Tx operations. |
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83 | * gState value coding follow below described bitmap : |
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84 | * b7-b6 Error information |
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85 | * 00 : No Error |
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86 | * 01 : (Not Used) |
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87 | * 10 : Timeout |
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88 | * 11 : Error |
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89 | * b5 Peripheral initialization status |
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90 | * 0 : Reset (Peripheral not initialized) |
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91 | * 1 : Init done (Peripheral initialized. HAL UART Init function already called) |
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92 | * b4-b3 (not used) |
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93 | * xx : Should be set to 00 |
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94 | * b2 Intrinsic process state |
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95 | * 0 : Ready |
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96 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
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97 | * b1 (not used) |
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98 | * x : Should be set to 0 |
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99 | * b0 Tx state |
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100 | * 0 : Ready (no Tx operation ongoing) |
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101 | * 1 : Busy (Tx operation ongoing) |
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102 | * - RxState contains information related to Rx operations. |
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103 | * RxState value coding follow below described bitmap : |
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104 | * b7-b6 (not used) |
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105 | * xx : Should be set to 00 |
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106 | * b5 Peripheral initialization status |
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107 | * 0 : Reset (Peripheral not initialized) |
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108 | * 1 : Init done (Peripheral initialized) |
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109 | * b4-b2 (not used) |
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110 | * xxx : Should be set to 000 |
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111 | * b1 Rx state |
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112 | * 0 : Ready (no Rx operation ongoing) |
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113 | * 1 : Busy (Rx operation ongoing) |
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114 | * b0 (not used) |
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115 | * x : Should be set to 0. |
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116 | */ |
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117 | typedef enum |
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118 | { |
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119 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
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120 | Value is allowed for gState and RxState */ |
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121 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
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122 | Value is allowed for gState and RxState */ |
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123 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
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124 | Value is allowed for gState only */ |
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125 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
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126 | Value is allowed for gState only */ |
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127 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
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128 | Value is allowed for RxState only */ |
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129 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
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130 | Not to be used for neither gState nor RxState. |
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131 | Value is result of combination (Or) between gState and RxState values */ |
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132 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
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133 | Value is allowed for gState only */ |
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134 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
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135 | Value is allowed for gState only */ |
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136 | } HAL_UART_StateTypeDef; |
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137 | |||
138 | /** |
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139 | * @brief HAL UART Reception type definition |
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140 | * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. |
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141 | * It is expected to admit following values : |
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142 | * HAL_UART_RECEPTION_STANDARD = 0x00U, |
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143 | * HAL_UART_RECEPTION_TOIDLE = 0x01U, |
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144 | */ |
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145 | typedef uint32_t HAL_UART_RxTypeTypeDef; |
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146 | |||
147 | /** |
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148 | * @brief UART handle Structure definition |
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149 | */ |
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150 | typedef struct __UART_HandleTypeDef |
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151 | { |
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152 | USART_TypeDef *Instance; /*!< UART registers base address */ |
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153 | |||
154 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
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155 | |||
156 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
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157 | |||
158 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
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159 | |||
160 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
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161 | |||
162 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
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163 | |||
164 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
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165 | |||
166 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
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167 | |||
168 | __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ |
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169 | |||
170 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
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171 | |||
172 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
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173 | |||
174 | HAL_LockTypeDef Lock; /*!< Locking object */ |
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175 | |||
176 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
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177 | and also related to Tx operations. |
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178 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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179 | |||
180 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
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181 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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182 | |||
183 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
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184 | |||
185 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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186 | void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ |
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187 | void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ |
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188 | void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ |
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189 | void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ |
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190 | void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ |
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191 | void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ |
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192 | void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ |
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193 | void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ |
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194 | void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ |
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195 | void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ |
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196 | |||
197 | void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ |
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198 | void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ |
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199 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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200 | |||
201 | } UART_HandleTypeDef; |
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202 | |||
203 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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204 | /** |
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205 | * @brief HAL UART Callback ID enumeration definition |
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206 | */ |
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207 | typedef enum |
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208 | { |
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209 | HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ |
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210 | HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ |
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211 | HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ |
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212 | HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ |
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213 | HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ |
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214 | HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ |
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215 | HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ |
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216 | HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ |
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217 | HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ |
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218 | |||
219 | HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ |
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220 | HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ |
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221 | |||
222 | } HAL_UART_CallbackIDTypeDef; |
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223 | |||
224 | /** |
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225 | * @brief HAL UART Callback pointer definition |
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226 | */ |
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227 | typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ |
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228 | typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ |
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229 | |||
230 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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231 | |||
232 | /** |
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233 | * @} |
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234 | */ |
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235 | |||
236 | /* Exported constants --------------------------------------------------------*/ |
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237 | /** @defgroup UART_Exported_Constants UART Exported Constants |
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238 | * @{ |
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239 | */ |
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240 | |||
241 | /** @defgroup UART_Error_Code UART Error Code |
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242 | * @{ |
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243 | */ |
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244 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
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245 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
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246 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
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247 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
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248 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
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249 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
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250 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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251 | #define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */ |
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252 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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253 | /** |
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254 | * @} |
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255 | */ |
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256 | |||
257 | /** @defgroup UART_Word_Length UART Word Length |
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258 | * @{ |
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259 | */ |
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260 | #define UART_WORDLENGTH_8B 0x00000000U |
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261 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
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262 | /** |
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263 | * @} |
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264 | */ |
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265 | |||
266 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
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267 | * @{ |
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268 | */ |
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269 | #define UART_STOPBITS_1 0x00000000U |
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270 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
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271 | /** |
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272 | * @} |
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273 | */ |
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274 | |||
275 | /** @defgroup UART_Parity UART Parity |
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276 | * @{ |
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277 | */ |
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278 | #define UART_PARITY_NONE 0x00000000U |
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279 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
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280 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
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281 | /** |
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282 | * @} |
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283 | */ |
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284 | |||
285 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
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286 | * @{ |
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287 | */ |
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288 | #define UART_HWCONTROL_NONE 0x00000000U |
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289 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
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290 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
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291 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
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292 | /** |
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293 | * @} |
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294 | */ |
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295 | |||
296 | /** @defgroup UART_Mode UART Transfer Mode |
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297 | * @{ |
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298 | */ |
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299 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
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300 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
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301 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE)) |
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302 | /** |
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303 | * @} |
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304 | */ |
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305 | |||
306 | /** @defgroup UART_State UART State |
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307 | * @{ |
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308 | */ |
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309 | #define UART_STATE_DISABLE 0x00000000U |
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310 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
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311 | /** |
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312 | * @} |
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313 | */ |
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314 | |||
315 | /** @defgroup UART_Over_Sampling UART Over Sampling |
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316 | * @{ |
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317 | */ |
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318 | #define UART_OVERSAMPLING_16 0x00000000U |
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319 | #if defined(USART_CR1_OVER8) |
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320 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
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321 | #endif /* USART_CR1_OVER8 */ |
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322 | /** |
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323 | * @} |
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324 | */ |
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325 | |||
326 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
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327 | * @{ |
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328 | */ |
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329 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
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330 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
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331 | /** |
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332 | * @} |
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333 | */ |
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334 | |||
335 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
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336 | * @{ |
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337 | */ |
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338 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
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339 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
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340 | /** |
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341 | * @} |
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342 | */ |
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343 | |||
344 | /** @defgroup UART_Flags UART FLags |
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345 | * Elements values convention: 0xXXXX |
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346 | * - 0xXXXX : Flag mask in the SR register |
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347 | * @{ |
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348 | */ |
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349 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
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350 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
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351 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
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352 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
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353 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
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354 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
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355 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
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356 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
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357 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
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358 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
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359 | /** |
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360 | * @} |
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361 | */ |
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362 | |||
363 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
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364 | * Elements values convention: 0xY000XXXX |
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365 | * - XXXX : Interrupt mask (16 bits) in the Y register |
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366 | * - Y : Interrupt source register (2bits) |
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367 | * - 0001: CR1 register |
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368 | * - 0010: CR2 register |
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369 | * - 0011: CR3 register |
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370 | * @{ |
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371 | */ |
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372 | |||
373 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
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374 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
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375 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
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376 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
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377 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
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378 | |||
379 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
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380 | |||
381 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
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382 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
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383 | /** |
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384 | * @} |
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385 | */ |
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386 | |||
387 | /** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values |
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388 | * @{ |
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389 | */ |
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390 | #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ |
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391 | #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ |
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392 | /** |
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393 | * @} |
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394 | */ |
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395 | |||
396 | /** |
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397 | * @} |
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398 | */ |
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399 | |||
400 | /* Exported macro ------------------------------------------------------------*/ |
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401 | /** @defgroup UART_Exported_Macros UART Exported Macros |
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402 | * @{ |
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403 | */ |
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404 | |||
405 | /** @brief Reset UART handle gstate & RxState |
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406 | * @param __HANDLE__ specifies the UART Handle. |
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407 | * UART Handle selects the USARTx or UARTy peripheral |
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408 | * (USART,UART availability and x,y values depending on device). |
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409 | * @retval None |
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410 | */ |
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411 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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412 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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413 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
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414 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
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415 | (__HANDLE__)->MspInitCallback = NULL; \ |
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416 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
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417 | } while(0U) |
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418 | #else |
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419 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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420 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
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421 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
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422 | } while(0U) |
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423 | #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ |
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424 | |||
425 | /** @brief Flushes the UART DR register |
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426 | * @param __HANDLE__ specifies the UART Handle. |
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427 | * UART Handle selects the USARTx or UARTy peripheral |
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428 | * (USART,UART availability and x,y values depending on device). |
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429 | */ |
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430 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
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431 | |||
432 | /** @brief Checks whether the specified UART flag is set or not. |
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433 | * @param __HANDLE__ specifies the UART Handle. |
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434 | * UART Handle selects the USARTx or UARTy peripheral |
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435 | * (USART,UART availability and x,y values depending on device). |
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436 | * @param __FLAG__ specifies the flag to check. |
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437 | * This parameter can be one of the following values: |
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438 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
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439 | * @arg UART_FLAG_LBD: LIN Break detection flag |
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440 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
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441 | * @arg UART_FLAG_TC: Transmission Complete flag |
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442 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
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443 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
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444 | * @arg UART_FLAG_ORE: Overrun Error flag |
||
445 | * @arg UART_FLAG_NE: Noise Error flag |
||
446 | * @arg UART_FLAG_FE: Framing Error flag |
||
447 | * @arg UART_FLAG_PE: Parity Error flag |
||
448 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
||
449 | */ |
||
450 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||
451 | |||
452 | /** @brief Clears the specified UART pending flag. |
||
453 | * @param __HANDLE__ specifies the UART Handle. |
||
454 | * UART Handle selects the USARTx or UARTy peripheral |
||
455 | * (USART,UART availability and x,y values depending on device). |
||
456 | * @param __FLAG__ specifies the flag to check. |
||
457 | * This parameter can be any combination of the following values: |
||
458 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
||
459 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
||
460 | * @arg UART_FLAG_TC: Transmission Complete flag. |
||
461 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
||
462 | * |
||
463 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
||
464 | * error) and IDLE (Idle line detected) flags are cleared by software |
||
465 | * sequence: a read operation to USART_SR register followed by a read |
||
466 | * operation to USART_DR register. |
||
467 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
||
468 | * @note TC flag can be also cleared by software sequence: a read operation to |
||
469 | * USART_SR register followed by a write operation to USART_DR register. |
||
470 | * @note TXE flag is cleared only by a write to the USART_DR register. |
||
471 | * |
||
472 | * @retval None |
||
473 | */ |
||
474 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
||
475 | |||
476 | /** @brief Clears the UART PE pending flag. |
||
477 | * @param __HANDLE__ specifies the UART Handle. |
||
478 | * UART Handle selects the USARTx or UARTy peripheral |
||
479 | * (USART,UART availability and x,y values depending on device). |
||
480 | * @retval None |
||
481 | */ |
||
482 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
||
483 | do{ \ |
||
484 | __IO uint32_t tmpreg = 0x00U; \ |
||
485 | tmpreg = (__HANDLE__)->Instance->SR; \ |
||
486 | tmpreg = (__HANDLE__)->Instance->DR; \ |
||
487 | UNUSED(tmpreg); \ |
||
488 | } while(0U) |
||
489 | |||
490 | /** @brief Clears the UART FE pending flag. |
||
491 | * @param __HANDLE__ specifies the UART Handle. |
||
492 | * UART Handle selects the USARTx or UARTy peripheral |
||
493 | * (USART,UART availability and x,y values depending on device). |
||
494 | * @retval None |
||
495 | */ |
||
496 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
497 | |||
498 | /** @brief Clears the UART NE pending flag. |
||
499 | * @param __HANDLE__ specifies the UART Handle. |
||
500 | * UART Handle selects the USARTx or UARTy peripheral |
||
501 | * (USART,UART availability and x,y values depending on device). |
||
502 | * @retval None |
||
503 | */ |
||
504 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
505 | |||
506 | /** @brief Clears the UART ORE pending flag. |
||
507 | * @param __HANDLE__ specifies the UART Handle. |
||
508 | * UART Handle selects the USARTx or UARTy peripheral |
||
509 | * (USART,UART availability and x,y values depending on device). |
||
510 | * @retval None |
||
511 | */ |
||
512 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
513 | |||
514 | /** @brief Clears the UART IDLE pending flag. |
||
515 | * @param __HANDLE__ specifies the UART Handle. |
||
516 | * UART Handle selects the USARTx or UARTy peripheral |
||
517 | * (USART,UART availability and x,y values depending on device). |
||
518 | * @retval None |
||
519 | */ |
||
520 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
521 | |||
522 | /** @brief Enable the specified UART interrupt. |
||
523 | * @param __HANDLE__ specifies the UART Handle. |
||
524 | * UART Handle selects the USARTx or UARTy peripheral |
||
525 | * (USART,UART availability and x,y values depending on device). |
||
526 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. |
||
527 | * This parameter can be one of the following values: |
||
528 | * @arg UART_IT_CTS: CTS change interrupt |
||
529 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
530 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
531 | * @arg UART_IT_TC: Transmission complete interrupt |
||
532 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
533 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
534 | * @arg UART_IT_PE: Parity Error interrupt |
||
535 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
536 | * @retval None |
||
537 | */ |
||
538 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
539 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
540 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
||
541 | |||
542 | /** @brief Disable the specified UART interrupt. |
||
543 | * @param __HANDLE__ specifies the UART Handle. |
||
544 | * UART Handle selects the USARTx or UARTy peripheral |
||
545 | * (USART,UART availability and x,y values depending on device). |
||
546 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. |
||
547 | * This parameter can be one of the following values: |
||
548 | * @arg UART_IT_CTS: CTS change interrupt |
||
549 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
550 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
551 | * @arg UART_IT_TC: Transmission complete interrupt |
||
552 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
553 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
554 | * @arg UART_IT_PE: Parity Error interrupt |
||
555 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
556 | * @retval None |
||
557 | */ |
||
558 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
559 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
560 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
||
561 | |||
562 | /** @brief Checks whether the specified UART interrupt source is enabled or not. |
||
563 | * @param __HANDLE__ specifies the UART Handle. |
||
564 | * UART Handle selects the USARTx or UARTy peripheral |
||
565 | * (USART,UART availability and x,y values depending on device). |
||
566 | * @param __IT__ specifies the UART interrupt source to check. |
||
567 | * This parameter can be one of the following values: |
||
568 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
||
569 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
570 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
571 | * @arg UART_IT_TC: Transmission complete interrupt |
||
572 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
573 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
574 | * @arg UART_IT_ERR: Error interrupt |
||
575 | * @retval The new state of __IT__ (TRUE or FALSE). |
||
576 | */ |
||
577 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ |
||
578 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
||
579 | |||
580 | /** @brief Enable CTS flow control |
||
581 | * @note This macro allows to enable CTS hardware flow control for a given UART instance, |
||
582 | * without need to call HAL_UART_Init() function. |
||
583 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
584 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
585 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
586 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
587 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
588 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
589 | * @param __HANDLE__ specifies the UART Handle. |
||
590 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
591 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
592 | * @retval None |
||
593 | */ |
||
594 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
||
595 | do{ \ |
||
596 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
597 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
||
598 | } while(0U) |
||
599 | |||
600 | /** @brief Disable CTS flow control |
||
601 | * @note This macro allows to disable CTS hardware flow control for a given UART instance, |
||
602 | * without need to call HAL_UART_Init() function. |
||
603 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
604 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
605 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
606 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
607 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
608 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
609 | * @param __HANDLE__ specifies the UART Handle. |
||
610 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
611 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
612 | * @retval None |
||
613 | */ |
||
614 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
||
615 | do{ \ |
||
616 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
617 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
||
618 | } while(0U) |
||
619 | |||
620 | /** @brief Enable RTS flow control |
||
621 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
||
622 | * without need to call HAL_UART_Init() function. |
||
623 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
624 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
625 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
626 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
627 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
628 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
629 | * @param __HANDLE__ specifies the UART Handle. |
||
630 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
631 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
632 | * @retval None |
||
633 | */ |
||
634 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
||
635 | do{ \ |
||
636 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
||
637 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
||
638 | } while(0U) |
||
639 | |||
640 | /** @brief Disable RTS flow control |
||
641 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
||
642 | * without need to call HAL_UART_Init() function. |
||
643 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
644 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
645 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
646 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
647 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
648 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
649 | * @param __HANDLE__ specifies the UART Handle. |
||
650 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
651 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
652 | * @retval None |
||
653 | */ |
||
654 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
||
655 | do{ \ |
||
656 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
||
657 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
||
658 | } while(0U) |
||
659 | #if defined(USART_CR3_ONEBIT) |
||
660 | |||
661 | /** @brief Macro to enable the UART's one bit sample method |
||
662 | * @param __HANDLE__ specifies the UART Handle. |
||
663 | * @retval None |
||
664 | */ |
||
665 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||
666 | |||
667 | /** @brief Macro to disable the UART's one bit sample method |
||
668 | * @param __HANDLE__ specifies the UART Handle. |
||
669 | * @retval None |
||
670 | */ |
||
671 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
||
672 | #endif /* UART_ONE_BIT_SAMPLE_Feature */ |
||
673 | |||
674 | /** @brief Enable UART |
||
675 | * @param __HANDLE__ specifies the UART Handle. |
||
676 | * @retval None |
||
677 | */ |
||
678 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
||
679 | |||
680 | /** @brief Disable UART |
||
681 | * @param __HANDLE__ specifies the UART Handle. |
||
682 | * @retval None |
||
683 | */ |
||
684 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||
685 | /** |
||
686 | * @} |
||
687 | */ |
||
688 | |||
689 | /* Exported functions --------------------------------------------------------*/ |
||
690 | /** @addtogroup UART_Exported_Functions |
||
691 | * @{ |
||
692 | */ |
||
693 | |||
694 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
||
695 | * @{ |
||
696 | */ |
||
697 | |||
698 | /* Initialization/de-initialization functions **********************************/ |
||
699 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
||
700 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
||
701 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
||
702 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
||
703 | HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); |
||
704 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
||
705 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
||
706 | |||
707 | /* Callbacks Register/UnRegister functions ***********************************/ |
||
708 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
709 | HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback); |
||
710 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); |
||
711 | |||
712 | HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); |
||
713 | HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); |
||
714 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
||
715 | |||
716 | /** |
||
717 | * @} |
||
718 | */ |
||
719 | |||
720 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions |
||
721 | * @{ |
||
722 | */ |
||
723 | |||
724 | /* IO operation functions *******************************************************/ |
||
725 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
726 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
727 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
728 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
729 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
730 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
731 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
||
732 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
||
733 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
||
734 | |||
735 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, uint32_t Timeout); |
||
736 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
737 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
738 | |||
739 | /* Transfer Abort functions */ |
||
740 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
||
741 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
||
742 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
||
743 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
||
744 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
||
745 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
||
746 | |||
747 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
||
748 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
||
749 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
750 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
||
751 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
752 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
||
753 | void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); |
||
754 | void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); |
||
755 | void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); |
||
756 | |||
757 | void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); |
||
758 | |||
759 | /** |
||
760 | * @} |
||
761 | */ |
||
762 | |||
763 | /** @addtogroup UART_Exported_Functions_Group3 |
||
764 | * @{ |
||
765 | */ |
||
766 | /* Peripheral Control functions ************************************************/ |
||
767 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
||
768 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
||
769 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
||
770 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
||
771 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
||
772 | /** |
||
773 | * @} |
||
774 | */ |
||
775 | |||
776 | /** @addtogroup UART_Exported_Functions_Group4 |
||
777 | * @{ |
||
778 | */ |
||
779 | /* Peripheral State functions **************************************************/ |
||
780 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
||
781 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
||
782 | /** |
||
783 | * @} |
||
784 | */ |
||
785 | |||
786 | /** |
||
787 | * @} |
||
788 | */ |
||
789 | /* Private types -------------------------------------------------------------*/ |
||
790 | /* Private variables ---------------------------------------------------------*/ |
||
791 | /* Private constants ---------------------------------------------------------*/ |
||
792 | /** @defgroup UART_Private_Constants UART Private Constants |
||
793 | * @{ |
||
794 | */ |
||
795 | /** @brief UART interruptions flag mask |
||
796 | * |
||
797 | */ |
||
798 | #define UART_IT_MASK 0x0000FFFFU |
||
799 | |||
800 | #define UART_CR1_REG_INDEX 1U |
||
801 | #define UART_CR2_REG_INDEX 2U |
||
802 | #define UART_CR3_REG_INDEX 3U |
||
803 | /** |
||
804 | * @} |
||
805 | */ |
||
806 | |||
807 | /* Private macros ------------------------------------------------------------*/ |
||
808 | /** @defgroup UART_Private_Macros UART Private Macros |
||
809 | * @{ |
||
810 | */ |
||
811 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
||
812 | ((LENGTH) == UART_WORDLENGTH_9B)) |
||
813 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
||
814 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
||
815 | ((STOPBITS) == UART_STOPBITS_2)) |
||
816 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
||
817 | ((PARITY) == UART_PARITY_EVEN) || \ |
||
818 | ((PARITY) == UART_PARITY_ODD)) |
||
819 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
||
820 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
||
821 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
||
822 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
||
823 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
||
824 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
||
825 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
||
826 | ((STATE) == UART_STATE_ENABLE)) |
||
827 | #if defined(USART_CR1_OVER8) |
||
828 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
||
829 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
||
830 | #endif /* USART_CR1_OVER8 */ |
||
831 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
||
832 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
||
833 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
||
834 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
||
835 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
||
836 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 4500000U) |
||
837 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
||
838 | |||
839 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
||
840 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
||
841 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U) |
||
842 | /* UART BRR = mantissa + overflow + fraction |
||
843 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
||
844 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
||
845 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
||
846 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
||
847 | |||
848 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
||
849 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
||
850 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U) + 50U) / 100U) |
||
851 | /* UART BRR = mantissa + overflow + fraction |
||
852 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
||
853 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
||
854 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
||
855 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
||
856 | |||
857 | /** |
||
858 | * @} |
||
859 | */ |
||
860 | |||
861 | /* Private functions ---------------------------------------------------------*/ |
||
862 | /** @defgroup UART_Private_Functions UART Private Functions |
||
863 | * @{ |
||
864 | */ |
||
865 | |||
866 | HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
867 | HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
868 | |||
869 | /** |
||
870 | * @} |
||
871 | */ |
||
872 | |||
873 | /** |
||
874 | * @} |
||
875 | */ |
||
876 | |||
877 | /** |
||
878 | * @} |
||
879 | */ |
||
880 | |||
881 | #ifdef __cplusplus |
||
882 | } |
||
883 | #endif |
||
884 | |||
885 | #endif /* __STM32F1xx_HAL_UART_H */ |
||
886 | |||
887 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |