Details | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
2 | mjames | 1 | /** |
2 | ****************************************************************************** |
||
3 | * @file stm32f1xx_hal_uart.h |
||
4 | * @author MCD Application Team |
||
5 | * @brief Header file of UART HAL module. |
||
6 | ****************************************************************************** |
||
7 | * @attention |
||
8 | * |
||
9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
||
10 | * All rights reserved.</center></h2> |
||
11 | * |
||
12 | * This software component is licensed by ST under BSD 3-Clause license, |
||
13 | * the "License"; You may not use this file except in compliance with the |
||
14 | * License. You may obtain a copy of the License at: |
||
15 | * opensource.org/licenses/BSD-3-Clause |
||
16 | * |
||
17 | ****************************************************************************** |
||
18 | */ |
||
19 | |||
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
||
21 | #ifndef __STM32F1xx_HAL_UART_H |
||
22 | #define __STM32F1xx_HAL_UART_H |
||
23 | |||
24 | #ifdef __cplusplus |
||
25 | extern "C" { |
||
26 | #endif |
||
27 | |||
28 | /* Includes ------------------------------------------------------------------*/ |
||
29 | #include "stm32f1xx_hal_def.h" |
||
30 | |||
31 | /** @addtogroup STM32F1xx_HAL_Driver |
||
32 | * @{ |
||
33 | */ |
||
34 | |||
35 | /** @addtogroup UART |
||
36 | * @{ |
||
37 | */ |
||
38 | |||
39 | /* Exported types ------------------------------------------------------------*/ |
||
40 | /** @defgroup UART_Exported_Types UART Exported Types |
||
41 | * @{ |
||
42 | */ |
||
43 | |||
44 | /** |
||
45 | * @brief UART Init Structure definition |
||
46 | */ |
||
47 | typedef struct |
||
48 | { |
||
49 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
||
50 | The baud rate is computed using the following formula: |
||
51 | - IntegerDivider = ((PCLKx) / (16 * (huart->Init.BaudRate))) |
||
52 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */ |
||
53 | |||
54 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
||
55 | This parameter can be a value of @ref UART_Word_Length */ |
||
56 | |||
57 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
||
58 | This parameter can be a value of @ref UART_Stop_Bits */ |
||
59 | |||
60 | uint32_t Parity; /*!< Specifies the parity mode. |
||
61 | This parameter can be a value of @ref UART_Parity |
||
62 | @note When parity is enabled, the computed parity is inserted |
||
63 | at the MSB position of the transmitted data (9th bit when |
||
64 | the word length is set to 9 data bits; 8th bit when the |
||
65 | word length is set to 8 data bits). */ |
||
66 | |||
67 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
||
68 | This parameter can be a value of @ref UART_Mode */ |
||
69 | |||
70 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. |
||
71 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
||
72 | |||
73 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
||
74 | This parameter can be a value of @ref UART_Over_Sampling. This feature is only available |
||
75 | on STM32F100xx family, so OverSampling parameter should always be set to 16. */ |
||
76 | } UART_InitTypeDef; |
||
77 | |||
78 | /** |
||
79 | * @brief HAL UART State structures definition |
||
80 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
||
81 | * - gState contains UART state information related to global Handle management |
||
82 | * and also information related to Tx operations. |
||
83 | * gState value coding follow below described bitmap : |
||
84 | * b7-b6 Error information |
||
85 | * 00 : No Error |
||
86 | * 01 : (Not Used) |
||
87 | * 10 : Timeout |
||
88 | * 11 : Error |
||
89 | * b5 Peripheral initialization status |
||
90 | * 0 : Reset (Peripheral not initialized) |
||
91 | * 1 : Init done (Peripheral not initialized. HAL UART Init function already called) |
||
92 | * b4-b3 (not used) |
||
93 | * xx : Should be set to 00 |
||
94 | * b2 Intrinsic process state |
||
95 | * 0 : Ready |
||
96 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
||
97 | * b1 (not used) |
||
98 | * x : Should be set to 0 |
||
99 | * b0 Tx state |
||
100 | * 0 : Ready (no Tx operation ongoing) |
||
101 | * 1 : Busy (Tx operation ongoing) |
||
102 | * - RxState contains information related to Rx operations. |
||
103 | * RxState value coding follow below described bitmap : |
||
104 | * b7-b6 (not used) |
||
105 | * xx : Should be set to 00 |
||
106 | * b5 Peripheral initialization status |
||
107 | * 0 : Reset (Peripheral not initialized) |
||
108 | * 1 : Init done (Peripheral not initialized) |
||
109 | * b4-b2 (not used) |
||
110 | * xxx : Should be set to 000 |
||
111 | * b1 Rx state |
||
112 | * 0 : Ready (no Rx operation ongoing) |
||
113 | * 1 : Busy (Rx operation ongoing) |
||
114 | * b0 (not used) |
||
115 | * x : Should be set to 0. |
||
116 | */ |
||
117 | typedef enum |
||
118 | { |
||
119 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
||
120 | Value is allowed for gState and RxState */ |
||
121 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
||
122 | Value is allowed for gState and RxState */ |
||
123 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
||
124 | Value is allowed for gState only */ |
||
125 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
||
126 | Value is allowed for gState only */ |
||
127 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
||
128 | Value is allowed for RxState only */ |
||
129 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
||
130 | Not to be used for neither gState nor RxState. |
||
131 | Value is result of combination (Or) between gState and RxState values */ |
||
132 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
||
133 | Value is allowed for gState only */ |
||
134 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
||
135 | Value is allowed for gState only */ |
||
136 | } HAL_UART_StateTypeDef; |
||
137 | |||
138 | /** |
||
139 | * @brief UART handle Structure definition |
||
140 | */ |
||
141 | typedef struct __UART_HandleTypeDef |
||
142 | { |
||
143 | USART_TypeDef *Instance; /*!< UART registers base address */ |
||
144 | |||
145 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
||
146 | |||
147 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
||
148 | |||
149 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
||
150 | |||
151 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
||
152 | |||
153 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
||
154 | |||
155 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
||
156 | |||
157 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
||
158 | |||
159 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
||
160 | |||
161 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
||
162 | |||
163 | HAL_LockTypeDef Lock; /*!< Locking object */ |
||
164 | |||
165 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
||
166 | and also related to Tx operations. |
||
167 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
||
168 | |||
169 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
||
170 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
||
171 | |||
172 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
||
173 | |||
174 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
175 | void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ |
||
176 | void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ |
||
177 | void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ |
||
178 | void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ |
||
179 | void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ |
||
180 | void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ |
||
181 | void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ |
||
182 | void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ |
||
183 | void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ |
||
184 | |||
185 | void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ |
||
186 | void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ |
||
187 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
||
188 | |||
189 | } UART_HandleTypeDef; |
||
190 | |||
191 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
192 | /** |
||
193 | * @brief HAL UART Callback ID enumeration definition |
||
194 | */ |
||
195 | typedef enum |
||
196 | { |
||
197 | HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ |
||
198 | HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ |
||
199 | HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ |
||
200 | HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ |
||
201 | HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ |
||
202 | HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ |
||
203 | HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ |
||
204 | HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ |
||
205 | HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ |
||
206 | |||
207 | HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ |
||
208 | HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ |
||
209 | |||
210 | } HAL_UART_CallbackIDTypeDef; |
||
211 | |||
212 | /** |
||
213 | * @brief HAL UART Callback pointer definition |
||
214 | */ |
||
215 | typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ |
||
216 | |||
217 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
||
218 | |||
219 | /** |
||
220 | * @} |
||
221 | */ |
||
222 | |||
223 | /* Exported constants --------------------------------------------------------*/ |
||
224 | /** @defgroup UART_Exported_Constants UART Exported Constants |
||
225 | * @{ |
||
226 | */ |
||
227 | |||
228 | /** @defgroup UART_Error_Code UART Error Code |
||
229 | * @{ |
||
230 | */ |
||
231 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
||
232 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
||
233 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
||
234 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
||
235 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
||
236 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
||
237 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
238 | #define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */ |
||
239 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
||
240 | /** |
||
241 | * @} |
||
242 | */ |
||
243 | |||
244 | /** @defgroup UART_Word_Length UART Word Length |
||
245 | * @{ |
||
246 | */ |
||
247 | #define UART_WORDLENGTH_8B 0x00000000U |
||
248 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
||
249 | /** |
||
250 | * @} |
||
251 | */ |
||
252 | |||
253 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
||
254 | * @{ |
||
255 | */ |
||
256 | #define UART_STOPBITS_1 0x00000000U |
||
257 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
||
258 | /** |
||
259 | * @} |
||
260 | */ |
||
261 | |||
262 | /** @defgroup UART_Parity UART Parity |
||
263 | * @{ |
||
264 | */ |
||
265 | #define UART_PARITY_NONE 0x00000000U |
||
266 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
||
267 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
||
268 | /** |
||
269 | * @} |
||
270 | */ |
||
271 | |||
272 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
||
273 | * @{ |
||
274 | */ |
||
275 | #define UART_HWCONTROL_NONE 0x00000000U |
||
276 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
||
277 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
||
278 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
||
279 | /** |
||
280 | * @} |
||
281 | */ |
||
282 | |||
283 | /** @defgroup UART_Mode UART Transfer Mode |
||
284 | * @{ |
||
285 | */ |
||
286 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
||
287 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
||
288 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE)) |
||
289 | /** |
||
290 | * @} |
||
291 | */ |
||
292 | |||
293 | /** @defgroup UART_State UART State |
||
294 | * @{ |
||
295 | */ |
||
296 | #define UART_STATE_DISABLE 0x00000000U |
||
297 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
||
298 | /** |
||
299 | * @} |
||
300 | */ |
||
301 | |||
302 | /** @defgroup UART_Over_Sampling UART Over Sampling |
||
303 | * @{ |
||
304 | */ |
||
305 | #define UART_OVERSAMPLING_16 0x00000000U |
||
306 | #if defined(USART_CR1_OVER8) |
||
307 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
||
308 | #endif /* USART_CR1_OVER8 */ |
||
309 | /** |
||
310 | * @} |
||
311 | */ |
||
312 | |||
313 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
||
314 | * @{ |
||
315 | */ |
||
316 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
||
317 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
||
318 | /** |
||
319 | * @} |
||
320 | */ |
||
321 | |||
322 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
||
323 | * @{ |
||
324 | */ |
||
325 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
||
326 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
||
327 | /** |
||
328 | * @} |
||
329 | */ |
||
330 | |||
331 | /** @defgroup UART_Flags UART FLags |
||
332 | * Elements values convention: 0xXXXX |
||
333 | * - 0xXXXX : Flag mask in the SR register |
||
334 | * @{ |
||
335 | */ |
||
336 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
||
337 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
||
338 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
||
339 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
||
340 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
||
341 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
||
342 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
||
343 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
||
344 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
||
345 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
||
346 | /** |
||
347 | * @} |
||
348 | */ |
||
349 | |||
350 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
||
351 | * Elements values convention: 0xY000XXXX |
||
352 | * - XXXX : Interrupt mask (16 bits) in the Y register |
||
353 | * - Y : Interrupt source register (2bits) |
||
354 | * - 0001: CR1 register |
||
355 | * - 0010: CR2 register |
||
356 | * - 0011: CR3 register |
||
357 | * @{ |
||
358 | */ |
||
359 | |||
360 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
||
361 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
||
362 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
||
363 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
||
364 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
||
365 | |||
366 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
||
367 | |||
368 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
||
369 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
||
370 | /** |
||
371 | * @} |
||
372 | */ |
||
373 | |||
374 | /** |
||
375 | * @} |
||
376 | */ |
||
377 | |||
378 | /* Exported macro ------------------------------------------------------------*/ |
||
379 | /** @defgroup UART_Exported_Macros UART Exported Macros |
||
380 | * @{ |
||
381 | */ |
||
382 | |||
383 | /** @brief Reset UART handle gstate & RxState |
||
384 | * @param __HANDLE__ specifies the UART Handle. |
||
385 | * UART Handle selects the USARTx or UARTy peripheral |
||
386 | * (USART,UART availability and x,y values depending on device). |
||
387 | * @retval None |
||
388 | */ |
||
389 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
390 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
||
391 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
||
392 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
||
393 | (__HANDLE__)->MspInitCallback = NULL; \ |
||
394 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
||
395 | } while(0U) |
||
396 | #else |
||
397 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
||
398 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
||
399 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
||
400 | } while(0U) |
||
401 | #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ |
||
402 | |||
403 | /** @brief Flushes the UART DR register |
||
404 | * @param __HANDLE__ specifies the UART Handle. |
||
405 | * UART Handle selects the USARTx or UARTy peripheral |
||
406 | * (USART,UART availability and x,y values depending on device). |
||
407 | */ |
||
408 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
||
409 | |||
410 | /** @brief Checks whether the specified UART flag is set or not. |
||
411 | * @param __HANDLE__ specifies the UART Handle. |
||
412 | * UART Handle selects the USARTx or UARTy peripheral |
||
413 | * (USART,UART availability and x,y values depending on device). |
||
414 | * @param __FLAG__ specifies the flag to check. |
||
415 | * This parameter can be one of the following values: |
||
416 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
||
417 | * @arg UART_FLAG_LBD: LIN Break detection flag |
||
418 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
||
419 | * @arg UART_FLAG_TC: Transmission Complete flag |
||
420 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
||
421 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
||
422 | * @arg UART_FLAG_ORE: Overrun Error flag |
||
423 | * @arg UART_FLAG_NE: Noise Error flag |
||
424 | * @arg UART_FLAG_FE: Framing Error flag |
||
425 | * @arg UART_FLAG_PE: Parity Error flag |
||
426 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
||
427 | */ |
||
428 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||
429 | |||
430 | /** @brief Clears the specified UART pending flag. |
||
431 | * @param __HANDLE__ specifies the UART Handle. |
||
432 | * UART Handle selects the USARTx or UARTy peripheral |
||
433 | * (USART,UART availability and x,y values depending on device). |
||
434 | * @param __FLAG__ specifies the flag to check. |
||
435 | * This parameter can be any combination of the following values: |
||
436 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
||
437 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
||
438 | * @arg UART_FLAG_TC: Transmission Complete flag. |
||
439 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
||
440 | * |
||
441 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
||
442 | * error) and IDLE (Idle line detected) flags are cleared by software |
||
443 | * sequence: a read operation to USART_SR register followed by a read |
||
444 | * operation to USART_DR register. |
||
445 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
||
446 | * @note TC flag can be also cleared by software sequence: a read operation to |
||
447 | * USART_SR register followed by a write operation to USART_DR register. |
||
448 | * @note TXE flag is cleared only by a write to the USART_DR register. |
||
449 | * |
||
450 | * @retval None |
||
451 | */ |
||
452 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
||
453 | |||
454 | /** @brief Clears the UART PE pending flag. |
||
455 | * @param __HANDLE__ specifies the UART Handle. |
||
456 | * UART Handle selects the USARTx or UARTy peripheral |
||
457 | * (USART,UART availability and x,y values depending on device). |
||
458 | * @retval None |
||
459 | */ |
||
460 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
||
461 | do{ \ |
||
462 | __IO uint32_t tmpreg = 0x00U; \ |
||
463 | tmpreg = (__HANDLE__)->Instance->SR; \ |
||
464 | tmpreg = (__HANDLE__)->Instance->DR; \ |
||
465 | UNUSED(tmpreg); \ |
||
466 | } while(0U) |
||
467 | |||
468 | /** @brief Clears the UART FE pending flag. |
||
469 | * @param __HANDLE__ specifies the UART Handle. |
||
470 | * UART Handle selects the USARTx or UARTy peripheral |
||
471 | * (USART,UART availability and x,y values depending on device). |
||
472 | * @retval None |
||
473 | */ |
||
474 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
475 | |||
476 | /** @brief Clears the UART NE pending flag. |
||
477 | * @param __HANDLE__ specifies the UART Handle. |
||
478 | * UART Handle selects the USARTx or UARTy peripheral |
||
479 | * (USART,UART availability and x,y values depending on device). |
||
480 | * @retval None |
||
481 | */ |
||
482 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
483 | |||
484 | /** @brief Clears the UART ORE pending flag. |
||
485 | * @param __HANDLE__ specifies the UART Handle. |
||
486 | * UART Handle selects the USARTx or UARTy peripheral |
||
487 | * (USART,UART availability and x,y values depending on device). |
||
488 | * @retval None |
||
489 | */ |
||
490 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
491 | |||
492 | /** @brief Clears the UART IDLE pending flag. |
||
493 | * @param __HANDLE__ specifies the UART Handle. |
||
494 | * UART Handle selects the USARTx or UARTy peripheral |
||
495 | * (USART,UART availability and x,y values depending on device). |
||
496 | * @retval None |
||
497 | */ |
||
498 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
499 | |||
500 | /** @brief Enable the specified UART interrupt. |
||
501 | * @param __HANDLE__ specifies the UART Handle. |
||
502 | * UART Handle selects the USARTx or UARTy peripheral |
||
503 | * (USART,UART availability and x,y values depending on device). |
||
504 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. |
||
505 | * This parameter can be one of the following values: |
||
506 | * @arg UART_IT_CTS: CTS change interrupt |
||
507 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
508 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
509 | * @arg UART_IT_TC: Transmission complete interrupt |
||
510 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
511 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
512 | * @arg UART_IT_PE: Parity Error interrupt |
||
513 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
514 | * @retval None |
||
515 | */ |
||
516 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
517 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
518 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
||
519 | |||
520 | /** @brief Disable the specified UART interrupt. |
||
521 | * @param __HANDLE__ specifies the UART Handle. |
||
522 | * UART Handle selects the USARTx or UARTy peripheral |
||
523 | * (USART,UART availability and x,y values depending on device). |
||
524 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. |
||
525 | * This parameter can be one of the following values: |
||
526 | * @arg UART_IT_CTS: CTS change interrupt |
||
527 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
528 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
529 | * @arg UART_IT_TC: Transmission complete interrupt |
||
530 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
531 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
532 | * @arg UART_IT_PE: Parity Error interrupt |
||
533 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
534 | * @retval None |
||
535 | */ |
||
536 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
537 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
538 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
||
539 | |||
540 | /** @brief Checks whether the specified UART interrupt has occurred or not. |
||
541 | * @param __HANDLE__ specifies the UART Handle. |
||
542 | * UART Handle selects the USARTx or UARTy peripheral |
||
543 | * (USART,UART availability and x,y values depending on device). |
||
544 | * @param __IT__ specifies the UART interrupt source to check. |
||
545 | * This parameter can be one of the following values: |
||
546 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
||
547 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
548 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
549 | * @arg UART_IT_TC: Transmission complete interrupt |
||
550 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
551 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
552 | * @arg UART_IT_ERR: Error interrupt |
||
553 | * @retval The new state of __IT__ (TRUE or FALSE). |
||
554 | */ |
||
555 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ |
||
556 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
||
557 | |||
558 | /** @brief Enable CTS flow control |
||
559 | * @note This macro allows to enable CTS hardware flow control for a given UART instance, |
||
560 | * without need to call HAL_UART_Init() function. |
||
561 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
562 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
563 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
564 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
565 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
566 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
567 | * @param __HANDLE__ specifies the UART Handle. |
||
568 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
569 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
570 | * @retval None |
||
571 | */ |
||
572 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
||
573 | do{ \ |
||
574 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
575 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
||
576 | } while(0U) |
||
577 | |||
578 | /** @brief Disable CTS flow control |
||
579 | * @note This macro allows to disable CTS hardware flow control for a given UART instance, |
||
580 | * without need to call HAL_UART_Init() function. |
||
581 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
582 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
583 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
584 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
585 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
586 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
587 | * @param __HANDLE__ specifies the UART Handle. |
||
588 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
589 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
590 | * @retval None |
||
591 | */ |
||
592 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
||
593 | do{ \ |
||
594 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
595 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
||
596 | } while(0U) |
||
597 | |||
598 | /** @brief Enable RTS flow control |
||
599 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
||
600 | * without need to call HAL_UART_Init() function. |
||
601 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
602 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
603 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
604 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
605 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
606 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
607 | * @param __HANDLE__ specifies the UART Handle. |
||
608 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
609 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
610 | * @retval None |
||
611 | */ |
||
612 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
||
613 | do{ \ |
||
614 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
||
615 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
||
616 | } while(0U) |
||
617 | |||
618 | /** @brief Disable RTS flow control |
||
619 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
||
620 | * without need to call HAL_UART_Init() function. |
||
621 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
622 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
623 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
624 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
625 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
626 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
627 | * @param __HANDLE__ specifies the UART Handle. |
||
628 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
629 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
630 | * @retval None |
||
631 | */ |
||
632 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
||
633 | do{ \ |
||
634 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
||
635 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
||
636 | } while(0U) |
||
637 | #if defined(USART_CR3_ONEBIT) |
||
638 | |||
639 | /** @brief Macro to enable the UART's one bit sample method |
||
640 | * @param __HANDLE__ specifies the UART Handle. |
||
641 | * @retval None |
||
642 | */ |
||
643 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||
644 | |||
645 | /** @brief Macro to disable the UART's one bit sample method |
||
646 | * @param __HANDLE__ specifies the UART Handle. |
||
647 | * @retval None |
||
648 | */ |
||
649 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
||
650 | #endif /* UART_ONE_BIT_SAMPLE_Feature */ |
||
651 | |||
652 | /** @brief Enable UART |
||
653 | * @param __HANDLE__ specifies the UART Handle. |
||
654 | * @retval None |
||
655 | */ |
||
656 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
||
657 | |||
658 | /** @brief Disable UART |
||
659 | * @param __HANDLE__ specifies the UART Handle. |
||
660 | * @retval None |
||
661 | */ |
||
662 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||
663 | /** |
||
664 | * @} |
||
665 | */ |
||
666 | |||
667 | /* Exported functions --------------------------------------------------------*/ |
||
668 | /** @addtogroup UART_Exported_Functions |
||
669 | * @{ |
||
670 | */ |
||
671 | |||
672 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
||
673 | * @{ |
||
674 | */ |
||
675 | |||
676 | /* Initialization/de-initialization functions **********************************/ |
||
677 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
||
678 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
||
679 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
||
680 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
||
681 | HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); |
||
682 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
||
683 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
||
684 | |||
685 | /* Callbacks Register/UnRegister functions ***********************************/ |
||
686 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
687 | HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback); |
||
688 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); |
||
689 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
||
690 | |||
691 | /** |
||
692 | * @} |
||
693 | */ |
||
694 | |||
695 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions |
||
696 | * @{ |
||
697 | */ |
||
698 | |||
699 | /* IO operation functions *******************************************************/ |
||
700 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
701 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
702 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
703 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
704 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
705 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
706 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
||
707 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
||
708 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
||
709 | /* Transfer Abort functions */ |
||
710 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
||
711 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
||
712 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
||
713 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
||
714 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
||
715 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
||
716 | |||
717 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
||
718 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
||
719 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
720 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
||
721 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
722 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
||
723 | void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); |
||
724 | void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); |
||
725 | void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); |
||
726 | |||
727 | /** |
||
728 | * @} |
||
729 | */ |
||
730 | |||
731 | /** @addtogroup UART_Exported_Functions_Group3 |
||
732 | * @{ |
||
733 | */ |
||
734 | /* Peripheral Control functions ************************************************/ |
||
735 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
||
736 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
||
737 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
||
738 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
||
739 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
||
740 | /** |
||
741 | * @} |
||
742 | */ |
||
743 | |||
744 | /** @addtogroup UART_Exported_Functions_Group4 |
||
745 | * @{ |
||
746 | */ |
||
747 | /* Peripheral State functions **************************************************/ |
||
748 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
||
749 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
||
750 | /** |
||
751 | * @} |
||
752 | */ |
||
753 | |||
754 | /** |
||
755 | * @} |
||
756 | */ |
||
757 | /* Private types -------------------------------------------------------------*/ |
||
758 | /* Private variables ---------------------------------------------------------*/ |
||
759 | /* Private constants ---------------------------------------------------------*/ |
||
760 | /** @defgroup UART_Private_Constants UART Private Constants |
||
761 | * @{ |
||
762 | */ |
||
763 | /** @brief UART interruptions flag mask |
||
764 | * |
||
765 | */ |
||
766 | #define UART_IT_MASK 0x0000FFFFU |
||
767 | |||
768 | #define UART_CR1_REG_INDEX 1U |
||
769 | #define UART_CR2_REG_INDEX 2U |
||
770 | #define UART_CR3_REG_INDEX 3U |
||
771 | /** |
||
772 | * @} |
||
773 | */ |
||
774 | |||
775 | /* Private macros ------------------------------------------------------------*/ |
||
776 | /** @defgroup UART_Private_Macros UART Private Macros |
||
777 | * @{ |
||
778 | */ |
||
779 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
||
780 | ((LENGTH) == UART_WORDLENGTH_9B)) |
||
781 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
||
782 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
||
783 | ((STOPBITS) == UART_STOPBITS_2)) |
||
784 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
||
785 | ((PARITY) == UART_PARITY_EVEN) || \ |
||
786 | ((PARITY) == UART_PARITY_ODD)) |
||
787 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
||
788 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
||
789 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
||
790 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
||
791 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
||
792 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
||
793 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
||
794 | ((STATE) == UART_STATE_ENABLE)) |
||
795 | #if defined(USART_CR1_OVER8) |
||
796 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
||
797 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
||
798 | #endif /* USART_CR1_OVER8 */ |
||
799 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
||
800 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
||
801 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
||
802 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
||
803 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
||
804 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 4500000U) |
||
805 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
||
806 | |||
807 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
||
808 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
||
809 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U) |
||
810 | /* UART BRR = mantissa + overflow + fraction |
||
811 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
||
812 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
||
813 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
||
814 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
||
815 | |||
816 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
||
817 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
||
818 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U) |
||
819 | /* UART BRR = mantissa + overflow + fraction |
||
820 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
||
821 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
||
822 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
||
823 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
||
824 | |||
825 | /** |
||
826 | * @} |
||
827 | */ |
||
828 | |||
829 | /* Private functions ---------------------------------------------------------*/ |
||
830 | /** @defgroup UART_Private_Functions UART Private Functions |
||
831 | * @{ |
||
832 | */ |
||
833 | |||
834 | /** |
||
835 | * @} |
||
836 | */ |
||
837 | |||
838 | /** |
||
839 | * @} |
||
840 | */ |
||
841 | |||
842 | /** |
||
843 | * @} |
||
844 | */ |
||
845 | |||
846 | #ifdef __cplusplus |
||
847 | } |
||
848 | #endif |
||
849 | |||
850 | #endif /* __STM32F1xx_HAL_UART_H */ |
||
851 | |||
852 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |