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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_uart.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of UART HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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| 10 | * |
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| 11 | * Redistribution and use in source and binary forms, with or without modification, |
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| 12 | * are permitted provided that the following conditions are met: |
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| 13 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 14 | * this list of conditions and the following disclaimer. |
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| 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 16 | * this list of conditions and the following disclaimer in the documentation |
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| 17 | * and/or other materials provided with the distribution. |
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| 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 19 | * may be used to endorse or promote products derived from this software |
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| 20 | * without specific prior written permission. |
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| 21 | * |
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| 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 32 | * |
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| 33 | ****************************************************************************** |
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| 34 | */ |
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| 35 | |||
| 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 37 | #ifndef __STM32F1xx_HAL_UART_H |
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| 38 | #define __STM32F1xx_HAL_UART_H |
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| 39 | |||
| 40 | #ifdef __cplusplus |
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| 41 | extern "C" { |
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| 42 | #endif |
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| 43 | |||
| 44 | /* Includes ------------------------------------------------------------------*/ |
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| 45 | #include "stm32f1xx_hal_def.h" |
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| 46 | |||
| 47 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 48 | * @{ |
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| 49 | */ |
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| 50 | |||
| 51 | /** @addtogroup UART |
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| 52 | * @{ |
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| 53 | */ |
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| 54 | |||
| 55 | /* Exported types ------------------------------------------------------------*/ |
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| 56 | /** @defgroup UART_Exported_Types UART Exported Types |
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| 57 | * @{ |
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| 58 | */ |
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| 59 | |||
| 60 | /** |
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| 61 | * @brief UART Init Structure definition |
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| 62 | */ |
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| 63 | typedef struct |
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| 64 | { |
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| 65 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
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| 66 | The baud rate is computed using the following formula: |
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| 67 | - IntegerDivider = ((PCLKx) / (16 * (huart->Init.BaudRate))) |
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| 68 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */ |
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| 69 | |||
| 70 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
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| 71 | This parameter can be a value of @ref UART_Word_Length */ |
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| 72 | |||
| 73 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
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| 74 | This parameter can be a value of @ref UART_Stop_Bits */ |
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| 75 | |||
| 76 | uint32_t Parity; /*!< Specifies the parity mode. |
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| 77 | This parameter can be a value of @ref UART_Parity |
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| 78 | @note When parity is enabled, the computed parity is inserted |
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| 79 | at the MSB position of the transmitted data (9th bit when |
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| 80 | the word length is set to 9 data bits; 8th bit when the |
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| 81 | word length is set to 8 data bits). */ |
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| 82 | |||
| 83 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
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| 84 | This parameter can be a value of @ref UART_Mode */ |
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| 85 | |||
| 86 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. |
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| 87 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
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| 88 | |||
| 89 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
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| 90 | This parameter can be a value of @ref UART_Over_Sampling. This feature is only available |
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| 91 | on STM32F100xx family, so OverSampling parameter should always be set to 16. */ |
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| 92 | }UART_InitTypeDef; |
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| 93 | |||
| 94 | /** |
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| 95 | * @brief HAL UART State structures definition |
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| 96 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
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| 97 | * - gState contains UART state information related to global Handle management |
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| 98 | * and also information related to Tx operations. |
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| 99 | * gState value coding follow below described bitmap : |
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| 100 | * b7-b6 Error information |
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| 101 | * 00 : No Error |
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| 102 | * 01 : (Not Used) |
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| 103 | * 10 : Timeout |
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| 104 | * 11 : Error |
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| 105 | * b5 IP initilisation status |
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| 106 | * 0 : Reset (IP not initialized) |
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| 107 | * 1 : Init done (IP not initialized. HAL UART Init function already called) |
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| 108 | * b4-b3 (not used) |
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| 109 | * xx : Should be set to 00 |
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| 110 | * b2 Intrinsic process state |
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| 111 | * 0 : Ready |
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| 112 | * 1 : Busy (IP busy with some configuration or internal operations) |
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| 113 | * b1 (not used) |
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| 114 | * x : Should be set to 0 |
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| 115 | * b0 Tx state |
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| 116 | * 0 : Ready (no Tx operation ongoing) |
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| 117 | * 1 : Busy (Tx operation ongoing) |
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| 118 | * - RxState contains information related to Rx operations. |
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| 119 | * RxState value coding follow below described bitmap : |
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| 120 | * b7-b6 (not used) |
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| 121 | * xx : Should be set to 00 |
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| 122 | * b5 IP initilisation status |
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| 123 | * 0 : Reset (IP not initialized) |
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| 124 | * 1 : Init done (IP not initialized) |
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| 125 | * b4-b2 (not used) |
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| 126 | * xxx : Should be set to 000 |
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| 127 | * b1 Rx state |
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| 128 | * 0 : Ready (no Rx operation ongoing) |
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| 129 | * 1 : Busy (Rx operation ongoing) |
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| 130 | * b0 (not used) |
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| 131 | * x : Should be set to 0. |
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| 132 | */ |
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| 133 | typedef enum |
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| 134 | { |
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| 135 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
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| 136 | Value is allowed for gState and RxState */ |
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| 137 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
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| 138 | Value is allowed for gState and RxState */ |
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| 139 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
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| 140 | Value is allowed for gState only */ |
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| 141 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
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| 142 | Value is allowed for gState only */ |
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| 143 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
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| 144 | Value is allowed for RxState only */ |
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| 145 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
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| 146 | Not to be used for neither gState nor RxState. |
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| 147 | Value is result of combination (Or) between gState and RxState values */ |
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| 148 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
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| 149 | Value is allowed for gState only */ |
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| 150 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
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| 151 | Value is allowed for gState only */ |
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| 152 | }HAL_UART_StateTypeDef; |
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| 153 | |||
| 154 | /** |
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| 155 | * @brief UART handle Structure definition |
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| 156 | */ |
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| 157 | typedef struct |
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| 158 | { |
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| 159 | USART_TypeDef *Instance; /*!< UART registers base address */ |
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| 160 | |||
| 161 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
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| 162 | |||
| 163 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
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| 164 | |||
| 165 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
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| 166 | |||
| 167 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
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| 168 | |||
| 169 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
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| 170 | |||
| 171 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
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| 172 | |||
| 173 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
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| 174 | |||
| 175 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
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| 176 | |||
| 177 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
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| 178 | |||
| 179 | HAL_LockTypeDef Lock; /*!< Locking object */ |
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| 180 | |||
| 181 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
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| 182 | and also related to Tx operations. |
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| 183 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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| 184 | |||
| 185 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
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| 186 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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| 187 | |||
| 188 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
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| 189 | }UART_HandleTypeDef; |
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| 190 | |||
| 191 | /** |
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| 192 | * @} |
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| 193 | */ |
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| 194 | |||
| 195 | /* Exported constants --------------------------------------------------------*/ |
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| 196 | /** @defgroup UART_Exported_Constants UART Exported constants |
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| 197 | * @{ |
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| 198 | */ |
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| 199 | |||
| 200 | /** @defgroup UART_Error_Code UART Error Code |
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| 201 | * @{ |
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| 202 | */ |
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| 203 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
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| 204 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
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| 205 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
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| 206 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
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| 207 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
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| 208 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
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| 209 | /** |
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| 210 | * @} |
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| 211 | */ |
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| 212 | |||
| 213 | /** @defgroup UART_Word_Length UART Word Length |
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| 214 | * @{ |
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| 215 | */ |
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| 216 | #define UART_WORDLENGTH_8B 0x00000000U |
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| 217 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
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| 218 | /** |
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| 219 | * @} |
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| 220 | */ |
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| 221 | |||
| 222 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
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| 223 | * @{ |
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| 224 | */ |
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| 225 | #define UART_STOPBITS_1 0x00000000U |
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| 226 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
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| 227 | /** |
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| 228 | * @} |
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| 229 | */ |
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| 230 | |||
| 231 | /** @defgroup UART_Parity UART Parity |
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| 232 | * @{ |
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| 233 | */ |
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| 234 | #define UART_PARITY_NONE 0x00000000U |
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| 235 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
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| 236 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
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| 237 | /** |
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| 238 | * @} |
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| 239 | */ |
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| 240 | |||
| 241 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
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| 242 | * @{ |
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| 243 | */ |
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| 244 | #define UART_HWCONTROL_NONE 0x00000000U |
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| 245 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
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| 246 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
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| 247 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
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| 248 | /** |
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| 249 | * @} |
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| 250 | */ |
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| 251 | |||
| 252 | /** @defgroup UART_Mode UART Transfer Mode |
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| 253 | * @{ |
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| 254 | */ |
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| 255 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
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| 256 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
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| 257 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
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| 258 | /** |
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| 259 | * @} |
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| 260 | */ |
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| 261 | |||
| 262 | /** @defgroup UART_State UART State |
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| 263 | * @{ |
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| 264 | */ |
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| 265 | #define UART_STATE_DISABLE 0x00000000U |
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| 266 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
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| 267 | /** |
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| 268 | * @} |
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| 269 | */ |
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| 270 | |||
| 271 | |||
| 272 | /** @defgroup UART_Over_Sampling UART Over Sampling |
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| 273 | * @{ |
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| 274 | */ |
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| 275 | #define UART_OVERSAMPLING_16 0x00000000U |
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| 276 | #if defined(USART_CR1_OVER8) |
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| 277 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
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| 278 | #endif /* USART_CR1_OVER8 */ |
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| 279 | /** |
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| 280 | * @} |
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| 281 | */ |
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| 282 | |||
| 283 | |||
| 284 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
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| 285 | * @{ |
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| 286 | */ |
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| 287 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
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| 288 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
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| 289 | /** |
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| 290 | * @} |
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| 291 | */ |
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| 292 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
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| 293 | * @{ |
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| 294 | */ |
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| 295 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
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| 296 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
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| 297 | /** |
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| 298 | * @} |
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| 299 | */ |
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| 300 | |||
| 301 | /** @defgroup UART_Flags UART FLags |
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| 302 | * Elements values convention: 0xXXXX |
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| 303 | * - 0xXXXX : Flag mask in the SR register |
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| 304 | * @{ |
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| 305 | */ |
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| 306 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
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| 307 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
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| 308 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
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| 309 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
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| 310 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
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| 311 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
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| 312 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
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| 313 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
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| 314 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
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| 315 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
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| 316 | /** |
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| 317 | * @} |
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| 318 | */ |
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| 319 | |||
| 320 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
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| 321 | * Elements values convention: 0xY000XXXX |
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| 322 | * - XXXX : Interrupt mask (16 bits) in the Y register |
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| 323 | * - Y : Interrupt source register (2bits) |
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| 324 | * - 01: CR1 register |
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| 325 | * - 10: CR2 register |
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| 326 | * - 11: CR3 register |
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| 327 | * @{ |
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| 328 | */ |
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| 329 | |||
| 330 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
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| 331 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
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| 332 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
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| 333 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
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| 334 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
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| 335 | |||
| 336 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
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| 337 | |||
| 338 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
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| 339 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
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| 340 | /** |
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| 341 | * @} |
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| 342 | */ |
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| 343 | |||
| 344 | /** |
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| 345 | * @} |
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| 346 | */ |
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| 347 | |||
| 348 | /* Exported macro ------------------------------------------------------------*/ |
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| 349 | /** @defgroup UART_Exported_Macros UART Exported Macros |
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| 350 | * @{ |
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| 351 | */ |
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| 352 | |||
| 353 | /** @brief Reset UART handle gstate & RxState |
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| 354 | * @param __HANDLE__: specifies the UART Handle. |
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| 355 | * UART Handle selects the USARTx or UARTy peripheral |
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| 356 | * (USART,UART availability and x,y values depending on device). |
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| 357 | */ |
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| 358 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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| 359 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
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| 360 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
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| 361 | } while(0U) |
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| 362 | |||
| 363 | /** @brief Flushs the UART DR register |
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| 364 | * @param __HANDLE__: specifies the UART Handle. |
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| 365 | * UART Handle selects the USARTx or UARTy peripheral |
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| 366 | * (USART,UART availability and x,y values depending on device). |
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| 367 | */ |
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| 368 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
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| 369 | |||
| 370 | /** @brief Checks whether the specified UART flag is set or not. |
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| 371 | * @param __HANDLE__: specifies the UART Handle. |
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| 372 | * This parameter can be UARTx where x: 1, 2, 3, 4 or 5 to select the USART or |
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| 373 | * UART peripheral. |
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| 374 | * @param __FLAG__: specifies the flag to check. |
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| 375 | * This parameter can be one of the following values: |
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| 376 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
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| 377 | * @arg UART_FLAG_LBD: LIN Break detection flag |
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| 378 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
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| 379 | * @arg UART_FLAG_TC: Transmission Complete flag |
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| 380 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
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| 381 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
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| 382 | * @arg UART_FLAG_ORE: OverRun Error flag |
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| 383 | * @arg UART_FLAG_NE: Noise Error flag |
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| 384 | * @arg UART_FLAG_FE: Framing Error flag |
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| 385 | * @arg UART_FLAG_PE: Parity Error flag |
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| 386 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
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| 387 | */ |
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| 388 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
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| 389 | |||
| 390 | /** @brief Clears the specified UART pending flag. |
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| 391 | * @param __HANDLE__: specifies the UART Handle. |
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| 392 | * UART Handle selects the USARTx or UARTy peripheral |
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| 393 | * (USART,UART availability and x,y values depending on device). |
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| 394 | * @param __FLAG__: specifies the flag to check. |
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| 395 | * This parameter can be any combination of the following values: |
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| 396 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
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| 397 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
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| 398 | * @arg UART_FLAG_TC: Transmission Complete flag. |
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| 399 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
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| 400 | * |
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| 401 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun |
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| 402 | * error) and IDLE (Idle line detected) flags are cleared by software |
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| 403 | * sequence: a read operation to USART_SR register followed by a read |
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| 404 | * operation to USART_DR register. |
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| 405 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
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| 406 | * @note TC flag can be also cleared by software sequence: a read operation to |
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| 407 | * USART_SR register followed by a write operation to USART_DR register. |
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| 408 | * @note TXE flag is cleared only by a write to the USART_DR register. |
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| 409 | * |
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| 410 | */ |
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| 411 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
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| 412 | |||
| 413 | /** @brief Clears the UART PE pending flag. |
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| 414 | * @param __HANDLE__: specifies the UART Handle. |
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| 415 | * UART Handle selects the USARTx or UARTy peripheral |
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| 416 | * (USART,UART availability and x,y values depending on device). |
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| 417 | */ |
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| 418 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
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| 419 | do{ \ |
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| 420 | __IO uint32_t tmpreg = 0x00U; \ |
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| 421 | tmpreg = (__HANDLE__)->Instance->SR; \ |
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| 422 | tmpreg = (__HANDLE__)->Instance->DR; \ |
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| 423 | UNUSED(tmpreg); \ |
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| 424 | } while(0U) |
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| 425 | |||
| 426 | /** @brief Clears the UART FE pending flag. |
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| 427 | * @param __HANDLE__: specifies the UART Handle. |
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| 428 | * UART Handle selects the USARTx or UARTy peripheral |
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| 429 | * (USART,UART availability and x,y values depending on device). |
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| 430 | */ |
||
| 431 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 432 | |||
| 433 | /** @brief Clears the UART NE pending flag. |
||
| 434 | * @param __HANDLE__: specifies the UART Handle. |
||
| 435 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 436 | * (USART,UART availability and x,y values depending on device). |
||
| 437 | */ |
||
| 438 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 439 | |||
| 440 | /** @brief Clears the UART ORE pending flag. |
||
| 441 | * @param __HANDLE__: specifies the UART Handle. |
||
| 442 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 443 | * (USART,UART availability and x,y values depending on device). |
||
| 444 | */ |
||
| 445 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 446 | |||
| 447 | /** @brief Clears the UART IDLE pending flag. |
||
| 448 | * @param __HANDLE__: specifies the UART Handle. |
||
| 449 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 450 | * (USART,UART availability and x,y values depending on device). |
||
| 451 | */ |
||
| 452 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 453 | |||
| 454 | /** @brief Enable the specified UART interrupt. |
||
| 455 | * @param __HANDLE__: specifies the UART Handle. |
||
| 456 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 457 | * (USART,UART availability and x,y values depending on device). |
||
| 458 | * @param __INTERRUPT__: specifies the UART interrupt source to enable. |
||
| 459 | * This parameter can be one of the following values: |
||
| 460 | * @arg UART_IT_CTS: CTS change interrupt |
||
| 461 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 462 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 463 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 464 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 465 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 466 | * @arg UART_IT_PE: Parity Error interrupt |
||
| 467 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
| 468 | */ |
||
| 469 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 470 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 471 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
||
| 472 | |||
| 473 | /** @brief Disable the specified UART interrupt. |
||
| 474 | * @param __HANDLE__: specifies the UART Handle. |
||
| 475 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 476 | * (USART,UART availability and x,y values depending on device). |
||
| 477 | * @param __INTERRUPT__: specifies the UART interrupt source to disable. |
||
| 478 | * This parameter can be one of the following values: |
||
| 479 | * @arg UART_IT_CTS: CTS change interrupt |
||
| 480 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 481 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 482 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 483 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 484 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 485 | * @arg UART_IT_PE: Parity Error interrupt |
||
| 486 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
| 487 | */ |
||
| 488 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 489 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 490 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
||
| 491 | |||
| 492 | /** @brief Checks whether the specified UART interrupt has occurred or not. |
||
| 493 | * @param __HANDLE__: specifies the UART Handle. |
||
| 494 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 495 | * (USART,UART availability and x,y values depending on device). |
||
| 496 | * @param __IT__: specifies the UART interrupt source to check. |
||
| 497 | * This parameter can be one of the following values: |
||
| 498 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
||
| 499 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 500 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 501 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 502 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 503 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 504 | * @arg UART_IT_ERR: Error interrupt |
||
| 505 | * @retval The new state of __IT__ (TRUE or FALSE). |
||
| 506 | */ |
||
| 507 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ |
||
| 508 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
||
| 509 | |||
| 510 | /** @brief Enable CTS flow control |
||
| 511 | * This macro allows to enable CTS hardware flow control for a given UART instance, |
||
| 512 | * without need to call HAL_UART_Init() function. |
||
| 513 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 514 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 515 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 516 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 517 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 518 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 519 | * @param __HANDLE__: specifies the UART Handle. |
||
| 520 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 521 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 522 | */ |
||
| 523 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
||
| 524 | do{ \ |
||
| 525 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 526 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
||
| 527 | } while(0U) |
||
| 528 | |||
| 529 | /** @brief Disable CTS flow control |
||
| 530 | * This macro allows to disable CTS hardware flow control for a given UART instance, |
||
| 531 | * without need to call HAL_UART_Init() function. |
||
| 532 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 533 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 534 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 535 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 536 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 537 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 538 | * @param __HANDLE__: specifies the UART Handle. |
||
| 539 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 540 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 541 | */ |
||
| 542 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
||
| 543 | do{ \ |
||
| 544 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 545 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
||
| 546 | } while(0U) |
||
| 547 | |||
| 548 | /** @brief Enable RTS flow control |
||
| 549 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
||
| 550 | * without need to call HAL_UART_Init() function. |
||
| 551 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 552 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 553 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 554 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 555 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 556 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 557 | * @param __HANDLE__: specifies the UART Handle. |
||
| 558 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 559 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 560 | */ |
||
| 561 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
||
| 562 | do{ \ |
||
| 563 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
||
| 564 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
||
| 565 | } while(0U) |
||
| 566 | |||
| 567 | /** @brief Disable RTS flow control |
||
| 568 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
||
| 569 | * without need to call HAL_UART_Init() function. |
||
| 570 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 571 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 572 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 573 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 574 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 575 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 576 | * @param __HANDLE__: specifies the UART Handle. |
||
| 577 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 578 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 579 | */ |
||
| 580 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
||
| 581 | do{ \ |
||
| 582 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
||
| 583 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
||
| 584 | } while(0U) |
||
| 585 | |||
| 586 | #if defined(USART_CR3_ONEBIT) |
||
| 587 | /** @brief macros to enables the UART's one bit sample method |
||
| 588 | * @param __HANDLE__: specifies the UART Handle. |
||
| 589 | */ |
||
| 590 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||
| 591 | |||
| 592 | /** @brief macros to disables the UART's one bit sample method |
||
| 593 | * @param __HANDLE__: specifies the UART Handle. |
||
| 594 | * @retval None |
||
| 595 | */ |
||
| 596 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
||
| 597 | #endif /* USART_CR3_ONEBIT */ |
||
| 598 | |||
| 599 | /** @brief Enable UART |
||
| 600 | * @param __HANDLE__: specifies the UART Handle. |
||
| 601 | */ |
||
| 602 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
||
| 603 | |||
| 604 | /** @brief Disable UART |
||
| 605 | * @param __HANDLE__: specifies the UART Handle. |
||
| 606 | */ |
||
| 607 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||
| 608 | /** |
||
| 609 | * @} |
||
| 610 | */ |
||
| 611 | /* Exported functions --------------------------------------------------------*/ |
||
| 612 | /** @addtogroup UART_Exported_Functions |
||
| 613 | * @{ |
||
| 614 | */ |
||
| 615 | |||
| 616 | /** @addtogroup UART_Exported_Functions_Group1 |
||
| 617 | * @{ |
||
| 618 | */ |
||
| 619 | /* Initialization/de-initialization functions **********************************/ |
||
| 620 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
||
| 621 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
||
| 622 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
||
| 623 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
||
| 624 | HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart); |
||
| 625 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
||
| 626 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
||
| 627 | /** |
||
| 628 | * @} |
||
| 629 | */ |
||
| 630 | |||
| 631 | /** @addtogroup UART_Exported_Functions_Group2 |
||
| 632 | * @{ |
||
| 633 | */ |
||
| 634 | /* IO operation functions *******************************************************/ |
||
| 635 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 636 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 637 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 638 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 639 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 640 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 641 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
||
| 642 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
||
| 643 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
||
| 644 | /* Transfer Abort functions */ |
||
| 645 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
||
| 646 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
||
| 647 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
||
| 648 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
||
| 649 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
||
| 650 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
||
| 651 | |||
| 652 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
||
| 653 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
||
| 654 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
| 655 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
||
| 656 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
| 657 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
||
| 658 | void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart); |
||
| 659 | void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart); |
||
| 660 | void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart); |
||
| 661 | /** |
||
| 662 | * @} |
||
| 663 | */ |
||
| 664 | |||
| 665 | /** @addtogroup UART_Exported_Functions_Group3 |
||
| 666 | * @{ |
||
| 667 | */ |
||
| 668 | /* Peripheral Control functions ************************************************/ |
||
| 669 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
||
| 670 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
||
| 671 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
||
| 672 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
||
| 673 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
||
| 674 | /** |
||
| 675 | * @} |
||
| 676 | */ |
||
| 677 | |||
| 678 | /** @addtogroup UART_Exported_Functions_Group4 |
||
| 679 | * @{ |
||
| 680 | */ |
||
| 681 | /* Peripheral State functions **************************************************/ |
||
| 682 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
||
| 683 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
||
| 684 | /** |
||
| 685 | * @} |
||
| 686 | */ |
||
| 687 | |||
| 688 | /** |
||
| 689 | * @} |
||
| 690 | */ |
||
| 691 | /* Private types -------------------------------------------------------------*/ |
||
| 692 | /* Private variables ---------------------------------------------------------*/ |
||
| 693 | /* Private constants ---------------------------------------------------------*/ |
||
| 694 | /** @defgroup UART_Private_Constants UART Private Constants |
||
| 695 | * @{ |
||
| 696 | */ |
||
| 697 | /** @brief UART interruptions flag mask |
||
| 698 | * |
||
| 699 | */ |
||
| 700 | #define UART_IT_MASK 0x0000FFFFU |
||
| 701 | |||
| 702 | #define UART_CR1_REG_INDEX 1U |
||
| 703 | #define UART_CR2_REG_INDEX 2U |
||
| 704 | #define UART_CR3_REG_INDEX 3U |
||
| 705 | /** |
||
| 706 | * @} |
||
| 707 | */ |
||
| 708 | |||
| 709 | /* Private macros ------------------------------------------------------------*/ |
||
| 710 | /** @defgroup UART_Private_Macros UART Private Macros |
||
| 711 | * @{ |
||
| 712 | */ |
||
| 713 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
||
| 714 | ((LENGTH) == UART_WORDLENGTH_9B)) |
||
| 715 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
||
| 716 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
||
| 717 | ((STOPBITS) == UART_STOPBITS_2)) |
||
| 718 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
||
| 719 | ((PARITY) == UART_PARITY_EVEN) || \ |
||
| 720 | ((PARITY) == UART_PARITY_ODD)) |
||
| 721 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
||
| 722 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
||
| 723 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
||
| 724 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
||
| 725 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
||
| 726 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
||
| 727 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
||
| 728 | ((STATE) == UART_STATE_ENABLE)) |
||
| 729 | #if defined(USART_CR1_OVER8) |
||
| 730 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
||
| 731 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
||
| 732 | #endif /* USART_CR1_OVER8 */ |
||
| 733 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
||
| 734 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
||
| 735 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
||
| 736 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
||
| 737 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
||
| 738 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4500001U) |
||
| 739 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
||
| 740 | |||
| 741 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
||
| 742 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
||
| 743 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U) |
||
| 744 | /* UART BRR = mantissa + overflow + fraction |
||
| 745 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
||
| 746 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
||
| 747 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
||
| 748 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
||
| 749 | |||
| 750 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
||
| 751 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
||
| 752 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U) |
||
| 753 | /* UART BRR = mantissa + overflow + fraction |
||
| 754 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
||
| 755 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
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| 756 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
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| 757 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
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| 758 | /** |
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| 759 | * @} |
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| 760 | */ |
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| 761 | |||
| 762 | /* Private functions ---------------------------------------------------------*/ |
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| 763 | /** @defgroup UART_Private_Functions UART Private Functions |
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| 764 | * @{ |
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| 765 | */ |
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| 766 | |||
| 767 | /** |
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| 768 | * @} |
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| 769 | */ |
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| 770 | |||
| 771 | /** |
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| 772 | * @} |
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| 773 | */ |
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| 774 | |||
| 775 | /** |
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| 776 | * @} |
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| 777 | */ |
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| 778 | |||
| 779 | #ifdef __cplusplus |
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| 780 | } |
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| 781 | #endif |
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| 782 | |||
| 783 | #endif /* __STM32F1xx_HAL_UART_H */ |
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| 784 | |||
| 785 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |