Subversion Repositories DashDisplay

Rev

Rev 2 | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
2 mjames 1 
/**
2 
  ******************************************************************************
3 
  * @file    stm32f1xx_hal_sram.h
4 
  * @author  MCD Application Team
5 mjames 5 
  * @version V1.0.4
6 
  * @date    29-April-2016
2 mjames 7 
  * @brief   Header file of SRAM HAL module.
8 
  ******************************************************************************
9 
  * @attention
10 
  *
5 mjames 11 
  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
2 mjames 12 
  *
13 
  * Redistribution and use in source and binary forms, with or without modification,
14 
  * are permitted provided that the following conditions are met:
15 
  *   1. Redistributions of source code must retain the above copyright notice,
16 
  *      this list of conditions and the following disclaimer.
17 
  *   2. Redistributions in binary form must reproduce the above copyright notice,
18 
  *      this list of conditions and the following disclaimer in the documentation
19 
  *      and/or other materials provided with the distribution.
20 
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
21 
  *      may be used to endorse or promote products derived from this software
22 
  *      without specific prior written permission.
23 
  *
24 
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 
  *
35 
  ******************************************************************************
36 
  */
37 
 
38 
/* Define to prevent recursive inclusion -------------------------------------*/
39 
#ifndef __STM32F1xx_HAL_SRAM_H
40 
#define __STM32F1xx_HAL_SRAM_H
41 
 
42 
#ifdef __cplusplus
43 
 extern "C" {
44 
#endif
45 
 
46 
/* Includes ------------------------------------------------------------------*/
47 
#include "stm32f1xx_ll_fsmc.h"
48 
 
49 
/** @addtogroup STM32F1xx_HAL_Driver
50 
  * @{
51 
  */
52 
 
53 
#if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE)
54 
 
55 
/** @addtogroup SRAM
56 
  * @{
57 
  */
58 
 
59 
/* Exported typedef ----------------------------------------------------------*/
60 
 
61 
/** @defgroup SRAM_Exported_Types SRAM Exported Types
62 
  * @{
63 
  */
64 
/**
65 
  * @brief  HAL SRAM State structures definition  
66 
  */
67 
typedef enum
68 
{
69 
  HAL_SRAM_STATE_RESET     = 0x00,  /*!< SRAM not yet initialized or disabled           */
70 
  HAL_SRAM_STATE_READY     = 0x01,  /*!< SRAM initialized and ready for use             */
71 
  HAL_SRAM_STATE_BUSY      = 0x02,  /*!< SRAM internal process is ongoing               */
72 
  HAL_SRAM_STATE_ERROR     = 0x03,  /*!< SRAM error state                               */
73 
  HAL_SRAM_STATE_PROTECTED = 0x04   /*!< SRAM peripheral NORSRAM device write protected */
74 
 
75 
}HAL_SRAM_StateTypeDef;
76 
 
77 
/**
78 
  * @brief  SRAM handle Structure definition  
79 
  */
80 
typedef struct
81 
{
82 
  FSMC_NORSRAM_TypeDef           *Instance;  /*!< Register base address                        */
83 
 
84 
  FSMC_NORSRAM_EXTENDED_TypeDef  *Extended;  /*!< Extended mode register base address          */
85 
 
86 
  FSMC_NORSRAM_InitTypeDef       Init;       /*!< SRAM device control configuration parameters */
87 
 
88 
  HAL_LockTypeDef               Lock;       /*!< SRAM locking object                          */
89 
 
90 
  __IO HAL_SRAM_StateTypeDef    State;      /*!< SRAM device access state                     */
91 
 
92 
  DMA_HandleTypeDef             *hdma;      /*!< Pointer DMA handler                          */
93 
 
94 
}SRAM_HandleTypeDef;
95 
 
96 
/**
97 
  * @}
98 
  */
99 
 
100 
/* Exported constants --------------------------------------------------------*/
101 
/* Exported macro ------------------------------------------------------------*/
102 
 
103 
/** @defgroup SRAM_Exported_Macros SRAM Exported Macros
104 
  * @{
105 
  */
106 
 
107 
/** @brief Reset SRAM handle state
108 
  * @param  __HANDLE__: SRAM handle
109 
  * @retval None
110 
  */
111 
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
112 
 
113 
/**
114 
  * @}
115 
  */
116 
 
117 
/* Exported functions --------------------------------------------------------*/
118 
 
119 
/** @addtogroup SRAM_Exported_Functions
120 
 *  @{
121 
 */
122 
 
123 
/** @addtogroup SRAM_Exported_Functions_Group1
124 
 *  @{
125 
 */
126 
 
127 
/* Initialization/de-initialization functions  **********************************/
128 
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
129 
HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
130 
void              HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
131 
void              HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
132 
 
133 
void              HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
134 
void              HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
135 
 
136 
/**
137 
  * @}
138 
  */
139 
 
140 
/** @addtogroup SRAM_Exported_Functions_Group2
141 
 *  @{
142 
 */
143 
 
144 
/* I/O operation functions  *****************************************************/
145 
HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
146 
HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
147 
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
148 
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
149 
HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
150 
HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
151 
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
152 
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
153 
 
154 
/**
155 
  * @}
156 
  */
157 
 
158 
/** @addtogroup SRAM_Exported_Functions_Group3
159 
 *  @{
160 
 */
161 
 
162 
/* SRAM Control functions  ******************************************************/
163 
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
164 
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
165 
 
166 
/**
167 
  * @}
168 
  */
169 
 
170 
/** @addtogroup SRAM_Exported_Functions_Group4
171 
 *  @{
172 
 */
173 
 
174 
/* SRAM State functions *********************************************************/
175 
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
176 
 
177 
/**
178 
  * @}
179 
  */
180 
 
181 
/**
182 
  * @}
183 
  */
184 
 
185 
/**
186 
  * @}
187 
  */
188 
 
189 
#endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */
190 
 
191 
/**
192 
  * @}
193 
  */
194 
 
195 
#ifdef __cplusplus
196 
}
197 
#endif
198 
 
199 
#endif /* __STM32F1xx_HAL_SRAM_H */
200 
 
201 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/