Subversion Repositories LedShow

Rev

Go to most recent revision | Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
2 mjames 1
/**
2
  ******************************************************************************
3
  * @file    stm32f1xx_hal_spi.h
4
  * @author  MCD Application Team
5
  * @brief   Header file of SPI HAL module.
6
  ******************************************************************************
7
  * @attention
8
  *
9
  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10
  *
11
  * Redistribution and use in source and binary forms, with or without modification,
12
  * are permitted provided that the following conditions are met:
13
  *   1. Redistributions of source code must retain the above copyright notice,
14
  *      this list of conditions and the following disclaimer.
15
  *   2. Redistributions in binary form must reproduce the above copyright notice,
16
  *      this list of conditions and the following disclaimer in the documentation
17
  *      and/or other materials provided with the distribution.
18
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
19
  *      may be used to endorse or promote products derived from this software
20
  *      without specific prior written permission.
21
  *
22
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32
  *
33
  ******************************************************************************
34
  */
35
 
36
/* Define to prevent recursive inclusion -------------------------------------*/
37
#ifndef __STM32F1xx_HAL_SPI_H
38
#define __STM32F1xx_HAL_SPI_H
39
 
40
#ifdef __cplusplus
41
 extern "C" {
42
#endif
43
 
44
/* Includes ------------------------------------------------------------------*/
45
#include "stm32f1xx_hal_def.h"  
46
 
47
/** @addtogroup STM32F1xx_HAL_Driver
48
  * @{
49
  */
50
 
51
/** @addtogroup SPI
52
  * @{
53
  */
54
 
55
/* Exported types ------------------------------------------------------------*/
56
/** @defgroup SPI_Exported_Types SPI Exported Types
57
  * @{
58
  */
59
 
60
/**
61
  * @brief  SPI Configuration Structure definition
62
  */
63
typedef struct
64
{
65
  uint32_t Mode;               /*!< Specifies the SPI operating mode.
66
                                    This parameter can be a value of @ref SPI_Mode */
67
 
68
  uint32_t Direction;          /*!< Specifies the SPI Directional mode state.
69
                                    This parameter can be a value of @ref SPI_Direction */
70
 
71
  uint32_t DataSize;           /*!< Specifies the SPI data size.
72
                                    This parameter can be a value of @ref SPI_Data_Size */
73
 
74
  uint32_t CLKPolarity;        /*!< Specifies the serial clock steady state.
75
                                    This parameter can be a value of @ref SPI_Clock_Polarity */
76
 
77
  uint32_t CLKPhase;           /*!< Specifies the clock active edge for the bit capture.
78
                                    This parameter can be a value of @ref SPI_Clock_Phase */
79
 
80
  uint32_t NSS;                /*!< Specifies whether the NSS signal is managed by
81
                                    hardware (NSS pin) or by software using the SSI bit.
82
                                    This parameter can be a value of @ref SPI_Slave_Select_management */
83
 
84
  uint32_t BaudRatePrescaler;  /*!< Specifies the Baud Rate prescaler value which will be
85
                                    used to configure the transmit and receive SCK clock.
86
                                    This parameter can be a value of @ref SPI_BaudRate_Prescaler
87
                                    @note The communication clock is derived from the master
88
                                     clock. The slave clock does not need to be set. */
89
 
90
  uint32_t FirstBit;           /*!< Specifies whether data transfers start from MSB or LSB bit.
91
                                    This parameter can be a value of @ref SPI_MSB_LSB_transmission */
92
 
93
  uint32_t TIMode;             /*!< Specifies if the TI mode is enabled or not.
94
                                    This parameter can be a value of @ref SPI_TI_mode */
95
 
96
  uint32_t CRCCalculation;     /*!< Specifies if the CRC calculation is enabled or not.
97
                                    This parameter can be a value of @ref SPI_CRC_Calculation */
98
 
99
  uint32_t CRCPolynomial;      /*!< Specifies the polynomial used for the CRC calculation.
100
                                    This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
101
}SPI_InitTypeDef;
102
 
103
/**
104
  * @brief  HAL SPI State structure definition
105
  */
106
typedef enum
107
{
108
  HAL_SPI_STATE_RESET      = 0x00U,    /*!< Peripheral not Initialized                         */
109
  HAL_SPI_STATE_READY      = 0x01U,    /*!< Peripheral Initialized and ready for use           */
110
  HAL_SPI_STATE_BUSY       = 0x02U,    /*!< an internal process is ongoing                     */
111
  HAL_SPI_STATE_BUSY_TX    = 0x03U,    /*!< Data Transmission process is ongoing               */
112
  HAL_SPI_STATE_BUSY_RX    = 0x04U,    /*!< Data Reception process is ongoing                  */
113
  HAL_SPI_STATE_BUSY_TX_RX = 0x05U,    /*!< Data Transmission and Reception process is ongoing */
114
  HAL_SPI_STATE_ERROR      = 0x06U     /*!< SPI error state                                    */
115
}HAL_SPI_StateTypeDef;
116
 
117
/**
118
  * @brief  SPI handle Structure definition
119
  */
120
typedef struct __SPI_HandleTypeDef
121
{
122
  SPI_TypeDef                *Instance;    /*!< SPI registers base address */
123
 
124
  SPI_InitTypeDef            Init;         /*!< SPI communication parameters */
125
 
126
  uint8_t                    *pTxBuffPtr;  /*!< Pointer to SPI Tx transfer Buffer */
127
 
128
  uint16_t                   TxXferSize;   /*!< SPI Tx Transfer size */
129
 
130
  __IO uint16_t              TxXferCount;  /*!< SPI Tx Transfer Counter */
131
 
132
  uint8_t                    *pRxBuffPtr;  /*!< Pointer to SPI Rx transfer Buffer */
133
 
134
  uint16_t                   RxXferSize;   /*!< SPI Rx Transfer size */
135
 
136
  __IO uint16_t              RxXferCount;  /*!< SPI Rx Transfer Counter */
137
 
138
  void                       (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */
139
 
140
  void                       (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */
141
 
142
  DMA_HandleTypeDef          *hdmatx;      /*!< SPI Tx DMA Handle parameters   */
143
 
144
  DMA_HandleTypeDef          *hdmarx;      /*!< SPI Rx DMA Handle parameters   */
145
 
146
  HAL_LockTypeDef            Lock;         /*!< Locking object                 */
147
 
148
  __IO HAL_SPI_StateTypeDef  State;        /*!< SPI communication state */
149
 
150
  __IO uint32_t              ErrorCode;    /*!< SPI Error code */
151
 
152
}SPI_HandleTypeDef;
153
 
154
/**
155
  * @}
156
  */
157
 
158
/* Exported constants --------------------------------------------------------*/
159
/** @defgroup SPI_Exported_Constants SPI Exported Constants
160
  * @{
161
  */
162
 
163
/** @defgroup SPI_Error_Code SPI Error Code
164
  * @{
165
  */
166
#define HAL_SPI_ERROR_NONE              0x00000000U   /*!< No error             */
167
#define HAL_SPI_ERROR_MODF              0x00000001U   /*!< MODF error           */
168
#define HAL_SPI_ERROR_CRC               0x00000002U   /*!< CRC error            */
169
#define HAL_SPI_ERROR_OVR               0x00000004U   /*!< OVR error            */
170
#define HAL_SPI_ERROR_FRE               0x00000008U   /*!< FRE error            */
171
#define HAL_SPI_ERROR_DMA               0x00000010U   /*!< DMA transfer error   */
172
#define HAL_SPI_ERROR_FLAG              0x00000020U   /*!< Flag: RXNE,TXE, BSY  */
173
/**
174
  * @}
175
  */
176
 
177
/** @defgroup SPI_Mode SPI Mode
178
  * @{
179
  */
180
#define SPI_MODE_SLAVE                  0x00000000U
181
#define SPI_MODE_MASTER                 (SPI_CR1_MSTR | SPI_CR1_SSI)
182
/**
183
  * @}
184
  */
185
 
186
/** @defgroup SPI_Direction SPI Direction Mode
187
  * @{
188
  */
189
#define SPI_DIRECTION_2LINES            0x00000000U
190
#define SPI_DIRECTION_2LINES_RXONLY     SPI_CR1_RXONLY
191
#define SPI_DIRECTION_1LINE             SPI_CR1_BIDIMODE
192
/**
193
  * @}
194
  */
195
 
196
/** @defgroup SPI_Data_Size SPI Data Size
197
  * @{
198
  */
199
#define SPI_DATASIZE_8BIT               0x00000000U
200
#define SPI_DATASIZE_16BIT              SPI_CR1_DFF
201
/**
202
  * @}
203
  */
204
 
205
/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
206
  * @{
207
  */
208
#define SPI_POLARITY_LOW                0x00000000U
209
#define SPI_POLARITY_HIGH               SPI_CR1_CPOL
210
/**
211
  * @}
212
  */
213
 
214
/** @defgroup SPI_Clock_Phase SPI Clock Phase
215
  * @{
216
  */
217
#define SPI_PHASE_1EDGE                 0x00000000U
218
#define SPI_PHASE_2EDGE                 SPI_CR1_CPHA
219
/**
220
  * @}
221
  */
222
 
223
/** @defgroup SPI_Slave_Select_management SPI Slave Select Management
224
  * @{
225
  */
226
#define SPI_NSS_SOFT                    SPI_CR1_SSM
227
#define SPI_NSS_HARD_INPUT              0x00000000U
228
#define SPI_NSS_HARD_OUTPUT             ((uint32_t)(SPI_CR2_SSOE << 16))
229
/**
230
  * @}
231
  */
232
 
233
/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
234
  * @{
235
  */
236
#define SPI_BAUDRATEPRESCALER_2         0x00000000U
237
#define SPI_BAUDRATEPRESCALER_4         SPI_CR1_BR_0
238
#define SPI_BAUDRATEPRESCALER_8         SPI_CR1_BR_1
239
#define SPI_BAUDRATEPRESCALER_16        (uint32_t)(SPI_CR1_BR_1 | SPI_CR1_BR_0)
240
#define SPI_BAUDRATEPRESCALER_32        SPI_CR1_BR_2
241
#define SPI_BAUDRATEPRESCALER_64        (uint32_t)(SPI_CR1_BR_2 | SPI_CR1_BR_0)
242
#define SPI_BAUDRATEPRESCALER_128       (uint32_t)(SPI_CR1_BR_2 | SPI_CR1_BR_1)
243
#define SPI_BAUDRATEPRESCALER_256       (uint32_t)(SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
244
 
245
/**
246
  * @}
247
  */
248
 
249
/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
250
  * @{
251
  */
252
#define SPI_FIRSTBIT_MSB                0x00000000U
253
#define SPI_FIRSTBIT_LSB                SPI_CR1_LSBFIRST
254
/**
255
  * @}
256
  */
257
 
258
/** @defgroup SPI_TI_mode SPI TI Mode
259
  * @{
260
  */
261
#define SPI_TIMODE_DISABLE             0x00000000U
262
/**
263
  * @}
264
  */
265
 
266
/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
267
  * @{
268
  */
269
#define SPI_CRCCALCULATION_DISABLE     0x00000000U
270
#define SPI_CRCCALCULATION_ENABLE      SPI_CR1_CRCEN
271
/**
272
  * @}
273
  */
274
 
275
/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
276
  * @{
277
  */
278
#define SPI_IT_TXE                      SPI_CR2_TXEIE
279
#define SPI_IT_RXNE                     SPI_CR2_RXNEIE
280
#define SPI_IT_ERR                      SPI_CR2_ERRIE
281
/**
282
  * @}
283
  */
284
 
285
/** @defgroup SPI_Flags_definition SPI Flags Definition
286
  * @{
287
  */
288
#define SPI_FLAG_RXNE                   SPI_SR_RXNE   /* SPI status flag: Rx buffer not empty flag */
289
#define SPI_FLAG_TXE                    SPI_SR_TXE    /* SPI status flag: Tx buffer empty flag */
290
#define SPI_FLAG_BSY                    SPI_SR_BSY    /* SPI status flag: Busy flag */
291
#define SPI_FLAG_CRCERR                 SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
292
#define SPI_FLAG_MODF                   SPI_SR_MODF   /* SPI Error flag: Mode fault flag */
293
#define SPI_FLAG_OVR                    SPI_SR_OVR    /* SPI Error flag: Overrun flag */
294
/**
295
  * @}
296
  */
297
 
298
/**
299
  * @}
300
  */
301
 
302
/* Exported macro ------------------------------------------------------------*/
303
/** @defgroup SPI_Exported_Macros SPI Exported Macros
304
  * @{
305
  */
306
 
307
/** @brief  Reset SPI handle state.
308
  * @param  __HANDLE__: specifies the SPI Handle.
309
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
310
  * @retval None
311
  */
312
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
313
 
314
/** @brief  Enable the specified SPI interrupts.
315
  * @param  __HANDLE__: specifies the SPI handle.
316
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
317
  * @param  __INTERRUPT__: specifies the interrupt source to enable.
318
  *         This parameter can be one of the following values:
319
  *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
320
  *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
321
  *            @arg SPI_IT_ERR: Error interrupt enable
322
  * @retval None
323
  */
324
#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
325
 
326
/** @brief  Disable the specified SPI interrupts.
327
  * @param  __HANDLE__: specifies the SPI handle.
328
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
329
  * @param  __INTERRUPT__: specifies the interrupt source to disable.
330
  *         This parameter can be one of the following values:
331
  *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
332
  *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
333
  *            @arg SPI_IT_ERR: Error interrupt enable
334
  * @retval None
335
  */
336
#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
337
 
338
/** @brief  Check whether the specified SPI interrupt source is enabled or not.
339
  * @param  __HANDLE__: specifies the SPI Handle.
340
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
341
  * @param  __INTERRUPT__: specifies the SPI interrupt source to check.
342
  *          This parameter can be one of the following values:
343
  *             @arg SPI_IT_TXE: Tx buffer empty interrupt enable
344
  *             @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
345
  *             @arg SPI_IT_ERR: Error interrupt enable
346
  * @retval The new state of __IT__ (TRUE or FALSE).
347
  */
348
#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
349
 
350
/** @brief  Check whether the specified SPI flag is set or not.
351
  * @param  __HANDLE__: specifies the SPI Handle.
352
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
353
  * @param  __FLAG__: specifies the flag to check.
354
  *         This parameter can be one of the following values:
355
  *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
356
  *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
357
  *            @arg SPI_FLAG_CRCERR: CRC error flag
358
  *            @arg SPI_FLAG_MODF: Mode fault flag
359
  *            @arg SPI_FLAG_OVR: Overrun flag
360
  *            @arg SPI_FLAG_BSY: Busy flag
361
  * @retval The new state of __FLAG__ (TRUE or FALSE).
362
  */
363
#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
364
 
365
/** @brief  Clear the SPI CRCERR pending flag.
366
  * @param  __HANDLE__: specifies the SPI Handle.
367
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
368
  * @retval None
369
  */
370
#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
371
 
372
/** @brief  Clear the SPI MODF pending flag.
373
  * @param  __HANDLE__: specifies the SPI Handle.
374
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
375
  * @retval None
376
  */
377
#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__)       \
378
do{                                                \
379
    __IO uint32_t tmpreg_modf = 0x00U;             \
380
    tmpreg_modf = (__HANDLE__)->Instance->SR;      \
381
    (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
382
    UNUSED(tmpreg_modf);                           \
383
  } while(0U)
384
 
385
/** @brief  Clear the SPI OVR pending flag.
386
  * @param  __HANDLE__: specifies the SPI Handle.
387
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
388
  * @retval None
389
  */
390
#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__)        \
391
do{                                                \
392
    __IO uint32_t tmpreg_ovr = 0x00U;              \
393
    tmpreg_ovr = (__HANDLE__)->Instance->DR;       \
394
    tmpreg_ovr = (__HANDLE__)->Instance->SR;       \
395
    UNUSED(tmpreg_ovr);                            \
396
  } while(0U)
397
 
398
 
399
/** @brief  Enable the SPI peripheral.
400
  * @param  __HANDLE__: specifies the SPI Handle.
401
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
402
  * @retval None
403
  */
404
#define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |=  SPI_CR1_SPE)
405
 
406
/** @brief  Disable the SPI peripheral.
407
  * @param  __HANDLE__: specifies the SPI Handle.
408
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
409
  * @retval None
410
  */
411
#define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
412
/**
413
  * @}
414
  */
415
 
416
/* Exported functions --------------------------------------------------------*/
417
/** @addtogroup SPI_Exported_Functions
418
  * @{
419
  */
420
 
421
/** @addtogroup SPI_Exported_Functions_Group1
422
  * @{
423
  */
424
/* Initialization/de-initialization functions  **********************************/
425
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
426
HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
427
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
428
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
429
/**
430
  * @}
431
  */
432
 
433
/** @addtogroup SPI_Exported_Functions_Group2
434
  * @{
435
  */
436
/* I/O operation functions  *****************************************************/
437
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
438
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
439
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
440
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
441
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
442
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
443
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
444
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
445
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
446
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
447
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
448
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
449
/* Transfer Abort functions */
450
HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
451
HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);
452
 
453
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
454
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
455
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
456
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
457
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
458
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
459
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
460
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
461
void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
462
/**
463
  * @}
464
  */
465
 
466
/** @addtogroup SPI_Exported_Functions_Group3
467
  * @{
468
  */
469
/* Peripheral State and Error functions ***************************************/
470
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
471
uint32_t             HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
472
/**
473
  * @}
474
  */
475
 
476
/**
477
  * @}
478
  */
479
 
480
/* Private types -------------------------------------------------------------*/
481
/* Private variables ---------------------------------------------------------*/
482
/* Private constants ---------------------------------------------------------*/
483
/** @defgroup SPI_Private_Constants SPI Private Constants
484
  * @{
485
  */
486
#define SPI_INVALID_CRC_ERROR     0U          /* CRC error wrongly detected */
487
#define SPI_VALID_CRC_ERROR       1U          /* CRC error is true */
488
/**
489
  * @}
490
  */
491
/* Private macros ------------------------------------------------------------*/
492
/** @defgroup SPI_Private_Macros SPI Private Macros
493
  * @{
494
  */
495
 
496
/** @brief  Set the SPI transmit-only mode.
497
  * @param  __HANDLE__: specifies the SPI Handle.
498
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
499
  * @retval None
500
  */
501
#define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
502
 
503
/** @brief  Set the SPI receive-only mode.
504
  * @param  __HANDLE__: specifies the SPI Handle.
505
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
506
  * @retval None
507
  */
508
#define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
509
 
510
/** @brief  Reset the CRC calculation of the SPI.
511
  * @param  __HANDLE__: specifies the SPI Handle.
512
  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
513
  * @retval None
514
  */
515
#define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
516
                                     (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0U)
517
 
518
#define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
519
                           ((MODE) == SPI_MODE_MASTER))
520
 
521
#define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES)        || \
522
                                ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
523
                                ((MODE) == SPI_DIRECTION_1LINE))
524
 
525
#define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
526
 
527
#define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)  || \
528
                                                ((MODE) == SPI_DIRECTION_1LINE))
529
 
530
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
531
                                   ((DATASIZE) == SPI_DATASIZE_8BIT))
532
 
533
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
534
                           ((CPOL) == SPI_POLARITY_HIGH))
535
 
536
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
537
                           ((CPHA) == SPI_PHASE_2EDGE))
538
 
539
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT)       || \
540
                         ((NSS) == SPI_NSS_HARD_INPUT) || \
541
                         ((NSS) == SPI_NSS_HARD_OUTPUT))
542
 
543
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2)   || \
544
                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_4)   || \
545
                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_8)   || \
546
                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_16)  || \
547
                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_32)  || \
548
                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_64)  || \
549
                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
550
                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
551
 
552
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
553
                               ((BIT) == SPI_FIRSTBIT_LSB))
554
 
555
#define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
556
                                             ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
557
 
558
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x01U) && ((POLYNOMIAL) <= 0xFFFFU))
559
 
560
/**
561
  * @}
562
  */
563
 
564
/* Private functions ---------------------------------------------------------*/
565
/** @defgroup SPI_Private_Functions SPI Private Functions
566
  * @{
567
  */
568
uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi);
569
/**
570
  * @}
571
  */
572
 
573
/**
574
  * @}
575
  */
576
 
577
/**
578
  * @}
579
  */
580
 
581
#ifdef __cplusplus
582
}
583
#endif
584
 
585
#endif /* __STM32F1xx_HAL_SPI_H */
586
 
587
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/