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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_spi.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of SPI HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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| 10 | * |
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| 11 | * Redistribution and use in source and binary forms, with or without modification, |
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| 12 | * are permitted provided that the following conditions are met: |
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| 13 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 14 | * this list of conditions and the following disclaimer. |
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| 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 16 | * this list of conditions and the following disclaimer in the documentation |
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| 17 | * and/or other materials provided with the distribution. |
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| 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 19 | * may be used to endorse or promote products derived from this software |
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| 20 | * without specific prior written permission. |
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| 21 | * |
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| 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 32 | * |
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| 33 | ****************************************************************************** |
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| 34 | */ |
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| 35 | |||
| 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 37 | #ifndef __STM32F1xx_HAL_SPI_H |
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| 38 | #define __STM32F1xx_HAL_SPI_H |
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| 39 | |||
| 40 | #ifdef __cplusplus |
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| 41 | extern "C" { |
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| 42 | #endif |
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| 43 | |||
| 44 | /* Includes ------------------------------------------------------------------*/ |
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| 45 | #include "stm32f1xx_hal_def.h" |
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| 46 | |||
| 47 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 48 | * @{ |
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| 49 | */ |
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| 50 | |||
| 51 | /** @addtogroup SPI |
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| 52 | * @{ |
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| 53 | */ |
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| 54 | |||
| 55 | /* Exported types ------------------------------------------------------------*/ |
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| 56 | /** @defgroup SPI_Exported_Types SPI Exported Types |
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| 57 | * @{ |
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| 58 | */ |
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| 59 | |||
| 60 | /** |
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| 61 | * @brief SPI Configuration Structure definition |
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| 62 | */ |
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| 63 | typedef struct |
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| 64 | { |
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| 65 | uint32_t Mode; /*!< Specifies the SPI operating mode. |
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| 66 | This parameter can be a value of @ref SPI_Mode */ |
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| 67 | |||
| 68 | uint32_t Direction; /*!< Specifies the SPI Directional mode state. |
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| 69 | This parameter can be a value of @ref SPI_Direction */ |
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| 70 | |||
| 71 | uint32_t DataSize; /*!< Specifies the SPI data size. |
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| 72 | This parameter can be a value of @ref SPI_Data_Size */ |
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| 73 | |||
| 74 | uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. |
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| 75 | This parameter can be a value of @ref SPI_Clock_Polarity */ |
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| 76 | |||
| 77 | uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. |
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| 78 | This parameter can be a value of @ref SPI_Clock_Phase */ |
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| 79 | |||
| 80 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by |
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| 81 | hardware (NSS pin) or by software using the SSI bit. |
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| 82 | This parameter can be a value of @ref SPI_Slave_Select_management */ |
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| 83 | |||
| 84 | uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be |
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| 85 | used to configure the transmit and receive SCK clock. |
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| 86 | This parameter can be a value of @ref SPI_BaudRate_Prescaler |
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| 87 | @note The communication clock is derived from the master |
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| 88 | clock. The slave clock does not need to be set. */ |
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| 89 | |||
| 90 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
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| 91 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */ |
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| 92 | |||
| 93 | uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. |
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| 94 | This parameter can be a value of @ref SPI_TI_mode */ |
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| 95 | |||
| 96 | uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. |
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| 97 | This parameter can be a value of @ref SPI_CRC_Calculation */ |
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| 98 | |||
| 99 | uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. |
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| 100 | This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */ |
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| 101 | }SPI_InitTypeDef; |
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| 102 | |||
| 103 | /** |
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| 104 | * @brief HAL SPI State structure definition |
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| 105 | */ |
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| 106 | typedef enum |
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| 107 | { |
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| 108 | HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ |
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| 109 | HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
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| 110 | HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ |
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| 111 | HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ |
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| 112 | HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ |
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| 113 | HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ |
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| 114 | HAL_SPI_STATE_ERROR = 0x06U /*!< SPI error state */ |
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| 115 | }HAL_SPI_StateTypeDef; |
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| 116 | |||
| 117 | /** |
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| 118 | * @brief SPI handle Structure definition |
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| 119 | */ |
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| 120 | typedef struct __SPI_HandleTypeDef |
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| 121 | { |
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| 122 | SPI_TypeDef *Instance; /*!< SPI registers base address */ |
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| 123 | |||
| 124 | SPI_InitTypeDef Init; /*!< SPI communication parameters */ |
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| 125 | |||
| 126 | uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ |
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| 127 | |||
| 128 | uint16_t TxXferSize; /*!< SPI Tx Transfer size */ |
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| 129 | |||
| 130 | __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ |
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| 131 | |||
| 132 | uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ |
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| 133 | |||
| 134 | uint16_t RxXferSize; /*!< SPI Rx Transfer size */ |
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| 135 | |||
| 136 | __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ |
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| 137 | |||
| 138 | void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */ |
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| 139 | |||
| 140 | void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */ |
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| 141 | |||
| 142 | DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ |
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| 143 | |||
| 144 | DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ |
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| 145 | |||
| 146 | HAL_LockTypeDef Lock; /*!< Locking object */ |
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| 147 | |||
| 148 | __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ |
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| 149 | |||
| 150 | __IO uint32_t ErrorCode; /*!< SPI Error code */ |
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| 151 | |||
| 152 | }SPI_HandleTypeDef; |
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| 153 | |||
| 154 | /** |
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| 155 | * @} |
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| 156 | */ |
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| 157 | |||
| 158 | /* Exported constants --------------------------------------------------------*/ |
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| 159 | /** @defgroup SPI_Exported_Constants SPI Exported Constants |
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| 160 | * @{ |
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| 161 | */ |
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| 162 | |||
| 163 | /** @defgroup SPI_Error_Code SPI Error Code |
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| 164 | * @{ |
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| 165 | */ |
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| 166 | #define HAL_SPI_ERROR_NONE 0x00000000U /*!< No error */ |
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| 167 | #define HAL_SPI_ERROR_MODF 0x00000001U /*!< MODF error */ |
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| 168 | #define HAL_SPI_ERROR_CRC 0x00000002U /*!< CRC error */ |
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| 169 | #define HAL_SPI_ERROR_OVR 0x00000004U /*!< OVR error */ |
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| 170 | #define HAL_SPI_ERROR_FRE 0x00000008U /*!< FRE error */ |
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| 171 | #define HAL_SPI_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
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| 172 | #define HAL_SPI_ERROR_FLAG 0x00000020U /*!< Flag: RXNE,TXE, BSY */ |
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| 173 | /** |
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| 174 | * @} |
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| 175 | */ |
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| 176 | |||
| 177 | /** @defgroup SPI_Mode SPI Mode |
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| 178 | * @{ |
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| 179 | */ |
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| 180 | #define SPI_MODE_SLAVE 0x00000000U |
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| 181 | #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) |
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| 182 | /** |
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| 183 | * @} |
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| 184 | */ |
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| 185 | |||
| 186 | /** @defgroup SPI_Direction SPI Direction Mode |
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| 187 | * @{ |
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| 188 | */ |
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| 189 | #define SPI_DIRECTION_2LINES 0x00000000U |
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| 190 | #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY |
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| 191 | #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE |
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| 192 | /** |
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| 193 | * @} |
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| 194 | */ |
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| 195 | |||
| 196 | /** @defgroup SPI_Data_Size SPI Data Size |
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| 197 | * @{ |
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| 198 | */ |
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| 199 | #define SPI_DATASIZE_8BIT 0x00000000U |
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| 200 | #define SPI_DATASIZE_16BIT SPI_CR1_DFF |
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| 201 | /** |
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| 202 | * @} |
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| 203 | */ |
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| 204 | |||
| 205 | /** @defgroup SPI_Clock_Polarity SPI Clock Polarity |
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| 206 | * @{ |
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| 207 | */ |
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| 208 | #define SPI_POLARITY_LOW 0x00000000U |
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| 209 | #define SPI_POLARITY_HIGH SPI_CR1_CPOL |
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| 210 | /** |
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| 211 | * @} |
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| 212 | */ |
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| 213 | |||
| 214 | /** @defgroup SPI_Clock_Phase SPI Clock Phase |
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| 215 | * @{ |
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| 216 | */ |
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| 217 | #define SPI_PHASE_1EDGE 0x00000000U |
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| 218 | #define SPI_PHASE_2EDGE SPI_CR1_CPHA |
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| 219 | /** |
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| 220 | * @} |
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| 221 | */ |
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| 222 | |||
| 223 | /** @defgroup SPI_Slave_Select_management SPI Slave Select Management |
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| 224 | * @{ |
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| 225 | */ |
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| 226 | #define SPI_NSS_SOFT SPI_CR1_SSM |
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| 227 | #define SPI_NSS_HARD_INPUT 0x00000000U |
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| 228 | #define SPI_NSS_HARD_OUTPUT ((uint32_t)(SPI_CR2_SSOE << 16)) |
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| 229 | /** |
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| 230 | * @} |
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| 231 | */ |
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| 232 | |||
| 233 | /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler |
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| 234 | * @{ |
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| 235 | */ |
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| 236 | #define SPI_BAUDRATEPRESCALER_2 0x00000000U |
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| 237 | #define SPI_BAUDRATEPRESCALER_4 SPI_CR1_BR_0 |
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| 238 | #define SPI_BAUDRATEPRESCALER_8 SPI_CR1_BR_1 |
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| 239 | #define SPI_BAUDRATEPRESCALER_16 (uint32_t)(SPI_CR1_BR_1 | SPI_CR1_BR_0) |
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| 240 | #define SPI_BAUDRATEPRESCALER_32 SPI_CR1_BR_2 |
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| 241 | #define SPI_BAUDRATEPRESCALER_64 (uint32_t)(SPI_CR1_BR_2 | SPI_CR1_BR_0) |
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| 242 | #define SPI_BAUDRATEPRESCALER_128 (uint32_t)(SPI_CR1_BR_2 | SPI_CR1_BR_1) |
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| 243 | #define SPI_BAUDRATEPRESCALER_256 (uint32_t)(SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) |
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| 244 | |||
| 245 | /** |
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| 246 | * @} |
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| 247 | */ |
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| 248 | |||
| 249 | /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission |
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| 250 | * @{ |
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| 251 | */ |
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| 252 | #define SPI_FIRSTBIT_MSB 0x00000000U |
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| 253 | #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST |
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| 254 | /** |
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| 255 | * @} |
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| 256 | */ |
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| 257 | |||
| 258 | /** @defgroup SPI_TI_mode SPI TI Mode |
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| 259 | * @{ |
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| 260 | */ |
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| 261 | #define SPI_TIMODE_DISABLE 0x00000000U |
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| 262 | /** |
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| 263 | * @} |
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| 264 | */ |
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| 265 | |||
| 266 | /** @defgroup SPI_CRC_Calculation SPI CRC Calculation |
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| 267 | * @{ |
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| 268 | */ |
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| 269 | #define SPI_CRCCALCULATION_DISABLE 0x00000000U |
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| 270 | #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN |
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| 271 | /** |
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| 272 | * @} |
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| 273 | */ |
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| 274 | |||
| 275 | /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition |
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| 276 | * @{ |
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| 277 | */ |
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| 278 | #define SPI_IT_TXE SPI_CR2_TXEIE |
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| 279 | #define SPI_IT_RXNE SPI_CR2_RXNEIE |
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| 280 | #define SPI_IT_ERR SPI_CR2_ERRIE |
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| 281 | /** |
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| 282 | * @} |
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| 283 | */ |
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| 284 | |||
| 285 | /** @defgroup SPI_Flags_definition SPI Flags Definition |
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| 286 | * @{ |
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| 287 | */ |
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| 288 | #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ |
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| 289 | #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ |
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| 290 | #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ |
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| 291 | #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ |
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| 292 | #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ |
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| 293 | #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ |
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| 294 | /** |
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| 295 | * @} |
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| 296 | */ |
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| 297 | |||
| 298 | /** |
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| 299 | * @} |
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| 300 | */ |
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| 301 | |||
| 302 | /* Exported macro ------------------------------------------------------------*/ |
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| 303 | /** @defgroup SPI_Exported_Macros SPI Exported Macros |
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| 304 | * @{ |
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| 305 | */ |
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| 306 | |||
| 307 | /** @brief Reset SPI handle state. |
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| 308 | * @param __HANDLE__: specifies the SPI Handle. |
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| 309 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 310 | * @retval None |
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| 311 | */ |
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| 312 | #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) |
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| 313 | |||
| 314 | /** @brief Enable the specified SPI interrupts. |
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| 315 | * @param __HANDLE__: specifies the SPI handle. |
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| 316 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 317 | * @param __INTERRUPT__: specifies the interrupt source to enable. |
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| 318 | * This parameter can be one of the following values: |
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| 319 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
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| 320 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
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| 321 | * @arg SPI_IT_ERR: Error interrupt enable |
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| 322 | * @retval None |
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| 323 | */ |
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| 324 | #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
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| 325 | |||
| 326 | /** @brief Disable the specified SPI interrupts. |
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| 327 | * @param __HANDLE__: specifies the SPI handle. |
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| 328 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 329 | * @param __INTERRUPT__: specifies the interrupt source to disable. |
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| 330 | * This parameter can be one of the following values: |
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| 331 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
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| 332 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
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| 333 | * @arg SPI_IT_ERR: Error interrupt enable |
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| 334 | * @retval None |
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| 335 | */ |
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| 336 | #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) |
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| 337 | |||
| 338 | /** @brief Check whether the specified SPI interrupt source is enabled or not. |
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| 339 | * @param __HANDLE__: specifies the SPI Handle. |
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| 340 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 341 | * @param __INTERRUPT__: specifies the SPI interrupt source to check. |
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| 342 | * This parameter can be one of the following values: |
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| 343 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
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| 344 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
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| 345 | * @arg SPI_IT_ERR: Error interrupt enable |
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| 346 | * @retval The new state of __IT__ (TRUE or FALSE). |
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| 347 | */ |
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| 348 | #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
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| 349 | |||
| 350 | /** @brief Check whether the specified SPI flag is set or not. |
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| 351 | * @param __HANDLE__: specifies the SPI Handle. |
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| 352 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 353 | * @param __FLAG__: specifies the flag to check. |
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| 354 | * This parameter can be one of the following values: |
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| 355 | * @arg SPI_FLAG_RXNE: Receive buffer not empty flag |
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| 356 | * @arg SPI_FLAG_TXE: Transmit buffer empty flag |
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| 357 | * @arg SPI_FLAG_CRCERR: CRC error flag |
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| 358 | * @arg SPI_FLAG_MODF: Mode fault flag |
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| 359 | * @arg SPI_FLAG_OVR: Overrun flag |
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| 360 | * @arg SPI_FLAG_BSY: Busy flag |
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| 361 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
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| 362 | */ |
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| 363 | #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
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| 364 | |||
| 365 | /** @brief Clear the SPI CRCERR pending flag. |
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| 366 | * @param __HANDLE__: specifies the SPI Handle. |
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| 367 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 368 | * @retval None |
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| 369 | */ |
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| 370 | #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) |
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| 371 | |||
| 372 | /** @brief Clear the SPI MODF pending flag. |
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| 373 | * @param __HANDLE__: specifies the SPI Handle. |
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| 374 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 375 | * @retval None |
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| 376 | */ |
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| 377 | #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ |
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| 378 | do{ \ |
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| 379 | __IO uint32_t tmpreg_modf = 0x00U; \ |
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| 380 | tmpreg_modf = (__HANDLE__)->Instance->SR; \ |
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| 381 | (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \ |
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| 382 | UNUSED(tmpreg_modf); \ |
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| 383 | } while(0U) |
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| 384 | |||
| 385 | /** @brief Clear the SPI OVR pending flag. |
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| 386 | * @param __HANDLE__: specifies the SPI Handle. |
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| 387 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 388 | * @retval None |
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| 389 | */ |
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| 390 | #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ |
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| 391 | do{ \ |
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| 392 | __IO uint32_t tmpreg_ovr = 0x00U; \ |
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| 393 | tmpreg_ovr = (__HANDLE__)->Instance->DR; \ |
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| 394 | tmpreg_ovr = (__HANDLE__)->Instance->SR; \ |
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| 395 | UNUSED(tmpreg_ovr); \ |
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| 396 | } while(0U) |
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| 397 | |||
| 398 | |||
| 399 | /** @brief Enable the SPI peripheral. |
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| 400 | * @param __HANDLE__: specifies the SPI Handle. |
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| 401 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 402 | * @retval None |
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| 403 | */ |
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| 404 | #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE) |
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| 405 | |||
| 406 | /** @brief Disable the SPI peripheral. |
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| 407 | * @param __HANDLE__: specifies the SPI Handle. |
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| 408 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 409 | * @retval None |
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| 410 | */ |
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| 411 | #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE)) |
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| 412 | /** |
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| 413 | * @} |
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| 414 | */ |
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| 415 | |||
| 416 | /* Exported functions --------------------------------------------------------*/ |
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| 417 | /** @addtogroup SPI_Exported_Functions |
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| 418 | * @{ |
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| 419 | */ |
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| 420 | |||
| 421 | /** @addtogroup SPI_Exported_Functions_Group1 |
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| 422 | * @{ |
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| 423 | */ |
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| 424 | /* Initialization/de-initialization functions **********************************/ |
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| 425 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); |
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| 426 | HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi); |
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| 427 | void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); |
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| 428 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); |
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| 429 | /** |
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| 430 | * @} |
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| 431 | */ |
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| 432 | |||
| 433 | /** @addtogroup SPI_Exported_Functions_Group2 |
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| 434 | * @{ |
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| 435 | */ |
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| 436 | /* I/O operation functions *****************************************************/ |
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| 437 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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| 438 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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| 439 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
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| 440 | HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
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| 441 | HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
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| 442 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
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| 443 | HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
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| 444 | HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
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| 445 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
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| 446 | HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); |
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| 447 | HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); |
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| 448 | HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); |
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| 449 | /* Transfer Abort functions */ |
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| 450 | HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); |
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| 451 | HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); |
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| 452 | |||
| 453 | void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); |
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| 454 | void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); |
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| 455 | void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); |
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| 456 | void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); |
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| 457 | void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
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| 458 | void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
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| 459 | void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
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| 460 | void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); |
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| 461 | void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); |
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| 462 | /** |
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| 463 | * @} |
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| 464 | */ |
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| 465 | |||
| 466 | /** @addtogroup SPI_Exported_Functions_Group3 |
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| 467 | * @{ |
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| 468 | */ |
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| 469 | /* Peripheral State and Error functions ***************************************/ |
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| 470 | HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); |
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| 471 | uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); |
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| 472 | /** |
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| 473 | * @} |
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| 474 | */ |
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| 475 | |||
| 476 | /** |
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| 477 | * @} |
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| 478 | */ |
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| 479 | |||
| 480 | /* Private types -------------------------------------------------------------*/ |
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| 481 | /* Private variables ---------------------------------------------------------*/ |
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| 482 | /* Private constants ---------------------------------------------------------*/ |
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| 483 | /** @defgroup SPI_Private_Constants SPI Private Constants |
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| 484 | * @{ |
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| 485 | */ |
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| 486 | #define SPI_INVALID_CRC_ERROR 0U /* CRC error wrongly detected */ |
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| 487 | #define SPI_VALID_CRC_ERROR 1U /* CRC error is true */ |
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| 488 | /** |
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| 489 | * @} |
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| 490 | */ |
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| 491 | /* Private macros ------------------------------------------------------------*/ |
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| 492 | /** @defgroup SPI_Private_Macros SPI Private Macros |
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| 493 | * @{ |
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| 494 | */ |
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| 495 | |||
| 496 | /** @brief Set the SPI transmit-only mode. |
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| 497 | * @param __HANDLE__: specifies the SPI Handle. |
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| 498 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 499 | * @retval None |
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| 500 | */ |
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| 501 | #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE) |
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| 502 | |||
| 503 | /** @brief Set the SPI receive-only mode. |
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| 504 | * @param __HANDLE__: specifies the SPI Handle. |
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| 505 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 506 | * @retval None |
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| 507 | */ |
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| 508 | #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE)) |
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| 509 | |||
| 510 | /** @brief Reset the CRC calculation of the SPI. |
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| 511 | * @param __HANDLE__: specifies the SPI Handle. |
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| 512 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
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| 513 | * @retval None |
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| 514 | */ |
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| 515 | #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\ |
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| 516 | (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0U) |
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| 517 | |||
| 518 | #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ |
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| 519 | ((MODE) == SPI_MODE_MASTER)) |
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| 520 | |||
| 521 | #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ |
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| 522 | ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \ |
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| 523 | ((MODE) == SPI_DIRECTION_1LINE)) |
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| 524 | |||
| 525 | #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) |
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| 526 | |||
| 527 | #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ |
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| 528 | ((MODE) == SPI_DIRECTION_1LINE)) |
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| 529 | |||
| 530 | #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \ |
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| 531 | ((DATASIZE) == SPI_DATASIZE_8BIT)) |
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| 532 | |||
| 533 | #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \ |
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| 534 | ((CPOL) == SPI_POLARITY_HIGH)) |
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| 535 | |||
| 536 | #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \ |
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| 537 | ((CPHA) == SPI_PHASE_2EDGE)) |
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| 538 | |||
| 539 | #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \ |
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| 540 | ((NSS) == SPI_NSS_HARD_INPUT) || \ |
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| 541 | ((NSS) == SPI_NSS_HARD_OUTPUT)) |
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| 542 | |||
| 543 | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ |
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| 544 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ |
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| 545 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ |
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| 546 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ |
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| 547 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ |
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| 548 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ |
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| 549 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ |
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| 550 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) |
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| 551 | |||
| 552 | #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ |
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| 553 | ((BIT) == SPI_FIRSTBIT_LSB)) |
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| 554 | |||
| 555 | #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \ |
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| 556 | ((CALCULATION) == SPI_CRCCALCULATION_ENABLE)) |
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| 557 | |||
| 558 | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x01U) && ((POLYNOMIAL) <= 0xFFFFU)) |
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| 559 | |||
| 560 | /** |
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| 561 | * @} |
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| 562 | */ |
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| 563 | |||
| 564 | /* Private functions ---------------------------------------------------------*/ |
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| 565 | /** @defgroup SPI_Private_Functions SPI Private Functions |
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| 566 | * @{ |
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| 567 | */ |
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| 568 | uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi); |
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| 569 | /** |
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| 570 | * @} |
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| 571 | */ |
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| 572 | |||
| 573 | /** |
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| 574 | * @} |
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| 575 | */ |
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| 576 | |||
| 577 | /** |
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| 578 | * @} |
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| 579 | */ |
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| 580 | |||
| 581 | #ifdef __cplusplus |
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| 582 | } |
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| 583 | #endif |
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| 584 | |||
| 585 | #endif /* __STM32F1xx_HAL_SPI_H */ |
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| 586 | |||
| 587 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |