WebSVN – EDIS_Ignition – Blame – /trunk/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h

Rev	Author	Line No.	Line
18	mjames	1	/**
		2	******************************************************************************
		3	* @file stm32f1xx_hal_spi.h
		4	* @author MCD Application Team
		5	* @brief Header file of SPI HAL module.
		6	******************************************************************************
		7	* @attention
		8	*
		9	* Copyright (c) 2016 STMicroelectronics.
		10	* All rights reserved.
		11	*
		12	* This software is licensed under terms that can be found in the LICENSE file
		13	* in the root directory of this software component.
		14	* If no LICENSE file comes with this software, it is provided AS-IS.
		15	*
		16	******************************************************************************
		17	*/
		18
		19	/* Define to prevent recursive inclusion -------------------------------------*/
		20	#ifndef STM32F1xx_HAL_SPI_H
		21	#define STM32F1xx_HAL_SPI_H
		22
		23	#ifdef __cplusplus
		24	extern "C" {
		25	#endif
		26
		27	/* Includes ------------------------------------------------------------------*/
		28	#include "stm32f1xx_hal_def.h"
		29
		30	/** @addtogroup STM32F1xx_HAL_Driver
		31	* @{
		32	*/
		33
		34	/** @addtogroup SPI
		35	* @{
		36	*/
		37
		38	/* Exported types ------------------------------------------------------------*/
		39	/** @defgroup SPI_Exported_Types SPI Exported Types
		40	* @{
		41	*/
		42
		43	/**
		44	* @brief SPI Configuration Structure definition
		45	*/
		46	typedef struct
		47	{
		48	uint32_t Mode; /*!< Specifies the SPI operating mode.
		49	This parameter can be a value of @ref SPI_Mode */
		50
		51	uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
		52	This parameter can be a value of @ref SPI_Direction */
		53
		54	uint32_t DataSize; /*!< Specifies the SPI data size.
		55	This parameter can be a value of @ref SPI_Data_Size */
		56
		57	uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
		58	This parameter can be a value of @ref SPI_Clock_Polarity */
		59
		60	uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
		61	This parameter can be a value of @ref SPI_Clock_Phase */
		62
		63	uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
		64	hardware (NSS pin) or by software using the SSI bit.
		65	This parameter can be a value of @ref SPI_Slave_Select_management */
		66
		67	uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
		68	used to configure the transmit and receive SCK clock.
		69	This parameter can be a value of @ref SPI_BaudRate_Prescaler
		70	@note The communication clock is derived from the master
		71	clock. The slave clock does not need to be set. */
		72
		73	uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
		74	This parameter can be a value of @ref SPI_MSB_LSB_transmission */
		75
		76	uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
		77	This parameter can be a value of @ref SPI_TI_mode */
		78
		79	uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
		80	This parameter can be a value of @ref SPI_CRC_Calculation */
		81
		82	uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
		83	This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */
		84	} SPI_InitTypeDef;
		85
		86	/**
		87	* @brief HAL SPI State structure definition
		88	*/
		89	typedef enum
		90	{
		91	HAL_SPI_STATE_RESET = 0x00U, /!< Peripheral not Initialized /
		92	HAL_SPI_STATE_READY = 0x01U, /!< Peripheral Initialized and ready for use /
		93	HAL_SPI_STATE_BUSY = 0x02U, /!< an internal process is ongoing /
		94	HAL_SPI_STATE_BUSY_TX = 0x03U, /!< Data Transmission process is ongoing /
		95	HAL_SPI_STATE_BUSY_RX = 0x04U, /!< Data Reception process is ongoing /
		96	HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /!< Data Transmission and Reception process is ongoing /
		97	HAL_SPI_STATE_ERROR = 0x06U, /!< SPI error state /
		98	HAL_SPI_STATE_ABORT = 0x07U /!< SPI abort is ongoing /
		99	} HAL_SPI_StateTypeDef;
		100
		101	/**
		102	* @brief SPI handle Structure definition
		103	*/
		104	typedef struct __SPI_HandleTypeDef
		105	{
		106	SPI_TypeDef Instance; /!< SPI registers base address */
		107
		108	SPI_InitTypeDef Init; /!< SPI communication parameters /
		109
		110	uint8_t pTxBuffPtr; /!< Pointer to SPI Tx transfer Buffer */
		111
		112	uint16_t TxXferSize; /!< SPI Tx Transfer size /
		113
		114	__IO uint16_t TxXferCount; /!< SPI Tx Transfer Counter /
		115
		116	uint8_t pRxBuffPtr; /!< Pointer to SPI Rx transfer Buffer */
		117
		118	uint16_t RxXferSize; /!< SPI Rx Transfer size /
		119
		120	__IO uint16_t RxXferCount; /!< SPI Rx Transfer Counter /
		121
		122	void (RxISR)(struct __SPI_HandleTypeDef hspi); /!< function pointer on Rx ISR /
		123
		124	void (TxISR)(struct __SPI_HandleTypeDef hspi); /!< function pointer on Tx ISR /
		125
		126	DMA_HandleTypeDef hdmatx; /!< SPI Tx DMA Handle parameters */
		127
		128	DMA_HandleTypeDef hdmarx; /!< SPI Rx DMA Handle parameters */
		129
		130	HAL_LockTypeDef Lock; /!< Locking object /
		131
		132	__IO HAL_SPI_StateTypeDef State; /!< SPI communication state /
		133
		134	__IO uint32_t ErrorCode; /!< SPI Error code /
		135
		136	#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
		137	void (* TxCpltCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI Tx Completed callback */
		138	void (* RxCpltCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI Rx Completed callback */
		139	void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI TxRx Completed callback */
		140	void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI Tx Half Completed callback */
		141	void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI Rx Half Completed callback */
		142	void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI TxRx Half Completed callback */
		143	void (* ErrorCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI Error callback */
		144	void (* AbortCpltCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI Abort callback */
		145	void (* MspInitCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI Msp Init callback */
		146	void (* MspDeInitCallback)(struct __SPI_HandleTypeDef hspi); /!< SPI Msp DeInit callback */
		147
		148	#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
		149	} SPI_HandleTypeDef;
		150
		151	#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
		152	/**
		153	* @brief HAL SPI Callback ID enumeration definition
		154	*/
		155	typedef enum
		156	{
		157	HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /!< SPI Tx Completed callback ID /
		158	HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /!< SPI Rx Completed callback ID /
		159	HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /!< SPI TxRx Completed callback ID /
		160	HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /!< SPI Tx Half Completed callback ID /
		161	HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /!< SPI Rx Half Completed callback ID /
		162	HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /!< SPI TxRx Half Completed callback ID /
		163	HAL_SPI_ERROR_CB_ID = 0x06U, /!< SPI Error callback ID /
		164	HAL_SPI_ABORT_CB_ID = 0x07U, /!< SPI Abort callback ID /
		165	HAL_SPI_MSPINIT_CB_ID = 0x08U, /!< SPI Msp Init callback ID /
		166	HAL_SPI_MSPDEINIT_CB_ID = 0x09U /!< SPI Msp DeInit callback ID /
		167
		168	} HAL_SPI_CallbackIDTypeDef;
		169
		170	/**
		171	* @brief HAL SPI Callback pointer definition
		172	*/
		173	typedef void (pSPI_CallbackTypeDef)(SPI_HandleTypeDef hspi); /!< pointer to an SPI callback function /
		174
		175	#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
		176	/**
		177	* @}
		178	*/
		179
		180	/* Exported constants --------------------------------------------------------*/
		181	/** @defgroup SPI_Exported_Constants SPI Exported Constants
		182	* @{
		183	*/
		184
		185	/** @defgroup SPI_Error_Code SPI Error Code
		186	* @{
		187	*/
		188	#define HAL_SPI_ERROR_NONE (0x00000000U) /!< No error /
		189	#define HAL_SPI_ERROR_MODF (0x00000001U) /!< MODF error /
		190	#define HAL_SPI_ERROR_CRC (0x00000002U) /!< CRC error /
		191	#define HAL_SPI_ERROR_OVR (0x00000004U) /!< OVR error /
		192	#define HAL_SPI_ERROR_DMA (0x00000010U) /!< DMA transfer error /
		193	#define HAL_SPI_ERROR_FLAG (0x00000020U) /!< Error on RXNE/TXE/BSY Flag /
		194	#define HAL_SPI_ERROR_ABORT (0x00000040U) /!< Error during SPI Abort procedure /
		195	#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
		196	#define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /!< Invalid Callback error /
		197	#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
		198	/**
		199	* @}
		200	*/
		201
		202	/** @defgroup SPI_Mode SPI Mode
		203	* @{
		204	*/
		205	#define SPI_MODE_SLAVE (0x00000000U)
		206	#define SPI_MODE_MASTER (SPI_CR1_MSTR \| SPI_CR1_SSI)
		207	/**
		208	* @}
		209	*/
		210
		211	/** @defgroup SPI_Direction SPI Direction Mode
		212	* @{
		213	*/
		214	#define SPI_DIRECTION_2LINES (0x00000000U)
		215	#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
		216	#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
		217	/**
		218	* @}
		219	*/
		220
		221	/** @defgroup SPI_Data_Size SPI Data Size
		222	* @{
		223	*/
		224	#define SPI_DATASIZE_8BIT (0x00000000U)
		225	#define SPI_DATASIZE_16BIT SPI_CR1_DFF
		226	/**
		227	* @}
		228	*/
		229
		230	/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
		231	* @{
		232	*/
		233	#define SPI_POLARITY_LOW (0x00000000U)
		234	#define SPI_POLARITY_HIGH SPI_CR1_CPOL
		235	/**
		236	* @}
		237	*/
		238
		239	/** @defgroup SPI_Clock_Phase SPI Clock Phase
		240	* @{
		241	*/
		242	#define SPI_PHASE_1EDGE (0x00000000U)
		243	#define SPI_PHASE_2EDGE SPI_CR1_CPHA
		244	/**
		245	* @}
		246	*/
		247
		248	/** @defgroup SPI_Slave_Select_management SPI Slave Select Management
		249	* @{
		250	*/
		251	#define SPI_NSS_SOFT SPI_CR1_SSM
		252	#define SPI_NSS_HARD_INPUT (0x00000000U)
		253	#define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U)
		254	/**
		255	* @}
		256	*/
		257
		258	/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
		259	* @{
		260	*/
		261	#define SPI_BAUDRATEPRESCALER_2 (0x00000000U)
		262	#define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0)
		263	#define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1)
		264	#define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 \| SPI_CR1_BR_0)
		265	#define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2)
		266	#define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 \| SPI_CR1_BR_0)
		267	#define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 \| SPI_CR1_BR_1)
		268	#define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 \| SPI_CR1_BR_1 \| SPI_CR1_BR_0)
		269	/**
		270	* @}
		271	*/
		272
		273	/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
		274	* @{
		275	*/
		276	#define SPI_FIRSTBIT_MSB (0x00000000U)
		277	#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
		278	/**
		279	* @}
		280	*/
		281
		282	/** @defgroup SPI_TI_mode SPI TI Mode
		283	* @{
		284	*/
		285	#define SPI_TIMODE_DISABLE (0x00000000U)
		286	/**
		287	* @}
		288	*/
		289
		290	/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
		291	* @{
		292	*/
		293	#define SPI_CRCCALCULATION_DISABLE (0x00000000U)
		294	#define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
		295	/**
		296	* @}
		297	*/
		298
		299	/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
		300	* @{
		301	*/
		302	#define SPI_IT_TXE SPI_CR2_TXEIE
		303	#define SPI_IT_RXNE SPI_CR2_RXNEIE
		304	#define SPI_IT_ERR SPI_CR2_ERRIE
		305	/**
		306	* @}
		307	*/
		308
		309	/** @defgroup SPI_Flags_definition SPI Flags Definition
		310	* @{
		311	*/
		312	#define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
		313	#define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
		314	#define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
		315	#define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
		316	#define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
		317	#define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
		318	#define SPI_FLAG_MASK (SPI_SR_RXNE \| SPI_SR_TXE \| SPI_SR_BSY\
		319	\| SPI_SR_CRCERR \| SPI_SR_MODF \| SPI_SR_OVR)
		320	/**
		321	* @}
		322	*/
		323
		324	/**
		325	* @}
		326	*/
		327
		328	/* Exported macros -----------------------------------------------------------*/
		329	/** @defgroup SPI_Exported_Macros SPI Exported Macros
		330	* @{
		331	*/
		332
		333	/** @brief Reset SPI handle state.
		334	* @param __HANDLE__ specifies the SPI Handle.
		335	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		336	* @retval None
		337	*/
		338	#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
		339	#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \
		340	(__HANDLE__)->State = HAL_SPI_STATE_RESET; \
		341	(__HANDLE__)->MspInitCallback = NULL; \
		342	(__HANDLE__)->MspDeInitCallback = NULL; \
		343	} while(0)
		344	#else
		345	#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
		346	#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
		347
		348	/** @brief Enable the specified SPI interrupts.
		349	* @param __HANDLE__ specifies the SPI Handle.
		350	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		351	* @param __INTERRUPT__ specifies the interrupt source to enable.
		352	* This parameter can be one of the following values:
		353	* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
		354	* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
		355	* @arg SPI_IT_ERR: Error interrupt enable
		356	* @retval None
		357	*/
		358	#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
		359
		360	/** @brief Disable the specified SPI interrupts.
		361	* @param __HANDLE__ specifies the SPI handle.
		362	* This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral.
		363	* @param __INTERRUPT__ specifies the interrupt source to disable.
		364	* This parameter can be one of the following values:
		365	* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
		366	* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
		367	* @arg SPI_IT_ERR: Error interrupt enable
		368	* @retval None
		369	*/
		370	#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
		371
		372	/** @brief Check whether the specified SPI interrupt source is enabled or not.
		373	* @param __HANDLE__ specifies the SPI Handle.
		374	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		375	* @param __INTERRUPT__ specifies the SPI interrupt source to check.
		376	* This parameter can be one of the following values:
		377	* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
		378	* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
		379	* @arg SPI_IT_ERR: Error interrupt enable
		380	* @retval The new state of __IT__ (TRUE or FALSE).
		381	*/
		382	#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
		383	& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
		384
		385	/** @brief Check whether the specified SPI flag is set or not.
		386	* @param __HANDLE__ specifies the SPI Handle.
		387	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		388	* @param __FLAG__ specifies the flag to check.
		389	* This parameter can be one of the following values:
		390	* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
		391	* @arg SPI_FLAG_TXE: Transmit buffer empty flag
		392	* @arg SPI_FLAG_CRCERR: CRC error flag
		393	* @arg SPI_FLAG_MODF: Mode fault flag
		394	* @arg SPI_FLAG_OVR: Overrun flag
		395	* @arg SPI_FLAG_BSY: Busy flag
		396	* @retval The new state of __FLAG__ (TRUE or FALSE).
		397	*/
		398	#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
		399
		400	/** @brief Clear the SPI CRCERR pending flag.
		401	* @param __HANDLE__ specifies the SPI Handle.
		402	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		403	* @retval None
		404	*/
		405	#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
		406
		407	/** @brief Clear the SPI MODF pending flag.
		408	* @param __HANDLE__ specifies the SPI Handle.
		409	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		410	* @retval None
		411	*/
		412	#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
		413	do{ \
		414	__IO uint32_t tmpreg_modf = 0x00U; \
		415	tmpreg_modf = (__HANDLE__)->Instance->SR; \
		416	CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
		417	UNUSED(tmpreg_modf); \
		418	} while(0U)
		419
		420	/** @brief Clear the SPI OVR pending flag.
		421	* @param __HANDLE__ specifies the SPI Handle.
		422	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		423	* @retval None
		424	*/
		425	#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
		426	do{ \
		427	__IO uint32_t tmpreg_ovr = 0x00U; \
		428	tmpreg_ovr = (__HANDLE__)->Instance->DR; \
		429	tmpreg_ovr = (__HANDLE__)->Instance->SR; \
		430	UNUSED(tmpreg_ovr); \
		431	} while(0U)
		432
		433	/** @brief Enable the SPI peripheral.
		434	* @param __HANDLE__ specifies the SPI Handle.
		435	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		436	* @retval None
		437	*/
		438	#define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
		439
		440	/** @brief Disable the SPI peripheral.
		441	* @param __HANDLE__ specifies the SPI Handle.
		442	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		443	* @retval None
		444	*/
		445	#define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
		446
		447	/**
		448	* @}
		449	*/
		450
		451	/* Private constants ---------------------------------------------------------*/
		452	/** @defgroup SPI_Private_Constants SPI Private Constants
		453	* @{
		454	*/
		455	#define SPI_INVALID_CRC_ERROR 0U /* CRC error wrongly detected */
		456	#define SPI_VALID_CRC_ERROR 1U /* CRC error is true */
		457	/**
		458	* @}
		459	*/
		460
		461	/* Private macros ------------------------------------------------------------*/
		462	/** @defgroup SPI_Private_Macros SPI Private Macros
		463	* @{
		464	*/
		465
		466	/** @brief Set the SPI transmit-only mode.
		467	* @param __HANDLE__ specifies the SPI Handle.
		468	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		469	* @retval None
		470	*/
		471	#define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
		472
		473	/** @brief Set the SPI receive-only mode.
		474	* @param __HANDLE__ specifies the SPI Handle.
		475	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		476	* @retval None
		477	*/
		478	#define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
		479
		480	/** @brief Reset the CRC calculation of the SPI.
		481	* @param __HANDLE__ specifies the SPI Handle.
		482	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
		483	* @retval None
		484	*/
		485	#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
		486	SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U)
		487
		488	/** @brief Check whether the specified SPI flag is set or not.
		489	* @param __SR__ copy of SPI SR register.
		490	* @param __FLAG__ specifies the flag to check.
		491	* This parameter can be one of the following values:
		492	* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
		493	* @arg SPI_FLAG_TXE: Transmit buffer empty flag
		494	* @arg SPI_FLAG_CRCERR: CRC error flag
		495	* @arg SPI_FLAG_MODF: Mode fault flag
		496	* @arg SPI_FLAG_OVR: Overrun flag
		497	* @arg SPI_FLAG_BSY: Busy flag
		498	* @retval SET or RESET.
		499	*/
		500	#define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \
		501	((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET)
		502
		503	/** @brief Check whether the specified SPI Interrupt is set or not.
		504	* @param __CR2__ copy of SPI CR2 register.
		505	* @param __INTERRUPT__ specifies the SPI interrupt source to check.
		506	* This parameter can be one of the following values:
		507	* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
		508	* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
		509	* @arg SPI_IT_ERR: Error interrupt enable
		510	* @retval SET or RESET.
		511	*/
		512	#define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \
		513	(__INTERRUPT__)) ? SET : RESET)
		514
		515	/** @brief Checks if SPI Mode parameter is in allowed range.
		516	* @param __MODE__ specifies the SPI Mode.
		517	* This parameter can be a value of @ref SPI_Mode
		518	* @retval None
		519	*/
		520	#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) \|\| \
		521	((__MODE__) == SPI_MODE_MASTER))
		522
		523	/** @brief Checks if SPI Direction Mode parameter is in allowed range.
		524	* @param __MODE__ specifies the SPI Direction Mode.
		525	* This parameter can be a value of @ref SPI_Direction
		526	* @retval None
		527	*/
		528	#define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) \|\| \
		529	((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) \|\| \
		530	((__MODE__) == SPI_DIRECTION_1LINE))
		531
		532	/** @brief Checks if SPI Direction Mode parameter is 2 lines.
		533	* @param __MODE__ specifies the SPI Direction Mode.
		534	* @retval None
		535	*/
		536	#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
		537
		538	/** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines.
		539	* @param __MODE__ specifies the SPI Direction Mode.
		540	* @retval None
		541	*/
		542	#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) \|\| \
		543	((__MODE__) == SPI_DIRECTION_1LINE))
		544
		545	/** @brief Checks if SPI Data Size parameter is in allowed range.
		546	* @param __DATASIZE__ specifies the SPI Data Size.
		547	* This parameter can be a value of @ref SPI_Data_Size
		548	* @retval None
		549	*/
		550	#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) \|\| \
		551	((__DATASIZE__) == SPI_DATASIZE_8BIT))
		552
		553	/** @brief Checks if SPI Serial clock steady state parameter is in allowed range.
		554	* @param __CPOL__ specifies the SPI serial clock steady state.
		555	* This parameter can be a value of @ref SPI_Clock_Polarity
		556	* @retval None
		557	*/
		558	#define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) \|\| \
		559	((__CPOL__) == SPI_POLARITY_HIGH))
		560
		561	/** @brief Checks if SPI Clock Phase parameter is in allowed range.
		562	* @param __CPHA__ specifies the SPI Clock Phase.
		563	* This parameter can be a value of @ref SPI_Clock_Phase
		564	* @retval None
		565	*/
		566	#define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) \|\| \
		567	((__CPHA__) == SPI_PHASE_2EDGE))
		568
		569	/** @brief Checks if SPI Slave Select parameter is in allowed range.
		570	* @param __NSS__ specifies the SPI Slave Select management parameter.
		571	* This parameter can be a value of @ref SPI_Slave_Select_management
		572	* @retval None
		573	*/
		574	#define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) \|\| \
		575	((__NSS__) == SPI_NSS_HARD_INPUT) \|\| \
		576	((__NSS__) == SPI_NSS_HARD_OUTPUT))
		577
		578	/** @brief Checks if SPI Baudrate prescaler parameter is in allowed range.
		579	* @param __PRESCALER__ specifies the SPI Baudrate prescaler.
		580	* This parameter can be a value of @ref SPI_BaudRate_Prescaler
		581	* @retval None
		582	*/
		583	#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) \|\| \
		584	((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) \|\| \
		585	((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) \|\| \
		586	((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) \|\| \
		587	((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) \|\| \
		588	((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) \|\| \
		589	((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) \|\| \
		590	((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
		591
		592	/** @brief Checks if SPI MSB LSB transmission parameter is in allowed range.
		593	* @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
		594	* This parameter can be a value of @ref SPI_MSB_LSB_transmission
		595	* @retval None
		596	*/
		597	#define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) \|\| \
		598	((__BIT__) == SPI_FIRSTBIT_LSB))
		599
		600	/** @brief Checks if SPI TI mode parameter is disabled.
		601	* @param __MODE__ SPI_TIMODE_DISABLE. Device not support Ti Mode.
		602	* This parameter can be a value of @ref SPI_TI_mode
		603	* @retval None
		604	*/
		605	#define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE)
		606
		607	/** @brief Checks if SPI CRC calculation enabled state is in allowed range.
		608	* @param __CALCULATION__ specifies the SPI CRC calculation enable state.
		609	* This parameter can be a value of @ref SPI_CRC_Calculation
		610	* @retval None
		611	*/
		612	#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) \|\| \
		613	((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
		614
		615	/** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
		616	* @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation.
		617	* This parameter must be a number between Min_Data = 0 and Max_Data = 65535
		618	* @retval None
		619	*/
		620	#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \
		621	((__POLYNOMIAL__) <= 0xFFFFU) && \
		622	(((__POLYNOMIAL__)&0x1U) != 0U))
		623
		624	/** @brief Checks if DMA handle is valid.
		625	* @param __HANDLE__ specifies a DMA Handle.
		626	* @retval None
		627	*/
		628	#define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL)
		629
		630	/**
		631	* @}
		632	*/
		633
		634	/* Private functions ---------------------------------------------------------*/
		635	/** @defgroup SPI_Private_Functions SPI Private Functions
		636	* @{
		637	*/
		638	uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi);
		639	/**
		640	* @}
		641	*/
		642
		643	/* Exported functions --------------------------------------------------------*/
		644	/** @addtogroup SPI_Exported_Functions
		645	* @{
		646	*/
		647
		648	/** @addtogroup SPI_Exported_Functions_Group1
		649	* @{
		650	*/
		651	/* Initialization/de-initialization functions ********************************/
		652	HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
		653	HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi);
		654	void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
		655	void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
		656
		657	/* Callbacks Register/UnRegister functions ***********************************/
		658	#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
		659	HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID,
		660	pSPI_CallbackTypeDef pCallback);
		661	HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID);
		662	#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
		663	/**
		664	* @}
		665	*/
		666
		667	/** @addtogroup SPI_Exported_Functions_Group2
		668	* @{
		669	*/
		670	/* I/O operation functions ***************************************************/
		671	HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout);
		672	HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout);
		673	HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size,
		674	uint32_t Timeout);
		675	HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size);
		676	HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size);
		677	HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData,
		678	uint16_t Size);
		679	HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size);
		680	HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size);
		681	HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData,
		682	uint16_t Size);
		683	HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
		684	HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
		685	HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
		686	/* Transfer Abort functions */
		687	HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
		688	HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);
		689
		690	void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
		691	void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
		692	void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
		693	void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
		694	void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
		695	void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
		696	void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
		697	void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
		698	void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
		699	/**
		700	* @}
		701	*/
		702
		703	/** @addtogroup SPI_Exported_Functions_Group3
		704	* @{
		705	*/
		706	/* Peripheral State and Error functions ***************************************/
		707	HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
		708	uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
		709	/**
		710	* @}
		711	*/
		712
		713	/**
		714	* @}
		715	*/
		716
		717	/**
		718	* @}
		719	*/
		720
		721	/**
		722	* @}
		723	*/
		724
		725	#ifdef __cplusplus
		726	}
		727	#endif
		728
		729	#endif /* STM32F1xx_HAL_SPI_H */
		730

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(root)/trunk/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h – Rev 18