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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_sd.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of SD HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© Copyright (c) 2018 STMicroelectronics. |
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| 10 | * All rights reserved.</center></h2> |
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| 11 | * |
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| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | |||
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 21 | #ifndef STM32F1xx_HAL_SD_H |
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| 22 | #define STM32F1xx_HAL_SD_H |
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| 23 | |||
| 24 | #ifdef __cplusplus |
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| 25 | extern "C" { |
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| 26 | #endif |
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| 27 | |||
| 28 | #if defined(SDIO) |
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| 29 | |||
| 30 | /* Includes ------------------------------------------------------------------*/ |
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| 31 | #include "stm32f1xx_ll_sdmmc.h" |
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| 32 | |||
| 33 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 34 | * @{ |
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| 35 | */ |
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| 36 | |||
| 37 | /** @defgroup SD SD |
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| 38 | * @brief SD HAL module driver |
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| 39 | * @{ |
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| 40 | */ |
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| 41 | |||
| 42 | /* Exported types ------------------------------------------------------------*/ |
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| 43 | /** @defgroup SD_Exported_Types SD Exported Types |
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| 44 | * @{ |
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| 45 | */ |
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| 46 | |||
| 47 | /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure |
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| 48 | * @{ |
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| 49 | */ |
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| 50 | typedef enum |
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| 51 | { |
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| 52 | HAL_SD_STATE_RESET = 0x00000000U, /*!< SD not yet initialized or disabled */ |
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| 53 | HAL_SD_STATE_READY = 0x00000001U, /*!< SD initialized and ready for use */ |
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| 54 | HAL_SD_STATE_TIMEOUT = 0x00000002U, /*!< SD Timeout state */ |
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| 55 | HAL_SD_STATE_BUSY = 0x00000003U, /*!< SD process ongoing */ |
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| 56 | HAL_SD_STATE_PROGRAMMING = 0x00000004U, /*!< SD Programming State */ |
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| 57 | HAL_SD_STATE_RECEIVING = 0x00000005U, /*!< SD Receiving State */ |
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| 58 | HAL_SD_STATE_TRANSFER = 0x00000006U, /*!< SD Transfer State */ |
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| 59 | HAL_SD_STATE_ERROR = 0x0000000FU /*!< SD is in error state */ |
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| 60 | }HAL_SD_StateTypeDef; |
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| 61 | /** |
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| 62 | * @} |
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| 63 | */ |
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| 64 | |||
| 65 | /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure |
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| 66 | * @{ |
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| 67 | */ |
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| 68 | typedef uint32_t HAL_SD_CardStateTypeDef; |
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| 69 | |||
| 70 | #define HAL_SD_CARD_READY 0x00000001U /*!< Card state is ready */ |
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| 71 | #define HAL_SD_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ |
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| 72 | #define HAL_SD_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ |
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| 73 | #define HAL_SD_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ |
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| 74 | #define HAL_SD_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ |
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| 75 | #define HAL_SD_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ |
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| 76 | #define HAL_SD_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ |
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| 77 | #define HAL_SD_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ |
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| 78 | #define HAL_SD_CARD_ERROR 0x000000FFU /*!< Card response Error */ |
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| 79 | /** |
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| 80 | * @} |
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| 81 | */ |
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| 82 | |||
| 83 | /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition |
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| 84 | * @{ |
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| 85 | */ |
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| 86 | #define SD_InitTypeDef SDIO_InitTypeDef |
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| 87 | #define SD_TypeDef SDIO_TypeDef |
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| 88 | |||
| 89 | /** |
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| 90 | * @brief SD Card Information Structure definition |
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| 91 | */ |
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| 92 | typedef struct |
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| 93 | { |
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| 94 | uint32_t CardType; /*!< Specifies the card Type */ |
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| 95 | |||
| 96 | uint32_t CardVersion; /*!< Specifies the card version */ |
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| 97 | |||
| 98 | uint32_t Class; /*!< Specifies the class of the card class */ |
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| 99 | |||
| 100 | uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ |
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| 101 | |||
| 102 | uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ |
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| 103 | |||
| 104 | uint32_t BlockSize; /*!< Specifies one block size in bytes */ |
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| 105 | |||
| 106 | uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ |
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| 107 | |||
| 108 | uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ |
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| 109 | |||
| 110 | }HAL_SD_CardInfoTypeDef; |
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| 111 | |||
| 112 | /** |
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| 113 | * @brief SD handle Structure definition |
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| 114 | */ |
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| 115 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
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| 116 | typedef struct __SD_HandleTypeDef |
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| 117 | #else |
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| 118 | typedef struct |
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| 119 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
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| 120 | { |
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| 121 | SD_TypeDef *Instance; /*!< SD registers base address */ |
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| 122 | |||
| 123 | SD_InitTypeDef Init; /*!< SD required parameters */ |
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| 124 | |||
| 125 | HAL_LockTypeDef Lock; /*!< SD locking object */ |
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| 126 | |||
| 127 | uint8_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */ |
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| 128 | |||
| 129 | uint32_t TxXferSize; /*!< SD Tx Transfer size */ |
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| 130 | |||
| 131 | uint8_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */ |
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| 132 | |||
| 133 | uint32_t RxXferSize; /*!< SD Rx Transfer size */ |
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| 134 | |||
| 135 | __IO uint32_t Context; /*!< SD transfer context */ |
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| 136 | |||
| 137 | __IO HAL_SD_StateTypeDef State; /*!< SD card State */ |
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| 138 | |||
| 139 | __IO uint32_t ErrorCode; /*!< SD Card Error codes */ |
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| 140 | |||
| 141 | DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */ |
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| 142 | |||
| 143 | DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */ |
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| 144 | |||
| 145 | HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */ |
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| 146 | |||
| 147 | uint32_t CSD[4]; /*!< SD card specific data table */ |
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| 148 | |||
| 149 | uint32_t CID[4]; /*!< SD card identification number table */ |
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| 150 | |||
| 151 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
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| 152 | void (* TxCpltCallback) (struct __SD_HandleTypeDef *hsd); |
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| 153 | void (* RxCpltCallback) (struct __SD_HandleTypeDef *hsd); |
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| 154 | void (* ErrorCallback) (struct __SD_HandleTypeDef *hsd); |
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| 155 | void (* AbortCpltCallback) (struct __SD_HandleTypeDef *hsd); |
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| 156 | |||
| 157 | void (* MspInitCallback) (struct __SD_HandleTypeDef *hsd); |
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| 158 | void (* MspDeInitCallback) (struct __SD_HandleTypeDef *hsd); |
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| 159 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
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| 160 | }SD_HandleTypeDef; |
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| 161 | |||
| 162 | /** |
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| 163 | * @} |
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| 164 | */ |
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| 165 | |||
| 166 | /** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register |
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| 167 | * @{ |
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| 168 | */ |
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| 169 | typedef struct |
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| 170 | { |
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| 171 | __IO uint8_t CSDStruct; /*!< CSD structure */ |
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| 172 | __IO uint8_t SysSpecVersion; /*!< System specification version */ |
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| 173 | __IO uint8_t Reserved1; /*!< Reserved */ |
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| 174 | __IO uint8_t TAAC; /*!< Data read access time 1 */ |
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| 175 | __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ |
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| 176 | __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ |
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| 177 | __IO uint16_t CardComdClasses; /*!< Card command classes */ |
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| 178 | __IO uint8_t RdBlockLen; /*!< Max. read data block length */ |
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| 179 | __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ |
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| 180 | __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ |
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| 181 | __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ |
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| 182 | __IO uint8_t DSRImpl; /*!< DSR implemented */ |
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| 183 | __IO uint8_t Reserved2; /*!< Reserved */ |
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| 184 | __IO uint32_t DeviceSize; /*!< Device Size */ |
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| 185 | __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ |
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| 186 | __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ |
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| 187 | __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ |
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| 188 | __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ |
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| 189 | __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ |
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| 190 | __IO uint8_t EraseGrSize; /*!< Erase group size */ |
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| 191 | __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ |
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| 192 | __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ |
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| 193 | __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ |
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| 194 | __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ |
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| 195 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
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| 196 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
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| 197 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
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| 198 | __IO uint8_t Reserved3; /*!< Reserved */ |
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| 199 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
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| 200 | __IO uint8_t FileFormatGroup; /*!< File format group */ |
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| 201 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
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| 202 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
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| 203 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
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| 204 | __IO uint8_t FileFormat; /*!< File format */ |
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| 205 | __IO uint8_t ECC; /*!< ECC code */ |
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| 206 | __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
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| 207 | __IO uint8_t Reserved4; /*!< Always 1 */ |
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| 208 | }HAL_SD_CardCSDTypeDef; |
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| 209 | /** |
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| 210 | * @} |
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| 211 | */ |
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| 212 | |||
| 213 | /** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register |
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| 214 | * @{ |
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| 215 | */ |
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| 216 | typedef struct |
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| 217 | { |
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| 218 | __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ |
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| 219 | __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ |
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| 220 | __IO uint32_t ProdName1; /*!< Product Name part1 */ |
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| 221 | __IO uint8_t ProdName2; /*!< Product Name part2 */ |
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| 222 | __IO uint8_t ProdRev; /*!< Product Revision */ |
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| 223 | __IO uint32_t ProdSN; /*!< Product Serial Number */ |
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| 224 | __IO uint8_t Reserved1; /*!< Reserved1 */ |
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| 225 | __IO uint16_t ManufactDate; /*!< Manufacturing Date */ |
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| 226 | __IO uint8_t CID_CRC; /*!< CID CRC */ |
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| 227 | __IO uint8_t Reserved2; /*!< Always 1 */ |
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| 228 | |||
| 229 | }HAL_SD_CardCIDTypeDef; |
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| 230 | /** |
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| 231 | * @} |
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| 232 | */ |
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| 233 | |||
| 234 | /** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13 |
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| 235 | * @{ |
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| 236 | */ |
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| 237 | typedef struct |
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| 238 | { |
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| 239 | __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */ |
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| 240 | __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */ |
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| 241 | __IO uint16_t CardType; /*!< Carries information about card type */ |
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| 242 | __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */ |
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| 243 | __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */ |
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| 244 | __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */ |
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| 245 | __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */ |
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| 246 | __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */ |
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| 247 | __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */ |
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| 248 | __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */ |
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| 249 | |||
| 250 | }HAL_SD_CardStatusTypeDef; |
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| 251 | /** |
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| 252 | * @} |
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| 253 | */ |
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| 254 | |||
| 255 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
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| 256 | /** @defgroup SD_Exported_Types_Group7 SD Callback ID enumeration definition |
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| 257 | * @{ |
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| 258 | */ |
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| 259 | typedef enum |
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| 260 | { |
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| 261 | HAL_SD_TX_CPLT_CB_ID = 0x00U, /*!< SD Tx Complete Callback ID */ |
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| 262 | HAL_SD_RX_CPLT_CB_ID = 0x01U, /*!< SD Rx Complete Callback ID */ |
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| 263 | HAL_SD_ERROR_CB_ID = 0x02U, /*!< SD Error Callback ID */ |
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| 264 | HAL_SD_ABORT_CB_ID = 0x03U, /*!< SD Abort Callback ID */ |
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| 265 | |||
| 266 | HAL_SD_MSP_INIT_CB_ID = 0x10U, /*!< SD MspInit Callback ID */ |
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| 267 | HAL_SD_MSP_DEINIT_CB_ID = 0x11U /*!< SD MspDeInit Callback ID */ |
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| 268 | }HAL_SD_CallbackIDTypeDef; |
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| 269 | /** |
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| 270 | * @} |
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| 271 | */ |
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| 272 | |||
| 273 | /** @defgroup SD_Exported_Types_Group8 SD Callback pointer definition |
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| 274 | * @{ |
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| 275 | */ |
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| 276 | typedef void (*pSD_CallbackTypeDef) (SD_HandleTypeDef *hsd); |
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| 277 | /** |
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| 278 | * @} |
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| 279 | */ |
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| 280 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
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| 281 | /** |
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| 282 | * @} |
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| 283 | */ |
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| 284 | |||
| 285 | /* Exported constants --------------------------------------------------------*/ |
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| 286 | /** @defgroup SD_Exported_Constants Exported Constants |
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| 287 | * @{ |
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| 288 | */ |
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| 289 | |||
| 290 | #define BLOCKSIZE 512U /*!< Block size is 512 bytes */ |
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| 291 | |||
| 292 | /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition |
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| 293 | * @{ |
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| 294 | */ |
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| 295 | #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
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| 296 | #define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ |
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| 297 | #define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ |
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| 298 | #define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ |
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| 299 | #define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ |
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| 300 | #define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ |
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| 301 | #define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ |
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| 302 | #define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ |
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| 303 | #define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the |
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| 304 | number of transferred bytes does not match the block length */ |
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| 305 | #define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ |
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| 306 | #define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ |
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| 307 | #define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ |
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| 308 | #define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock |
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| 309 | command or if there was an attempt to access a locked card */ |
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| 310 | #define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ |
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| 311 | #define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ |
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| 312 | #define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ |
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| 313 | #define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ |
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| 314 | #define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ |
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| 315 | #define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ |
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| 316 | #define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ |
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| 317 | #define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ |
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| 318 | #define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ |
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| 319 | #define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ |
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| 320 | #define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out |
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| 321 | of erase sequence command was received */ |
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| 322 | #define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ |
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| 323 | #define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ |
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| 324 | #define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ |
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| 325 | #define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ |
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| 326 | #define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ |
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| 327 | #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
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| 328 | #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
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| 329 | #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
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| 330 | #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
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| 331 | |||
| 332 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
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| 333 | #define HAL_SD_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ |
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| 334 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
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| 335 | /** |
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| 336 | * @} |
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| 337 | */ |
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| 338 | |||
| 339 | /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration |
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| 340 | * @{ |
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| 341 | */ |
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| 342 | #define SD_CONTEXT_NONE 0x00000000U /*!< None */ |
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| 343 | #define SD_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */ |
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| 344 | #define SD_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */ |
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| 345 | #define SD_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */ |
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| 346 | #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */ |
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| 347 | #define SD_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */ |
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| 348 | #define SD_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */ |
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| 349 | |||
| 350 | /** |
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| 351 | * @} |
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| 352 | */ |
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| 353 | |||
| 354 | /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards |
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| 355 | * @{ |
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| 356 | */ |
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| 357 | #define CARD_SDSC 0x00000000U /*!< SD Standard Capacity <2Go */ |
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| 358 | #define CARD_SDHC_SDXC 0x00000001U /*!< SD High Capacity <32Go, SD Extended Capacity <2To */ |
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| 359 | #define CARD_SECURED 0x00000003U |
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| 360 | |||
| 361 | /** |
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| 362 | * @} |
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| 363 | */ |
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| 364 | |||
| 365 | /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version |
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| 366 | * @{ |
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| 367 | */ |
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| 368 | #define CARD_V1_X 0x00000000U |
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| 369 | #define CARD_V2_X 0x00000001U |
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| 370 | /** |
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| 371 | * @} |
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| 372 | */ |
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| 373 | |||
| 374 | /** |
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| 375 | * @} |
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| 376 | */ |
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| 377 | |||
| 378 | /* Exported macro ------------------------------------------------------------*/ |
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| 379 | /** @defgroup SD_Exported_macros SD Exported Macros |
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| 380 | * @brief macros to handle interrupts and specific clock configurations |
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| 381 | * @{ |
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| 382 | */ |
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| 383 | /** @brief Reset SD handle state. |
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| 384 | * @param __HANDLE__ : SD handle. |
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| 385 | * @retval None |
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| 386 | */ |
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| 387 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
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| 388 | #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) do { \ |
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| 389 | (__HANDLE__)->State = HAL_SD_STATE_RESET; \ |
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| 390 | (__HANDLE__)->MspInitCallback = NULL; \ |
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| 391 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
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| 392 | } while(0) |
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| 393 | #else |
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| 394 | #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SD_STATE_RESET) |
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| 395 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
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| 396 | |||
| 397 | /** |
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| 398 | * @brief Enable the SD device. |
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| 399 | * @retval None |
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| 400 | */ |
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| 401 | #define __HAL_SD_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance) |
||
| 402 | |||
| 403 | /** |
||
| 404 | * @brief Disable the SD device. |
||
| 405 | * @retval None |
||
| 406 | */ |
||
| 407 | #define __HAL_SD_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance) |
||
| 408 | |||
| 409 | /** |
||
| 410 | * @brief Enable the SDMMC DMA transfer. |
||
| 411 | * @retval None |
||
| 412 | */ |
||
| 413 | #define __HAL_SD_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance) |
||
| 414 | |||
| 415 | /** |
||
| 416 | * @brief Disable the SDMMC DMA transfer. |
||
| 417 | * @retval None |
||
| 418 | */ |
||
| 419 | #define __HAL_SD_DMA_DISABLE(__HANDLE__) __SDIO_DMA_DISABLE((__HANDLE__)->Instance) |
||
| 420 | |||
| 421 | /** |
||
| 422 | * @brief Enable the SD device interrupt. |
||
| 423 | * @param __HANDLE__: SD Handle |
||
| 424 | * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled. |
||
| 425 | * This parameter can be one or a combination of the following values: |
||
| 426 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
| 427 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
| 428 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
| 429 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
| 430 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
| 431 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
| 432 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
| 433 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
| 434 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
||
| 435 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
||
| 436 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
||
| 437 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
||
| 438 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
||
| 439 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
| 440 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
| 441 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
||
| 442 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
| 443 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
| 444 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
||
| 445 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
||
| 446 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
||
| 447 | * @arg SDIO_IT_SDIOIT: SDIO interrupt received interrupt |
||
| 448 | * @retval None |
||
| 449 | */ |
||
| 450 | #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
| 451 | |||
| 452 | /** |
||
| 453 | * @brief Disable the SD device interrupt. |
||
| 454 | * @param __HANDLE__: SD Handle |
||
| 455 | * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled. |
||
| 456 | * This parameter can be one or a combination of the following values: |
||
| 457 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
| 458 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
| 459 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
| 460 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
| 461 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
| 462 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
| 463 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
| 464 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
| 465 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
||
| 466 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
||
| 467 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
||
| 468 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
||
| 469 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
||
| 470 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
| 471 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
| 472 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
||
| 473 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
| 474 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
| 475 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
||
| 476 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
||
| 477 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
||
| 478 | * @arg SDIO_IT_SDIOIT: SDIO interrupt received interrupt |
||
| 479 | * @retval None |
||
| 480 | */ |
||
| 481 | #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
| 482 | |||
| 483 | /** |
||
| 484 | * @brief Check whether the specified SD flag is set or not. |
||
| 485 | * @param __HANDLE__: SD Handle |
||
| 486 | * @param __FLAG__: specifies the flag to check. |
||
| 487 | * This parameter can be one of the following values: |
||
| 488 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
||
| 489 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
||
| 490 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
||
| 491 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
||
| 492 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
||
| 493 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
||
| 494 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
||
| 495 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
||
| 496 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
||
| 497 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
||
| 498 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
||
| 499 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
||
| 500 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
||
| 501 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
||
| 502 | * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
||
| 503 | * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
||
| 504 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
||
| 505 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
||
| 506 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
||
| 507 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
||
| 508 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
||
| 509 | * @arg SDIO_FLAG_SDIOIT: SDIO interrupt received |
||
| 510 | * @retval The new state of SD FLAG (SET or RESET). |
||
| 511 | */ |
||
| 512 | #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
||
| 513 | |||
| 514 | /** |
||
| 515 | * @brief Clear the SD's pending flags. |
||
| 516 | * @param __HANDLE__: SD Handle |
||
| 517 | * @param __FLAG__: specifies the flag to clear. |
||
| 518 | * This parameter can be one or a combination of the following values: |
||
| 519 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
||
| 520 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
||
| 521 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
||
| 522 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
||
| 523 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
||
| 524 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
||
| 525 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
||
| 526 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
||
| 527 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
||
| 528 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
||
| 529 | * @arg SDIO_FLAG_SDIOIT: SDIO interrupt received |
||
| 530 | * @retval None |
||
| 531 | */ |
||
| 532 | #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
||
| 533 | |||
| 534 | /** |
||
| 535 | * @brief Check whether the specified SD interrupt has occurred or not. |
||
| 536 | * @param __HANDLE__: SD Handle |
||
| 537 | * @param __INTERRUPT__: specifies the SDMMC interrupt source to check. |
||
| 538 | * This parameter can be one of the following values: |
||
| 539 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
| 540 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
| 541 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
| 542 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
| 543 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
| 544 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
| 545 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
| 546 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
| 547 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
||
| 548 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
||
| 549 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
||
| 550 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
||
| 551 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
||
| 552 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
| 553 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
| 554 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
||
| 555 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
| 556 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
| 557 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
||
| 558 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
||
| 559 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
||
| 560 | * @arg SDIO_IT_SDIOIT: SDIO interrupt received interrupt |
||
| 561 | * @retval The new state of SD IT (SET or RESET). |
||
| 562 | */ |
||
| 563 | #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
| 564 | |||
| 565 | /** |
||
| 566 | * @brief Clear the SD's interrupt pending bits. |
||
| 567 | * @param __HANDLE__: SD Handle |
||
| 568 | * @param __INTERRUPT__: specifies the interrupt pending bit to clear. |
||
| 569 | * This parameter can be one or a combination of the following values: |
||
| 570 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
| 571 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
| 572 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
| 573 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
| 574 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
| 575 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
| 576 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
| 577 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
| 578 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
||
| 579 | * @arg SDIO_IT_SDIOIT: SDIO interrupt received interrupt |
||
| 580 | * @retval None |
||
| 581 | */ |
||
| 582 | #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
| 583 | |||
| 584 | /** |
||
| 585 | * @} |
||
| 586 | */ |
||
| 587 | |||
| 588 | /* Exported functions --------------------------------------------------------*/ |
||
| 589 | /** @defgroup SD_Exported_Functions SD Exported Functions |
||
| 590 | * @{ |
||
| 591 | */ |
||
| 592 | |||
| 593 | /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions |
||
| 594 | * @{ |
||
| 595 | */ |
||
| 596 | HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd); |
||
| 597 | HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd); |
||
| 598 | HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd); |
||
| 599 | void HAL_SD_MspInit(SD_HandleTypeDef *hsd); |
||
| 600 | void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd); |
||
| 601 | /** |
||
| 602 | * @} |
||
| 603 | */ |
||
| 604 | |||
| 605 | /** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions |
||
| 606 | * @{ |
||
| 607 | */ |
||
| 608 | /* Blocking mode: Polling */ |
||
| 609 | HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
||
| 610 | HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
||
| 611 | HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd); |
||
| 612 | /* Non-Blocking mode: IT */ |
||
| 613 | HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
||
| 614 | HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
||
| 615 | /* Non-Blocking mode: DMA */ |
||
| 616 | HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
||
| 617 | HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
||
| 618 | |||
| 619 | void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd); |
||
| 620 | |||
| 621 | /* Callback in non blocking modes (DMA) */ |
||
| 622 | void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd); |
||
| 623 | void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd); |
||
| 624 | void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd); |
||
| 625 | void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd); |
||
| 626 | |||
| 627 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
||
| 628 | /* SD callback registering/unregistering */ |
||
| 629 | HAL_StatusTypeDef HAL_SD_RegisterCallback (SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackId, pSD_CallbackTypeDef pCallback); |
||
| 630 | HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackId); |
||
| 631 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
||
| 632 | |||
| 633 | /** |
||
| 634 | * @} |
||
| 635 | */ |
||
| 636 | |||
| 637 | /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions |
||
| 638 | * @{ |
||
| 639 | */ |
||
| 640 | HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode); |
||
| 641 | /** |
||
| 642 | * @} |
||
| 643 | */ |
||
| 644 | |||
| 645 | /** @defgroup SD_Exported_Functions_Group4 SD card related functions |
||
| 646 | * @{ |
||
| 647 | */ |
||
| 648 | HAL_StatusTypeDef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus); |
||
| 649 | HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd); |
||
| 650 | HAL_StatusTypeDef HAL_SD_GetCardCID(SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID); |
||
| 651 | HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD); |
||
| 652 | HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus); |
||
| 653 | HAL_StatusTypeDef HAL_SD_GetCardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo); |
||
| 654 | /** |
||
| 655 | * @} |
||
| 656 | */ |
||
| 657 | |||
| 658 | /** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions |
||
| 659 | * @{ |
||
| 660 | */ |
||
| 661 | HAL_SD_StateTypeDef HAL_SD_GetState(SD_HandleTypeDef *hsd); |
||
| 662 | uint32_t HAL_SD_GetError(SD_HandleTypeDef *hsd); |
||
| 663 | /** |
||
| 664 | * @} |
||
| 665 | */ |
||
| 666 | |||
| 667 | /** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management |
||
| 668 | * @{ |
||
| 669 | */ |
||
| 670 | HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd); |
||
| 671 | HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd); |
||
| 672 | /** |
||
| 673 | * @} |
||
| 674 | */ |
||
| 675 | |||
| 676 | /* Private types -------------------------------------------------------------*/ |
||
| 677 | /** @defgroup SD_Private_Types SD Private Types |
||
| 678 | * @{ |
||
| 679 | */ |
||
| 680 | |||
| 681 | /** |
||
| 682 | * @} |
||
| 683 | */ |
||
| 684 | |||
| 685 | /* Private defines -----------------------------------------------------------*/ |
||
| 686 | /** @defgroup SD_Private_Defines SD Private Defines |
||
| 687 | * @{ |
||
| 688 | */ |
||
| 689 | |||
| 690 | /** |
||
| 691 | * @} |
||
| 692 | */ |
||
| 693 | |||
| 694 | /* Private variables ---------------------------------------------------------*/ |
||
| 695 | /** @defgroup SD_Private_Variables SD Private Variables |
||
| 696 | * @{ |
||
| 697 | */ |
||
| 698 | |||
| 699 | /** |
||
| 700 | * @} |
||
| 701 | */ |
||
| 702 | |||
| 703 | /* Private constants ---------------------------------------------------------*/ |
||
| 704 | /** @defgroup SD_Private_Constants SD Private Constants |
||
| 705 | * @{ |
||
| 706 | */ |
||
| 707 | |||
| 708 | /** |
||
| 709 | * @} |
||
| 710 | */ |
||
| 711 | |||
| 712 | /* Private macros ------------------------------------------------------------*/ |
||
| 713 | /** @defgroup SD_Private_Macros SD Private Macros |
||
| 714 | * @{ |
||
| 715 | */ |
||
| 716 | |||
| 717 | /** |
||
| 718 | * @} |
||
| 719 | */ |
||
| 720 | |||
| 721 | /* Private functions prototypes ----------------------------------------------*/ |
||
| 722 | /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes |
||
| 723 | * @{ |
||
| 724 | */ |
||
| 725 | |||
| 726 | /** |
||
| 727 | * @} |
||
| 728 | */ |
||
| 729 | |||
| 730 | /* Private functions ---------------------------------------------------------*/ |
||
| 731 | /** @defgroup SD_Private_Functions SD Private Functions |
||
| 732 | * @{ |
||
| 733 | */ |
||
| 734 | |||
| 735 | /** |
||
| 736 | * @} |
||
| 737 | */ |
||
| 738 | |||
| 739 | |||
| 740 | /** |
||
| 741 | * @} |
||
| 742 | */ |
||
| 743 | |||
| 744 | /** |
||
| 745 | * @} |
||
| 746 | */ |
||
| 747 | |||
| 748 | /** |
||
| 749 | * @} |
||
| 750 | */ |
||
| 751 | |||
| 752 | #endif /* SDIO */ |
||
| 753 | |||
| 754 | #ifdef __cplusplus |
||
| 755 | } |
||
| 756 | #endif |
||
| 757 | |||
| 758 | |||
| 759 | #endif /* STM32F1xx_HAL_SD_H */ |
||
| 760 | |||
| 761 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |