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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_sd.h |
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4 | * @author MCD Application Team |
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5 | * @version V1.0.1 |
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6 | * @date 31-July-2015 |
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7 | * @brief Header file of SD HAL module. |
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8 | ****************************************************************************** |
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9 | * @attention |
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10 | * |
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11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
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12 | * |
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13 | * Redistribution and use in source and binary forms, with or without modification, |
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14 | * are permitted provided that the following conditions are met: |
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15 | * 1. Redistributions of source code must retain the above copyright notice, |
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16 | * this list of conditions and the following disclaimer. |
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17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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18 | * this list of conditions and the following disclaimer in the documentation |
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19 | * and/or other materials provided with the distribution. |
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20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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21 | * may be used to endorse or promote products derived from this software |
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22 | * without specific prior written permission. |
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23 | * |
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24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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34 | * |
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35 | ****************************************************************************** |
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36 | */ |
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37 | |||
38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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39 | #ifndef __STM32F1xx_HAL_SD_H |
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40 | #define __STM32F1xx_HAL_SD_H |
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41 | |||
42 | #if defined(STM32F103xE) || defined(STM32F103xG) |
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43 | |||
44 | #ifdef __cplusplus |
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45 | extern "C" { |
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46 | #endif |
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47 | |||
48 | /* Includes ------------------------------------------------------------------*/ |
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49 | #include "stm32f1xx_ll_sdmmc.h" |
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50 | |||
51 | /** @addtogroup STM32F1xx_HAL_Driver |
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52 | * @{ |
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53 | */ |
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54 | |||
55 | /** @addtogroup SD |
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56 | * @{ |
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57 | */ |
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58 | |||
59 | /* Exported types ------------------------------------------------------------*/ |
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60 | /** @defgroup SD_Exported_Types SD Exported Types |
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61 | * @{ |
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62 | */ |
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63 | |||
64 | #define SD_InitTypeDef SDIO_InitTypeDef |
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65 | #define SD_TypeDef SDIO_TypeDef |
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66 | |||
67 | /** |
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68 | * @brief SDIO Handle Structure definition |
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69 | */ |
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70 | typedef struct |
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71 | { |
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72 | SD_TypeDef *Instance; /*!< SDIO register base address */ |
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73 | |||
74 | SD_InitTypeDef Init; /*!< SD required parameters */ |
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75 | |||
76 | HAL_LockTypeDef Lock; /*!< SD locking object */ |
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77 | |||
78 | uint32_t CardType; /*!< SD card type */ |
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79 | |||
80 | uint32_t RCA; /*!< SD relative card address */ |
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81 | |||
82 | uint32_t CSD[4]; /*!< SD card specific data table */ |
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83 | |||
84 | uint32_t CID[4]; /*!< SD card identification number table */ |
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85 | |||
86 | __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */ |
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87 | |||
88 | __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */ |
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89 | |||
90 | __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */ |
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91 | |||
92 | __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */ |
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93 | |||
94 | DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */ |
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95 | |||
96 | DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */ |
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97 | |||
98 | }SD_HandleTypeDef; |
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99 | |||
100 | /** |
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101 | * @brief Card Specific Data: CSD Register |
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102 | */ |
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103 | typedef struct |
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104 | { |
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105 | __IO uint8_t CSDStruct; /*!< CSD structure */ |
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106 | __IO uint8_t SysSpecVersion; /*!< System specification version */ |
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107 | __IO uint8_t Reserved1; /*!< Reserved */ |
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108 | __IO uint8_t TAAC; /*!< Data read access time 1 */ |
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109 | __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ |
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110 | __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ |
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111 | __IO uint16_t CardComdClasses; /*!< Card command classes */ |
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112 | __IO uint8_t RdBlockLen; /*!< Max. read data block length */ |
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113 | __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ |
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114 | __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ |
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115 | __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ |
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116 | __IO uint8_t DSRImpl; /*!< DSR implemented */ |
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117 | __IO uint8_t Reserved2; /*!< Reserved */ |
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118 | __IO uint32_t DeviceSize; /*!< Device Size */ |
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119 | __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ |
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120 | __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ |
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121 | __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ |
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122 | __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ |
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123 | __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ |
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124 | __IO uint8_t EraseGrSize; /*!< Erase group size */ |
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125 | __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ |
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126 | __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ |
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127 | __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ |
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128 | __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ |
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129 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
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130 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
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131 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
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132 | __IO uint8_t Reserved3; /*!< Reserved */ |
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133 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
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134 | __IO uint8_t FileFormatGrouop; /*!< File format group */ |
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135 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
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136 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
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137 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
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138 | __IO uint8_t FileFormat; /*!< File format */ |
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139 | __IO uint8_t ECC; /*!< ECC code */ |
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140 | __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
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141 | __IO uint8_t Reserved4; /*!< Always 1 */ |
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142 | |||
143 | }HAL_SD_CSDTypedef; |
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144 | |||
145 | /** |
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146 | * @brief Card Identification Data: CID Register |
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147 | */ |
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148 | typedef struct |
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149 | { |
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150 | __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ |
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151 | __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ |
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152 | __IO uint32_t ProdName1; /*!< Product Name part1 */ |
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153 | __IO uint8_t ProdName2; /*!< Product Name part2 */ |
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154 | __IO uint8_t ProdRev; /*!< Product Revision */ |
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155 | __IO uint32_t ProdSN; /*!< Product Serial Number */ |
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156 | __IO uint8_t Reserved1; /*!< Reserved1 */ |
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157 | __IO uint16_t ManufactDate; /*!< Manufacturing Date */ |
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158 | __IO uint8_t CID_CRC; /*!< CID CRC */ |
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159 | __IO uint8_t Reserved2; /*!< Always 1 */ |
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160 | |||
161 | }HAL_SD_CIDTypedef; |
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162 | |||
163 | /** |
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164 | * @brief SD Card Status returned by ACMD13 |
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165 | */ |
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166 | typedef struct |
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167 | { |
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168 | __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */ |
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169 | __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */ |
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170 | __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */ |
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171 | __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */ |
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172 | __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */ |
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173 | __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */ |
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174 | __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */ |
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175 | __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */ |
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176 | __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */ |
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177 | __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */ |
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178 | |||
179 | }HAL_SD_CardStatusTypedef; |
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180 | |||
181 | /** |
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182 | * @brief SD Card information structure |
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183 | */ |
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184 | typedef struct |
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185 | { |
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186 | HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */ |
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187 | HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */ |
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188 | uint64_t CardCapacity; /*!< Card capacity */ |
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189 | uint32_t CardBlockSize; /*!< Card block size */ |
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190 | uint16_t RCA; /*!< SD relative card address */ |
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191 | uint8_t CardType; /*!< SD card type */ |
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192 | |||
193 | }HAL_SD_CardInfoTypedef; |
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194 | |||
195 | /** |
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196 | * @brief SD Error status enumeration Structure definition |
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197 | */ |
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198 | typedef enum |
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199 | { |
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200 | /** |
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201 | * @brief SD specific error defines |
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202 | */ |
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203 | SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */ |
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204 | SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */ |
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205 | SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */ |
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206 | SD_DATA_TIMEOUT = (4), /*!< Data timeout */ |
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207 | SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */ |
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208 | SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */ |
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209 | SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */ |
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210 | SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */ |
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211 | SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */ |
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212 | SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */ |
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213 | SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */ |
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214 | SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */ |
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215 | SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */ |
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216 | SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */ |
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217 | SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */ |
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218 | SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */ |
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219 | SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */ |
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220 | SD_CC_ERROR = (18), /*!< Internal card controller error */ |
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221 | SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */ |
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222 | SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */ |
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223 | SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */ |
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224 | SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */ |
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225 | SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */ |
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226 | SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */ |
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227 | SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */ |
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228 | SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */ |
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229 | SD_INVALID_VOLTRANGE = (27), |
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230 | SD_ADDR_OUT_OF_RANGE = (28), |
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231 | SD_SWITCH_ERROR = (29), |
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232 | SD_SDIO_DISABLED = (30), |
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233 | SD_SDIO_FUNCTION_BUSY = (31), |
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234 | SD_SDIO_FUNCTION_FAILED = (32), |
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235 | SD_SDIO_UNKNOWN_FUNCTION = (33), |
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236 | |||
237 | /** |
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238 | * @brief Standard error defines |
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239 | */ |
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240 | SD_INTERNAL_ERROR = (34), |
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241 | SD_NOT_CONFIGURED = (35), |
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242 | SD_REQUEST_PENDING = (36), |
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243 | SD_REQUEST_NOT_APPLICABLE = (37), |
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244 | SD_INVALID_PARAMETER = (38), |
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245 | SD_UNSUPPORTED_FEATURE = (39), |
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246 | SD_UNSUPPORTED_HW = (40), |
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247 | SD_ERROR = (41), |
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248 | SD_OK = (0) |
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249 | |||
250 | }HAL_SD_ErrorTypedef; |
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251 | |||
252 | /** |
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253 | * @brief SD Transfer state enumeration structure |
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254 | */ |
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255 | typedef enum |
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256 | { |
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257 | SD_TRANSFER_OK = 0, /*!< Transfer success */ |
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258 | SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */ |
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259 | SD_TRANSFER_ERROR = 2 /*!< Transfer failed */ |
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260 | |||
261 | }HAL_SD_TransferStateTypedef; |
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262 | |||
263 | /** |
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264 | * @brief SD Card State enumeration structure |
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265 | */ |
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266 | typedef enum |
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267 | { |
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268 | SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */ |
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269 | SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */ |
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270 | SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */ |
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271 | SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */ |
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272 | SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */ |
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273 | SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */ |
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274 | SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */ |
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275 | SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */ |
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276 | SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */ |
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277 | |||
278 | }HAL_SD_CardStateTypedef; |
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279 | |||
280 | /** |
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281 | * @brief SD Operation enumeration structure |
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282 | */ |
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283 | typedef enum |
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284 | { |
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285 | SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */ |
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286 | SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */ |
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287 | SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */ |
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288 | SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */ |
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289 | |||
290 | }HAL_SD_OperationTypedef; |
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291 | |||
292 | /** |
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293 | * @} |
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294 | */ |
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295 | |||
296 | /* Exported constants --------------------------------------------------------*/ |
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297 | /** @defgroup SD_Exported_Constants SD Exported Constants |
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298 | * @{ |
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299 | */ |
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300 | |||
301 | /** |
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302 | * @brief SD Commands Index |
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303 | */ |
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304 | #define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */ |
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305 | #define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */ |
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306 | #define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */ |
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307 | #define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */ |
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308 | #define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */ |
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309 | #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its |
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310 | operating condition register (OCR) content in the response on the CMD line. */ |
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311 | #define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */ |
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312 | #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */ |
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313 | #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information |
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314 | and asks the card whether card supports voltage. */ |
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315 | #define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */ |
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316 | #define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */ |
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317 | #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */ |
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318 | #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */ |
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319 | #define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */ |
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320 | #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14) |
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321 | #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */ |
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322 | #define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands |
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323 | (read, write, lock). Default block length is fixed to 512 Bytes. Not effective |
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324 | for SDHS and SDXC. */ |
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325 | #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of |
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326 | fixed 512 bytes in case of SDHC and SDXC. */ |
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327 | #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by |
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328 | STOP_TRANSMISSION command. */ |
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329 | #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */ |
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330 | #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */ |
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331 | #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */ |
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332 | #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of |
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333 | fixed 512 bytes in case of SDHC and SDXC. */ |
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334 | #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */ |
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335 | #define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */ |
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336 | #define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */ |
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337 | #define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */ |
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338 | #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */ |
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339 | #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */ |
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340 | #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */ |
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341 | #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */ |
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342 | #define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command |
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343 | system set by switch function command (CMD6). */ |
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344 | #define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased. |
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345 | Reserved for each command system set by switch function command (CMD6). */ |
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346 | #define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */ |
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347 | #define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */ |
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348 | #define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */ |
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349 | #define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by |
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350 | the SET_BLOCK_LEN command. */ |
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351 | #define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather |
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352 | than a standard command. */ |
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353 | #define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card |
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354 | for general purpose/application specific commands. */ |
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355 | #define SD_CMD_NO_CMD ((uint8_t)64) |
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356 | |||
357 | /** |
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358 | * @brief Following commands are SD Card Specific commands. |
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359 | * SDIO_APP_CMD should be sent before sending these commands. |
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360 | */ |
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361 | #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus |
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362 | widths are given in SCR register. */ |
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363 | #define SD_CMD_SD_APP_STATUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */ |
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364 | #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with |
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365 | 32bit+CRC data block. */ |
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366 | #define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to |
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367 | send its operating condition register (OCR) content in the response on the CMD line. */ |
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368 | #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */ |
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369 | #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */ |
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370 | #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */ |
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371 | #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */ |
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372 | |||
373 | /** |
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374 | * @brief Following commands are SD Card Specific security commands. |
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375 | * SD_CMD_APP_CMD should be sent before sending these commands. |
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376 | */ |
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377 | #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */ |
||
378 | #define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */ |
||
379 | #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */ |
||
380 | #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */ |
||
381 | #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */ |
||
382 | #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */ |
||
383 | #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */ |
||
384 | #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */ |
||
385 | #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */ |
||
386 | #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */ |
||
387 | #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */ |
||
388 | |||
389 | /** |
||
390 | * @brief Supported SD Memory Cards |
||
391 | */ |
||
392 | #define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000) |
||
393 | #define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001) |
||
394 | #define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002) |
||
395 | #define MULTIMEDIA_CARD ((uint32_t)0x00000003) |
||
396 | #define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004) |
||
397 | #define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005) |
||
398 | #define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006) |
||
399 | #define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007) |
||
400 | /** |
||
401 | * @} |
||
402 | */ |
||
403 | |||
404 | /* Exported macro ------------------------------------------------------------*/ |
||
405 | /** @defgroup SD_Exported_macros SD Exported Macros |
||
406 | * @brief macros to handle interrupts and specific clock configurations |
||
407 | * @{ |
||
408 | */ |
||
409 | |||
410 | /** |
||
411 | * @brief Enable the SD device. |
||
412 | * @param __HANDLE__: SD Handle |
||
413 | * @retval None |
||
414 | */ |
||
415 | #define __HAL_SD_SDIO_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance) |
||
416 | |||
417 | /** |
||
418 | * @brief Disable the SD device. |
||
419 | * @param __HANDLE__: SD Handle |
||
420 | * @retval None |
||
421 | */ |
||
422 | #define __HAL_SD_SDIO_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance) |
||
423 | |||
424 | /** |
||
425 | * @brief Enable the SDIO DMA transfer. |
||
426 | * @param __HANDLE__: SD Handle |
||
427 | * @retval None |
||
428 | */ |
||
429 | #define __HAL_SD_SDIO_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance) |
||
430 | |||
431 | /** |
||
432 | * @brief Disable the SDIO DMA transfer. |
||
433 | * @param __HANDLE__: SD Handle |
||
434 | * @retval None |
||
435 | */ |
||
436 | #define __HAL_SD_SDIO_DMA_DISABLE(__HANDLE__) __SDIO_DMA_DISABLE((__HANDLE__)->Instance) |
||
437 | |||
438 | /** |
||
439 | * @brief Enable the SD device interrupt. |
||
440 | * @param __HANDLE__: SD Handle |
||
441 | * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled. |
||
442 | * This parameter can be one or a combination of the following values: |
||
443 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
444 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
445 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
446 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
447 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
448 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
449 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
450 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
451 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
||
452 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
||
453 | * bus mode interrupt |
||
454 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
||
455 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
||
456 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
||
457 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
||
458 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
459 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
460 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
||
461 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
462 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
463 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
||
464 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
||
465 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
||
466 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
||
467 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
||
468 | * @retval None |
||
469 | */ |
||
470 | #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
471 | |||
472 | /** |
||
473 | * @brief Disable the SD device interrupt. |
||
474 | * @param __HANDLE__: SD Handle |
||
475 | * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled. |
||
476 | * This parameter can be one or a combination of the following values: |
||
477 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
478 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
479 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
480 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
481 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
482 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
483 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
484 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
485 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
||
486 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
||
487 | * bus mode interrupt |
||
488 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
||
489 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
||
490 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
||
491 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
||
492 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
493 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
494 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
||
495 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
496 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
497 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
||
498 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
||
499 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
||
500 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
||
501 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
||
502 | * @retval None |
||
503 | */ |
||
504 | #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
505 | |||
506 | /** |
||
507 | * @brief Check whether the specified SD flag is set or not. |
||
508 | * @param __HANDLE__: SD Handle |
||
509 | * @param __FLAG__: specifies the flag to check. |
||
510 | * This parameter can be one of the following values: |
||
511 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
||
512 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
||
513 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
||
514 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
||
515 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
||
516 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
||
517 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
||
518 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
||
519 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
||
520 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode. |
||
521 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
||
522 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
||
523 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
||
524 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
||
525 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
||
526 | * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
||
527 | * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
||
528 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
||
529 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
||
530 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
||
531 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
||
532 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
||
533 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
||
534 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 |
||
535 | * @retval The new state of SD FLAG (SET or RESET). |
||
536 | */ |
||
537 | #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
||
538 | |||
539 | /** |
||
540 | * @brief Clear the SD's pending flags. |
||
541 | * @param __HANDLE__: SD Handle |
||
542 | * @param __FLAG__: specifies the flag to clear. |
||
543 | * This parameter can be one or a combination of the following values: |
||
544 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
||
545 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
||
546 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
||
547 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
||
548 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
||
549 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
||
550 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
||
551 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
||
552 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
||
553 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode |
||
554 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
||
555 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
||
556 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 |
||
557 | * @retval None |
||
558 | */ |
||
559 | #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
||
560 | |||
561 | /** |
||
562 | * @brief Check whether the specified SD interrupt has occurred or not. |
||
563 | * @param __HANDLE__: SD Handle |
||
564 | * @param __INTERRUPT__: specifies the SDIO interrupt source to check. |
||
565 | * This parameter can be one of the following values: |
||
566 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
567 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
568 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
569 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
570 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
571 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
572 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
573 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
574 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
||
575 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
||
576 | * bus mode interrupt |
||
577 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
||
578 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
||
579 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
||
580 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
||
581 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
582 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
583 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
||
584 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
585 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
586 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
||
587 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
||
588 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
||
589 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
||
590 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
||
591 | * @retval The new state of SD IT (SET or RESET). |
||
592 | */ |
||
593 | #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__) |
||
594 | |||
595 | /** |
||
596 | * @brief Clear the SD's interrupt pending bits. |
||
597 | * @param __HANDLE__ : SD Handle |
||
598 | * @param __INTERRUPT__: specifies the interrupt pending bit to clear. |
||
599 | * This parameter can be one or a combination of the following values: |
||
600 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
601 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
602 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
603 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
604 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
605 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
606 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
607 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
608 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt |
||
609 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
||
610 | * bus mode interrupt |
||
611 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
||
612 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 |
||
613 | * @retval None |
||
614 | */ |
||
615 | #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
616 | /** |
||
617 | * @} |
||
618 | */ |
||
619 | |||
620 | /* Exported functions --------------------------------------------------------*/ |
||
621 | /** @addtogroup SD_Exported_Functions |
||
622 | * @{ |
||
623 | */ |
||
624 | |||
625 | /* Initialization and de-initialization functions **********************************/ |
||
626 | /** @addtogroup SD_Exported_Functions_Group1 |
||
627 | * @{ |
||
628 | */ |
||
629 | HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo); |
||
630 | HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd); |
||
631 | void HAL_SD_MspInit(SD_HandleTypeDef *hsd); |
||
632 | void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd); |
||
633 | /** |
||
634 | * @} |
||
635 | */ |
||
636 | |||
637 | /* I/O operation functions *****************************************************/ |
||
638 | /** @addtogroup SD_Exported_Functions_Group2 |
||
639 | * @{ |
||
640 | */ |
||
641 | /* Blocking mode: Polling */ |
||
642 | HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); |
||
643 | HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); |
||
644 | HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t Startaddr, uint64_t Endaddr); |
||
645 | |||
646 | /* Non-Blocking mode: Interrupt */ |
||
647 | void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd); |
||
648 | |||
649 | /* Callback in non blocking modes (DMA) */ |
||
650 | void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma); |
||
651 | void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma); |
||
652 | void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma); |
||
653 | void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma); |
||
654 | void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd); |
||
655 | void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd); |
||
656 | |||
657 | /* Non-Blocking mode: DMA */ |
||
658 | HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); |
||
659 | HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); |
||
660 | HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout); |
||
661 | HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout); |
||
662 | /** |
||
663 | * @} |
||
664 | */ |
||
665 | |||
666 | /* Peripheral Control functions ************************************************/ |
||
667 | /** @addtogroup SD_Exported_Functions_Group3 |
||
668 | * @{ |
||
669 | */ |
||
670 | HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo); |
||
671 | HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode); |
||
672 | HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd); |
||
673 | HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd); |
||
674 | /** |
||
675 | * @} |
||
676 | */ |
||
677 | |||
678 | /* Peripheral State functions **************************************************/ |
||
679 | /** @addtogroup SD_Exported_Functions_Group4 |
||
680 | * @{ |
||
681 | */ |
||
682 | HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus); |
||
683 | HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus); |
||
684 | HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd); |
||
685 | /** |
||
686 | * @} |
||
687 | */ |
||
688 | |||
689 | /** |
||
690 | * @} |
||
691 | */ |
||
692 | |||
693 | /** |
||
694 | * @} |
||
695 | */ |
||
696 | |||
697 | /** |
||
698 | * @} |
||
699 | */ |
||
700 | |||
701 | #ifdef __cplusplus |
||
702 | } |
||
703 | #endif |
||
704 | |||
705 | #endif /* STM32F103xE || STM32F103xG */ |
||
706 | |||
707 | #endif /* __STM32F1xx_HAL_SD_H */ |
||
708 | |||
709 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |