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2 mjames 1
/**
2
  ******************************************************************************
3
  * @file    stm32f1xx_hal_pcd.h
4
  * @author  MCD Application Team
5
  * @brief   Header file of PCD HAL module.
6
  ******************************************************************************
7
  * @attention
8
  *
9
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10
  * All rights reserved.</center></h2>
11
  *
12
  * This software component is licensed by ST under BSD 3-Clause license,
13
  * the "License"; You may not use this file except in compliance with the
14
  * License. You may obtain a copy of the License at:
15
  *                        opensource.org/licenses/BSD-3-Clause
16
  *
17
  ******************************************************************************
18
  */
19
 
20
/* Define to prevent recursive inclusion -------------------------------------*/
21
#ifndef STM32F1xx_HAL_PCD_H
22
#define STM32F1xx_HAL_PCD_H
23
 
24
#ifdef __cplusplus
25
extern "C" {
26
#endif
27
 
28
/* Includes ------------------------------------------------------------------*/
29
#include "stm32f1xx_ll_usb.h"
30
 
31
#if defined (USB) || defined (USB_OTG_FS)
32
 
33
/** @addtogroup STM32F1xx_HAL_Driver
34
  * @{
35
  */
36
 
37
/** @addtogroup PCD
38
  * @{
39
  */
40
 
41
/* Exported types ------------------------------------------------------------*/
42
/** @defgroup PCD_Exported_Types PCD Exported Types
43
  * @{
44
  */
45
 
46
/**
47
  * @brief  PCD State structure definition
48
  */
49
typedef enum
50
{
51
  HAL_PCD_STATE_RESET   = 0x00,
52
  HAL_PCD_STATE_READY   = 0x01,
53
  HAL_PCD_STATE_ERROR   = 0x02,
54
  HAL_PCD_STATE_BUSY    = 0x03,
55
  HAL_PCD_STATE_TIMEOUT = 0x04
56
} PCD_StateTypeDef;
57
 
58
/* Device LPM suspend state */
59
typedef enum
60
{
61
  LPM_L0 = 0x00, /* on */
62
  LPM_L1 = 0x01, /* LPM L1 sleep */
63
  LPM_L2 = 0x02, /* suspend */
64
  LPM_L3 = 0x03, /* off */
65
} PCD_LPM_StateTypeDef;
66
 
67
typedef enum
68
{
69
  PCD_LPM_L0_ACTIVE = 0x00, /* on */
70
  PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
71
} PCD_LPM_MsgTypeDef;
72
 
73
typedef enum
74
{
75
  PCD_BCD_ERROR                     = 0xFF,
76
  PCD_BCD_CONTACT_DETECTION         = 0xFE,
77
  PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
78
  PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
79
  PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
80
  PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
81
 
82
} PCD_BCD_MsgTypeDef;
83
 
84
#if defined (USB)
85
 
86
#endif /* defined (USB) */
87
#if defined (USB_OTG_FS)
88
typedef USB_OTG_GlobalTypeDef  PCD_TypeDef;
89
typedef USB_OTG_CfgTypeDef     PCD_InitTypeDef;
90
typedef USB_OTG_EPTypeDef      PCD_EPTypeDef;
91
#endif /* defined (USB_OTG_FS) */
92
#if defined (USB)
93
typedef USB_TypeDef        PCD_TypeDef;
94
typedef USB_CfgTypeDef     PCD_InitTypeDef;
95
typedef USB_EPTypeDef      PCD_EPTypeDef;
96
#endif /* defined (USB) */
97
 
98
/**
99
  * @brief  PCD Handle Structure definition
100
  */
101
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
102
typedef struct __PCD_HandleTypeDef
103
#else
104
typedef struct
105
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
106
{
107
  PCD_TypeDef             *Instance;   /*!< Register base address             */
108
  PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
109
  __IO uint8_t            USB_Address; /*!< USB Address                       */
110
#if defined (USB_OTG_FS)
111
  PCD_EPTypeDef           IN_ep[16];   /*!< IN endpoint parameters            */
112
  PCD_EPTypeDef           OUT_ep[16];  /*!< OUT endpoint parameters           */
113
#endif /* defined (USB_OTG_FS) */
114
#if defined (USB)
115
  PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
116
  PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
117
#endif /* defined (USB) */
118
  HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
119
  __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
120
  __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
121
  uint32_t                Setup[12];   /*!< Setup packet buffer               */
122
  PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
123
  uint32_t                BESL;
124
 
125
  void                    *pData;      /*!< Pointer to upper stack Handler */
126
 
127
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
128
  void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
129
  void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
130
  void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
131
  void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
132
  void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
133
  void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
134
  void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
135
 
136
  void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
137
  void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
138
  void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
139
  void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
140
 
141
  void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
142
  void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
143
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
144
} PCD_HandleTypeDef;
145
 
146
/**
147
  * @}
148
  */
149
 
150
/* Include PCD HAL Extended module */
151
#include "stm32f1xx_hal_pcd_ex.h"
152
 
153
/* Exported constants --------------------------------------------------------*/
154
/** @defgroup PCD_Exported_Constants PCD Exported Constants
155
  * @{
156
  */
157
 
158
/** @defgroup PCD_Speed PCD Speed
159
  * @{
160
  */
161
#define PCD_SPEED_FULL               USBD_FS_SPEED
162
/**
163
  * @}
164
  */
165
 
166
/** @defgroup PCD_PHY_Module PCD PHY Module
167
  * @{
168
  */
169
#define PCD_PHY_ULPI                 1U
170
#define PCD_PHY_EMBEDDED             2U
171
#define PCD_PHY_UTMI                 3U
172
/**
173
  * @}
174
  */
175
 
176
/** @defgroup PCD_Error_Code_definition PCD Error Code definition
177
  * @brief  PCD Error Code definition
178
  * @{
179
  */
180
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
181
#define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
182
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
183
 
184
/**
185
  * @}
186
  */
187
 
188
/**
189
  * @}
190
  */
191
 
192
/* Exported macros -----------------------------------------------------------*/
193
/** @defgroup PCD_Exported_Macros PCD Exported Macros
194
  *  @brief macros to handle interrupts and specific clock configurations
195
  * @{
196
  */
197
#if defined (USB_OTG_FS)
198
#define __HAL_PCD_ENABLE(__HANDLE__)                       (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
199
#define __HAL_PCD_DISABLE(__HANDLE__)                      (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
200
 
201
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
202
  ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
203
 
204
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->GINTSTS) &=  (__INTERRUPT__))
205
#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)         (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
206
 
207
#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \
208
  *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
209
 
210
#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \
211
  *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
212
 
213
#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \
214
  ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
215
 
216
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
217
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
218
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG()     EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
219
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG()   EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
220
 
221
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
222
  do { \
223
    EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
224
    EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
225
  } while(0U)
226
#endif /* defined (USB_OTG_FS) */
227
 
228
#if defined (USB)
229
#define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
230
#define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
231
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance)\
232
                                                                        & (__INTERRUPT__)) == (__INTERRUPT__))
233
 
234
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR)\
235
                                                                       &= (uint16_t)(~(__INTERRUPT__)))
236
 
237
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
238
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
239
#define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)
240
#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE
241
 
242
#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
243
  do { \
244
    EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
245
    EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
246
  } while(0U)
247
 
248
#endif /* defined (USB) */
249
 
250
/**
251
  * @}
252
  */
253
 
254
/* Exported functions --------------------------------------------------------*/
255
/** @addtogroup PCD_Exported_Functions PCD Exported Functions
256
  * @{
257
  */
258
 
259
/* Initialization/de-initialization functions  ********************************/
260
/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
261
  * @{
262
  */
263
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
264
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
265
void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
266
void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
267
 
268
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
269
/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
270
  * @brief  HAL USB OTG PCD Callback ID enumeration definition
271
  * @{
272
  */
273
typedef enum
274
{
275
  HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
276
  HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
277
  HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
278
  HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
279
  HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
280
  HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
281
  HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
282
 
283
  HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
284
  HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
285
 
286
} HAL_PCD_CallbackIDTypeDef;
287
/**
288
  * @}
289
  */
290
 
291
/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
292
  * @brief  HAL USB OTG PCD Callback pointer definition
293
  * @{
294
  */
295
 
296
typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
297
typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
298
typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
299
typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
300
typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
301
 
302
/**
303
  * @}
304
  */
305
 
306
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
307
                                           HAL_PCD_CallbackIDTypeDef CallbackID,
308
                                           pPCD_CallbackTypeDef pCallback);
309
 
310
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
311
                                             HAL_PCD_CallbackIDTypeDef CallbackID);
312
 
313
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
314
                                                       pPCD_DataOutStageCallbackTypeDef pCallback);
315
 
316
HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
317
 
318
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
319
                                                      pPCD_DataInStageCallbackTypeDef pCallback);
320
 
321
HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
322
 
323
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
324
                                                       pPCD_IsoOutIncpltCallbackTypeDef pCallback);
325
 
326
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
327
 
328
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
329
                                                      pPCD_IsoInIncpltCallbackTypeDef pCallback);
330
 
331
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
332
 
333
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
334
/**
335
  * @}
336
  */
337
 
338
/* I/O operation functions  ***************************************************/
339
/* Non-Blocking mode: Interrupt */
340
/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
341
  * @{
342
  */
343
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
344
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
345
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
346
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
347
 
348
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
349
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
350
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
351
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
352
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
353
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
354
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
355
 
356
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
357
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
358
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
359
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
360
/**
361
  * @}
362
  */
363
 
364
/* Peripheral Control functions  **********************************************/
365
/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
366
  * @{
367
  */
368
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
369
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
370
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
371
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
372
                                  uint16_t ep_mps, uint8_t ep_type);
373
 
374
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
375
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
376
                                     uint8_t *pBuf, uint32_t len);
377
 
378
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
379
                                      uint8_t *pBuf, uint32_t len);
380
 
381
 
382
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
383
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
384
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
385
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
386
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
387
 
388
uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
389
/**
390
  * @}
391
  */
392
 
393
/* Peripheral State functions  ************************************************/
394
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
395
  * @{
396
  */
397
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
398
/**
399
  * @}
400
  */
401
 
402
/**
403
  * @}
404
  */
405
 
406
/* Private constants ---------------------------------------------------------*/
407
/** @defgroup PCD_Private_Constants PCD Private Constants
408
  * @{
409
  */
410
/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
411
  * @{
412
  */
413
#if defined (USB_OTG_FS)
414
#define USB_OTG_FS_WAKEUP_EXTI_LINE                                   (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
415
#endif /* defined (USB_OTG_FS) */
416
 
417
#if defined (USB)
418
#define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
419
#endif /* defined (USB) */
420
 
421
/**
422
  * @}
423
  */
424
#if defined (USB)
425
/** @defgroup PCD_EP0_MPS PCD EP0 MPS
426
  * @{
427
  */
428
#define PCD_EP0MPS_64                                                 EP_MPS_64
429
#define PCD_EP0MPS_32                                                 EP_MPS_32
430
#define PCD_EP0MPS_16                                                 EP_MPS_16
431
#define PCD_EP0MPS_08                                                 EP_MPS_8
432
/**
433
  * @}
434
  */
435
 
436
/** @defgroup PCD_ENDP PCD ENDP
437
  * @{
438
  */
439
#define PCD_ENDP0                                                     0U
440
#define PCD_ENDP1                                                     1U
441
#define PCD_ENDP2                                                     2U
442
#define PCD_ENDP3                                                     3U
443
#define PCD_ENDP4                                                     4U
444
#define PCD_ENDP5                                                     5U
445
#define PCD_ENDP6                                                     6U
446
#define PCD_ENDP7                                                     7U
447
/**
448
  * @}
449
  */
450
 
451
/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
452
  * @{
453
  */
454
#define PCD_SNG_BUF                                                   0U
455
#define PCD_DBL_BUF                                                   1U
456
/**
457
  * @}
458
  */
459
#endif /* defined (USB) */
460
/**
461
  * @}
462
  */
463
 
464
#if defined (USB_OTG_FS)
465
#ifndef USB_OTG_DOEPINT_OTEPSPR
466
#define USB_OTG_DOEPINT_OTEPSPR                (0x1UL << 5)      /*!< Status Phase Received interrupt */
467
#endif /* defined USB_OTG_DOEPINT_OTEPSPR */
468
 
469
#ifndef USB_OTG_DOEPMSK_OTEPSPRM
470
#define USB_OTG_DOEPMSK_OTEPSPRM               (0x1UL << 5)      /*!< Setup Packet Received interrupt mask */
471
#endif /* defined USB_OTG_DOEPMSK_OTEPSPRM */
472
 
473
#ifndef USB_OTG_DOEPINT_NAK
474
#define USB_OTG_DOEPINT_NAK                    (0x1UL << 13)      /*!< NAK interrupt */
475
#endif /* defined USB_OTG_DOEPINT_NAK */
476
 
477
#ifndef USB_OTG_DOEPMSK_NAKM
478
#define USB_OTG_DOEPMSK_NAKM                   (0x1UL << 13)      /*!< OUT Packet NAK interrupt mask */
479
#endif /* defined USB_OTG_DOEPMSK_NAKM */
480
 
481
#ifndef USB_OTG_DOEPINT_STPKTRX
482
#define USB_OTG_DOEPINT_STPKTRX                (0x1UL << 15)      /*!< Setup Packet Received interrupt */
483
#endif /* defined USB_OTG_DOEPINT_STPKTRX */
484
 
485
#ifndef USB_OTG_DOEPMSK_NYETM
486
#define USB_OTG_DOEPMSK_NYETM                  (0x1UL << 14)      /*!< Setup Packet Received interrupt mask */
487
#endif /* defined USB_OTG_DOEPMSK_NYETM */
488
#endif /* defined (USB_OTG_FS) */
489
 
490
/* Private macros ------------------------------------------------------------*/
491
/** @defgroup PCD_Private_Macros PCD Private Macros
492
  * @{
493
  */
494
#if defined (USB)
495
/********************  Bit definition for USB_COUNTn_RX register  *************/
496
#define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
497
#define USB_CNTRX_BLSIZE                      (0x1U << 15)
498
 
499
/* SetENDPOINT */
500
#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)\
501
                                                    (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
502
 
503
/* GetENDPOINT */
504
#define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
505
 
506
/* ENDPOINT transfer */
507
#define USB_EP0StartXfer                           USB_EPStartXfer
508
 
509
/**
510
  * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
511
  * @param  USBx USB peripheral instance register address.
512
  * @param  bEpNum Endpoint Number.
513
  * @param  wType Endpoint Type.
514
  * @retval None
515
  */
516
#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\
517
                                                              & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
518
 
519
 
520
/**
521
  * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
522
  * @param  USBx USB peripheral instance register address.
523
  * @param  bEpNum Endpoint Number.
524
  * @retval Endpoint Type
525
  */
526
#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
527
 
528
/**
529
  * @brief free buffer used from the application realizing it to the line
530
  *         toggles bit SW_BUF in the double buffered endpoint register
531
  * @param USBx USB device.
532
  * @param   bEpNum, bDir
533
  * @retval None
534
  */
535
#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
536
  do { \
537
    if ((bDir) == 0U) \
538
    { \
539
      /* OUT double buffered endpoint */ \
540
      PCD_TX_DTOG((USBx), (bEpNum)); \
541
    } \
542
    else if ((bDir) == 1U) \
543
    { \
544
      /* IN double buffered endpoint */ \
545
      PCD_RX_DTOG((USBx), (bEpNum)); \
546
    } \
547
  } while(0)
548
 
549
/**
550
  * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
551
  * @param  USBx USB peripheral instance register address.
552
  * @param  bEpNum Endpoint Number.
553
  * @param  wState new state
554
  * @retval None
555
  */
556
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
557
  do { \
558
    uint16_t _wRegVal; \
559
    \
560
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
561
    /* toggle first bit ? */ \
562
    if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
563
    { \
564
      _wRegVal ^= USB_EPTX_DTOG1; \
565
    } \
566
    /* toggle second bit ?  */ \
567
    if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
568
    { \
569
      _wRegVal ^= USB_EPTX_DTOG2; \
570
    } \
571
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
572
  } while(0) /* PCD_SET_EP_TX_STATUS */
573
 
574
/**
575
  * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
576
  * @param  USBx USB peripheral instance register address.
577
  * @param  bEpNum Endpoint Number.
578
  * @param  wState new state
579
  * @retval None
580
  */
581
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
582
  do { \
583
    uint16_t _wRegVal; \
584
    \
585
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
586
    /* toggle first bit ? */ \
587
    if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
588
    { \
589
      _wRegVal ^= USB_EPRX_DTOG1; \
590
    } \
591
    /* toggle second bit ? */ \
592
    if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
593
    { \
594
      _wRegVal ^= USB_EPRX_DTOG2; \
595
    } \
596
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
597
  } while(0) /* PCD_SET_EP_RX_STATUS */
598
 
599
/**
600
  * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
601
  * @param  USBx USB peripheral instance register address.
602
  * @param  bEpNum Endpoint Number.
603
  * @param  wStaterx new state.
604
  * @param  wStatetx new state.
605
  * @retval None
606
  */
607
#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
608
  do { \
609
    uint16_t _wRegVal; \
610
    \
611
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
612
    /* toggle first bit ? */ \
613
    if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
614
    { \
615
      _wRegVal ^= USB_EPRX_DTOG1; \
616
    } \
617
    /* toggle second bit ? */ \
618
    if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
619
    { \
620
      _wRegVal ^= USB_EPRX_DTOG2; \
621
    } \
622
    /* toggle first bit ? */ \
623
    if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
624
    { \
625
      _wRegVal ^= USB_EPTX_DTOG1; \
626
    } \
627
    /* toggle second bit ?  */ \
628
    if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
629
    { \
630
      _wRegVal ^= USB_EPTX_DTOG2; \
631
    } \
632
    \
633
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
634
  } while(0) /* PCD_SET_EP_TXRX_STATUS */
635
 
636
/**
637
  * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
638
  *         /STAT_RX[1:0])
639
  * @param  USBx USB peripheral instance register address.
640
  * @param  bEpNum Endpoint Number.
641
  * @retval status
642
  */
643
#define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
644
#define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
645
 
646
/**
647
  * @brief  sets directly the VALID tx/rx-status into the endpoint register
648
  * @param  USBx USB peripheral instance register address.
649
  * @param  bEpNum Endpoint Number.
650
  * @retval None
651
  */
652
#define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
653
#define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
654
 
655
/**
656
  * @brief  checks stall condition in an endpoint.
657
  * @param  USBx USB peripheral instance register address.
658
  * @param  bEpNum Endpoint Number.
659
  * @retval TRUE = endpoint in stall condition.
660
  */
661
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
662
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
663
 
664
/**
665
  * @brief  set & clear EP_KIND bit.
666
  * @param  USBx USB peripheral instance register address.
667
  * @param  bEpNum Endpoint Number.
668
  * @retval None
669
  */
670
#define PCD_SET_EP_KIND(USBx, bEpNum) \
671
  do { \
672
    uint16_t _wRegVal; \
673
    \
674
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
675
    \
676
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
677
  } while(0) /* PCD_SET_EP_KIND */
678
 
679
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
680
  do { \
681
    uint16_t _wRegVal; \
682
    \
683
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
684
    \
685
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
686
  } while(0) /* PCD_CLEAR_EP_KIND */
687
 
688
/**
689
  * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
690
  * @param  USBx USB peripheral instance register address.
691
  * @param  bEpNum Endpoint Number.
692
  * @retval None
693
  */
694
#define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
695
#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
696
 
697
/**
698
  * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
699
  * @param  USBx USB peripheral instance register address.
700
  * @param  bEpNum Endpoint Number.
701
  * @retval None
702
  */
703
#define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
704
#define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
705
 
706
/**
707
  * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
708
  * @param  USBx USB peripheral instance register address.
709
  * @param  bEpNum Endpoint Number.
710
  * @retval None
711
  */
712
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
713
  do { \
714
    uint16_t _wRegVal; \
715
    \
716
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
717
    \
718
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
719
  } while(0) /* PCD_CLEAR_RX_EP_CTR */
720
 
721
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
722
  do { \
723
    uint16_t _wRegVal; \
724
    \
725
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
726
    \
727
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
728
  } while(0) /* PCD_CLEAR_TX_EP_CTR */
729
 
730
/**
731
  * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
732
  * @param  USBx USB peripheral instance register address.
733
  * @param  bEpNum Endpoint Number.
734
  * @retval None
735
  */
736
#define PCD_RX_DTOG(USBx, bEpNum) \
737
  do { \
738
    uint16_t _wEPVal; \
739
    \
740
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
741
    \
742
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
743
  } while(0) /* PCD_RX_DTOG */
744
 
745
#define PCD_TX_DTOG(USBx, bEpNum) \
746
  do { \
747
    uint16_t _wEPVal; \
748
    \
749
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
750
    \
751
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
752
  } while(0) /* PCD_TX_DTOG */
753
/**
754
  * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
755
  * @param  USBx USB peripheral instance register address.
756
  * @param  bEpNum Endpoint Number.
757
  * @retval None
758
  */
759
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
760
  do { \
761
    uint16_t _wRegVal; \
762
    \
763
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
764
    \
765
    if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
766
    { \
767
      PCD_RX_DTOG((USBx), (bEpNum)); \
768
    } \
769
  } while(0) /* PCD_CLEAR_RX_DTOG */
770
 
771
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
772
  do { \
773
    uint16_t _wRegVal; \
774
    \
775
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
776
    \
777
    if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
778
    { \
779
      PCD_TX_DTOG((USBx), (bEpNum)); \
780
    } \
781
  } while(0) /* PCD_CLEAR_TX_DTOG */
782
 
783
/**
784
  * @brief  Sets address in an endpoint register.
785
  * @param  USBx USB peripheral instance register address.
786
  * @param  bEpNum Endpoint Number.
787
  * @param  bAddr Address.
788
  * @retval None
789
  */
790
#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
791
  do { \
792
    uint16_t _wRegVal; \
793
    \
794
    _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
795
    \
796
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
797
  } while(0) /* PCD_SET_EP_ADDRESS */
798
 
799
/**
800
  * @brief  Gets address in an endpoint register.
801
  * @param  USBx USB peripheral instance register address.
802
  * @param  bEpNum Endpoint Number.
803
  * @retval None
804
  */
805
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
806
 
807
#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
808
                                                    + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
809
 
810
#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
811
                                                    + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
812
 
813
 
814
/**
815
  * @brief  sets address of the tx/rx buffer.
816
  * @param  USBx USB peripheral instance register address.
817
  * @param  bEpNum Endpoint Number.
818
  * @param  wAddr address to be set (must be word aligned).
819
  * @retval None
820
  */
821
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
822
  do { \
823
    __IO uint16_t *_wRegVal; \
824
    uint32_t _wRegBase = (uint32_t)USBx; \
825
    \
826
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
827
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
828
    *_wRegVal = ((wAddr) >> 1) << 1; \
829
  } while(0) /* PCD_SET_EP_TX_ADDRESS */
830
 
831
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
832
  do { \
833
    __IO uint16_t *_wRegVal; \
834
    uint32_t _wRegBase = (uint32_t)USBx; \
835
    \
836
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
837
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
838
    *_wRegVal = ((wAddr) >> 1) << 1; \
839
  } while(0) /* PCD_SET_EP_RX_ADDRESS */
840
 
841
/**
842
  * @brief  Gets address of the tx/rx buffer.
843
  * @param  USBx USB peripheral instance register address.
844
  * @param  bEpNum Endpoint Number.
845
  * @retval address of the buffer.
846
  */
847
#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
848
#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
849
 
850
/**
851
  * @brief  Sets counter of rx buffer with no. of blocks.
852
  * @param  pdwReg Register pointer
853
  * @param  wCount Counter.
854
  * @param  wNBlocks no. of Blocks.
855
  * @retval None
856
  */
857
#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
858
  do { \
859
    (wNBlocks) = (wCount) >> 5; \
860
    if (((wCount) & 0x1fU) == 0U) \
861
    { \
862
      (wNBlocks)--; \
863
    } \
864
    *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
865
  } while(0) /* PCD_CALC_BLK32 */
866
 
867
#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
868
  do { \
869
    (wNBlocks) = (wCount) >> 1; \
870
    if (((wCount) & 0x1U) != 0U) \
871
    { \
872
      (wNBlocks)++; \
873
    } \
874
    *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
875
  } while(0) /* PCD_CALC_BLK2 */
876
 
877
#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
878
  do { \
879
    uint32_t wNBlocks; \
880
    if ((wCount) == 0U) \
881
    { \
882
      *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
883
      *(pdwReg) |= USB_CNTRX_BLSIZE; \
884
    } \
885
    else if((wCount) <= 62U) \
886
    { \
887
      PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
888
    } \
889
    else \
890
    { \
891
      PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
892
    } \
893
  } while(0) /* PCD_SET_EP_CNT_RX_REG */
894
 
895
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
896
  do { \
897
    uint32_t _wRegBase = (uint32_t)(USBx); \
898
    __IO uint16_t *pdwReg; \
899
    \
900
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
901
    pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
902
    PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
903
  } while(0)
904
 
905
/**
906
  * @brief  sets counter for the tx/rx buffer.
907
  * @param  USBx USB peripheral instance register address.
908
  * @param  bEpNum Endpoint Number.
909
  * @param  wCount Counter value.
910
  * @retval None
911
  */
912
#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
913
  do { \
914
    uint32_t _wRegBase = (uint32_t)(USBx); \
915
    __IO uint16_t *_wRegVal; \
916
    \
917
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
918
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
919
    *_wRegVal = (uint16_t)(wCount); \
920
  } while(0)
921
 
922
#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
923
  do { \
924
    uint32_t _wRegBase = (uint32_t)(USBx); \
925
    __IO uint16_t *_wRegVal; \
926
    \
927
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
928
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
929
    PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
930
  } while(0)
931
 
932
/**
933
  * @brief  gets counter of the tx buffer.
934
  * @param  USBx USB peripheral instance register address.
935
  * @param  bEpNum Endpoint Number.
936
  * @retval Counter value
937
  */
938
#define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
939
#define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
940
 
941
/**
942
  * @brief  Sets buffer 0/1 address in a double buffer endpoint.
943
  * @param  USBx USB peripheral instance register address.
944
  * @param  bEpNum Endpoint Number.
945
  * @param  wBuf0Addr buffer 0 address.
946
  * @retval Counter value
947
  */
948
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
949
  do { \
950
    PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
951
  } while(0) /* PCD_SET_EP_DBUF0_ADDR */
952
 
953
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
954
  do { \
955
    PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
956
  } while(0) /* PCD_SET_EP_DBUF1_ADDR */
957
 
958
/**
959
  * @brief  Sets addresses in a double buffer endpoint.
960
  * @param  USBx USB peripheral instance register address.
961
  * @param  bEpNum Endpoint Number.
962
  * @param  wBuf0Addr: buffer 0 address.
963
  * @param  wBuf1Addr = buffer 1 address.
964
  * @retval None
965
  */
966
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
967
  do { \
968
    PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
969
    PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
970
  } while(0) /* PCD_SET_EP_DBUF_ADDR */
971
 
972
/**
973
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
974
  * @param  USBx USB peripheral instance register address.
975
  * @param  bEpNum Endpoint Number.
976
  * @retval None
977
  */
978
#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
979
#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
980
 
981
/**
982
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
983
  * @param  USBx USB peripheral instance register address.
984
  * @param  bEpNum Endpoint Number.
985
  * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
986
  *         EP_DBUF_IN  = IN
987
  * @param  wCount: Counter value
988
  * @retval None
989
  */
990
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
991
  do { \
992
    if ((bDir) == 0U) \
993
      /* OUT endpoint */ \
994
    { \
995
      PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
996
    } \
997
    else \
998
    { \
999
      if ((bDir) == 1U) \
1000
      { \
1001
        /* IN endpoint */ \
1002
        PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
1003
      } \
1004
    } \
1005
  } while(0) /* SetEPDblBuf0Count*/
1006
 
1007
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
1008
  do { \
1009
    uint32_t _wBase = (uint32_t)(USBx); \
1010
    __IO uint16_t *_wEPRegVal; \
1011
    \
1012
    if ((bDir) == 0U) \
1013
    { \
1014
      /* OUT endpoint */ \
1015
      PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
1016
    } \
1017
    else \
1018
    { \
1019
      if ((bDir) == 1U) \
1020
      { \
1021
        /* IN endpoint */ \
1022
        _wBase += (uint32_t)(USBx)->BTABLE; \
1023
        _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
1024
        *_wEPRegVal = (uint16_t)(wCount); \
1025
      } \
1026
    } \
1027
  } while(0) /* SetEPDblBuf1Count */
1028
 
1029
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
1030
  do { \
1031
    PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
1032
    PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
1033
  } while(0) /* PCD_SET_EP_DBUF_CNT */
1034
 
1035
/**
1036
  * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
1037
  * @param  USBx USB peripheral instance register address.
1038
  * @param  bEpNum Endpoint Number.
1039
  * @retval None
1040
  */
1041
#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
1042
#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
1043
 
1044
#endif /* defined (USB) */
1045
 
1046
/**
1047
  * @}
1048
  */
1049
 
1050
/**
1051
  * @}
1052
  */
1053
 
1054
/**
1055
  * @}
1056
  */
1057
#endif /* defined (USB) || defined (USB_OTG_FS) */
1058
 
1059
#ifdef __cplusplus
1060
}
1061
#endif
1062
 
1063
#endif /* STM32F1xx_HAL_PCD_H */
1064
 
1065
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/