WebSVN – LedShow – Blame – /trunk/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h

Rev	Author	Line No.	Line
2	mjames	1	/**
		2	******************************************************************************
		3	* @file stm32f1xx_hal_pcd.h
		4	* @author MCD Application Team
		5	* @brief Header file of PCD HAL module.
		6	******************************************************************************
		7	* @attention
		8	*
		9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
		10	*
		11	* Redistribution and use in source and binary forms, with or without modification,
		12	* are permitted provided that the following conditions are met:
		13	* 1. Redistributions of source code must retain the above copyright notice,
		14	* this list of conditions and the following disclaimer.
		15	* 2. Redistributions in binary form must reproduce the above copyright notice,
		16	* this list of conditions and the following disclaimer in the documentation
		17	* and/or other materials provided with the distribution.
		18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
		19	* may be used to endorse or promote products derived from this software
		20	* without specific prior written permission.
		21	*
		22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
		24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
		25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
		26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
		27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
		28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
		29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
		30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
		31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
		32	*
		33	******************************************************************************
		34	*/
		35
		36	/* Define to prevent recursive inclusion -------------------------------------*/
		37	#ifndef __STM32F1xx_HAL_PCD_H
		38	#define __STM32F1xx_HAL_PCD_H
		39
		40	#ifdef __cplusplus
		41	extern "C" {
		42	#endif
		43
		44	#if defined(STM32F102x6) \|\| defined(STM32F102xB) \|\| \
		45	defined(STM32F103x6) \|\| defined(STM32F103xB) \|\| \
		46	defined(STM32F103xE) \|\| defined(STM32F103xG) \|\| \
		47	defined(STM32F105xC) \|\| defined(STM32F107xC)
		48
		49	/* Includes ------------------------------------------------------------------*/
		50	#include "stm32f1xx_ll_usb.h"
		51
		52	/** @addtogroup STM32F1xx_HAL_Driver
		53	* @{
		54	*/
		55
		56	/** @addtogroup PCD
		57	* @{
		58	*/
		59
		60	/* Exported types ------------------------------------------------------------*/
		61	/** @defgroup PCD_Exported_Types PCD Exported Types
		62	* @{
		63	*/
		64
		65	/**
		66	* @brief PCD State structure definition
		67	*/
		68	typedef enum
		69	{
		70	HAL_PCD_STATE_RESET = 0x00U,
		71	HAL_PCD_STATE_READY = 0x01U,
		72	HAL_PCD_STATE_ERROR = 0x02U,
		73	HAL_PCD_STATE_BUSY = 0x03U,
		74	HAL_PCD_STATE_TIMEOUT = 0x04U
		75	} PCD_StateTypeDef;
		76
		77	#if defined (USB)
		78	/**
		79	* @brief PCD double buffered endpoint direction
		80	*/
		81	typedef enum
		82	{
		83	PCD_EP_DBUF_OUT,
		84	PCD_EP_DBUF_IN,
		85	PCD_EP_DBUF_ERR,
		86	}PCD_EP_DBUF_DIR;
		87
		88	/**
		89	* @brief PCD endpoint buffer number
		90	*/
		91	typedef enum
		92	{
		93	PCD_EP_NOBUF,
		94	PCD_EP_BUF0,
		95	PCD_EP_BUF1
		96	}PCD_EP_BUF_NUM;
		97	#endif /* USB */
		98
		99	#if defined (USB_OTG_FS)
		100	typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
		101	typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
		102	typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
		103	#endif /* USB_OTG_FS */
		104
		105	#if defined (USB)
		106	typedef USB_TypeDef PCD_TypeDef;
		107	typedef USB_CfgTypeDef PCD_InitTypeDef;
		108	typedef USB_EPTypeDef PCD_EPTypeDef;
		109	#endif /* USB */
		110
		111	/**
		112	* @brief PCD Handle Structure definition
		113	*/
		114	typedef struct
		115	{
		116	PCD_TypeDef Instance; /!< Register base address */
		117	PCD_InitTypeDef Init; /!< PCD required parameters /
		118	__IO uint8_t USB_Address; /!< USB Address: not used by USB OTG FS /
		119	PCD_EPTypeDef IN_ep[16]; /!< IN endpoint parameters /
		120	PCD_EPTypeDef OUT_ep[16]; /!< OUT endpoint parameters /
		121	HAL_LockTypeDef Lock; /!< PCD peripheral status /
		122	__IO PCD_StateTypeDef State; /!< PCD communication state /
		123	uint32_t Setup[12U]; /!< Setup packet buffer /
		124	void pData; /!< Pointer to upper stack Handler */
		125	} PCD_HandleTypeDef;
		126
		127	/**
		128	* @}
		129	*/
		130
		131	/* Include PCD HAL Extension module */
		132	#include "stm32f1xx_hal_pcd_ex.h"
		133
		134	/* Exported constants --------------------------------------------------------*/
		135	/** @defgroup PCD_Exported_Constants PCD Exported Constants
		136	* @{
		137	*/
		138
		139	/** @defgroup PCD_Speed PCD Speed
		140	* @{
		141	*/
		142	#define PCD_SPEED_HIGH 0U /* Not Supported */
		143	#define PCD_SPEED_HIGH_IN_FULL 1U /* Not Supported */
		144	#define PCD_SPEED_FULL 2U
		145	/**
		146	* @}
		147	*/
		148
		149	/** @defgroup PCD_PHY_Module PCD PHY Module
		150	* @{
		151	*/
		152	#define PCD_PHY_EMBEDDED 2U
		153	/**
		154	* @}
		155	*/
		156
		157	/** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
		158	* @{
		159	*/
		160	#ifndef USBD_FS_TRDT_VALUE
		161	#define USBD_FS_TRDT_VALUE 5U
		162	#endif /* USBD_FS_TRDT_VALUE */
		163	/**
		164	* @}
		165	*/
		166
		167	/**
		168	* @}
		169	*/
		170
		171	/* Exported macros -----------------------------------------------------------*/
		172	/** @defgroup PCD_Exported_Macros PCD Exported Macros
		173	* @brief macros to handle interrupts and specific clock configurations
		174	* @{
		175	*/
		176	#if defined (USB_OTG_FS)
		177
		178	#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
		179	#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
		180
		181	#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
		182	#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
		183	#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
		184
		185	#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) (__IO uint32_t )((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
		186	~(USB_OTG_PCGCCTL_STOPCLK)
		187
		188	#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) (__IO uint32_t )((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) \|= USB_OTG_PCGCCTL_STOPCLK
		189
		190	#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) (((__IO uint32_t )((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
		191
		192	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR \|= USB_OTG_FS_WAKEUP_EXTI_LINE
		193	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
		194	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
		195	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
		196
		197	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
		198	do{ \
		199	EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
		200	EXTI->RTSR \|= USB_OTG_FS_WAKEUP_EXTI_LINE; \
		201	} while(0U)
		202
		203	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \
		204	do{ \
		205	EXTI->FTSR \|= (USB_OTG_FS_WAKEUP_EXTI_LINE); \
		206	EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
		207	} while(0U)
		208
		209	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \
		210	do{ \
		211	EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
		212	EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
		213	EXTI->RTSR \|= USB_OTG_FS_WAKEUP_EXTI_LINE; \
		214	EXTI->FTSR \|= USB_OTG_FS_WAKEUP_EXTI_LINE; \
		215	} while(0U)
		216
		217	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER \|= USB_OTG_FS_WAKEUP_EXTI_LINE)
		218	#endif /* USB_OTG_FS */
		219
		220	#if defined (USB)
		221	#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
		222	#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
		223	#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
		224	#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
		225
		226	#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR \|= USB_WAKEUP_EXTI_LINE
		227	#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
		228	#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
		229	#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
		230
		231	#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
		232	do{ \
		233	EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
		234	EXTI->RTSR \|= USB_WAKEUP_EXTI_LINE; \
		235	} while(0U)
		236
		237	#define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \
		238	do{ \
		239	EXTI->FTSR \|= (USB_WAKEUP_EXTI_LINE); \
		240	EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
		241	} while(0U)
		242
		243	#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \
		244	do{ \
		245	EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
		246	EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
		247	EXTI->RTSR \|= USB_WAKEUP_EXTI_LINE; \
		248	EXTI->FTSR \|= USB_WAKEUP_EXTI_LINE; \
		249	} while(0U)
		250	#endif /* USB */
		251
		252	/**
		253	* @}
		254	*/
		255
		256	/* Exported functions --------------------------------------------------------*/
		257	/** @addtogroup PCD_Exported_Functions PCD Exported Functions
		258	* @{
		259	*/
		260
		261	/* Initialization/de-initialization functions ********************************/
		262	/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
		263	* @{
		264	*/
		265	HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
		266	HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
		267	void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
		268	void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
		269	/**
		270	* @}
		271	*/
		272
		273	/* I/O operation functions ***************************************************/
		274	/* Non-Blocking mode: Interrupt */
		275	/** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
		276	* @{
		277	*/
		278	HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
		279	HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
		280	void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
		281
		282	void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		283	void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		284	void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
		285	void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
		286	void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
		287	void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
		288	void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
		289	void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		290	void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		291	void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
		292	void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
		293	/**
		294	* @}
		295	*/
		296
		297	/* Peripheral Control functions **********************************************/
		298	/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
		299	* @{
		300	*/
		301	HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
		302	HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
		303	HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
		304	HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
		305	HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		306	HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef hpcd, uint8_t ep_addr, uint8_t pBuf, uint32_t len);
		307	HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef hpcd, uint8_t ep_addr, uint8_t pBuf, uint32_t len);
		308	uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		309	HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		310	HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		311	HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		312	HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
		313	HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
		314	/**
		315	* @}
		316	*/
		317
		318	/* Peripheral State functions ************************************************/
		319	/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
		320	* @{
		321	*/
		322	PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
		323	/**
		324	* @}
		325	*/
		326
		327	/**
		328	* @}
		329	*/
		330
		331	/* Private constants ---------------------------------------------------------*/
		332	/** @defgroup PCD_Private_Constants PCD Private Constants
		333	* @{
		334	*/
		335	/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
		336	* @{
		337	*/
		338	#if defined (USB_OTG_FS)
		339	#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U
		340	#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
		341	#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
		342
		343	#define USB_OTG_FS_WAKEUP_EXTI_LINE 0x00040000U /!< External interrupt line 18 Connected to the USB EXTI Line /
		344	#endif /* USB_OTG_FS */
		345
		346	#if defined (USB)
		347	#define USB_WAKEUP_EXTI_LINE 0x00040000U /!< External interrupt line 18 Connected to the USB EXTI Line /
		348	#endif /* USB */
		349	/**
		350	* @}
		351	*/
		352
		353	#if defined (USB)
		354	/** @defgroup PCD_EP0_MPS PCD EP0 MPS
		355	* @{
		356	*/
		357	#define PCD_EP0MPS_64 DEP0CTL_MPS_64
		358	#define PCD_EP0MPS_32 DEP0CTL_MPS_32
		359	#define PCD_EP0MPS_16 DEP0CTL_MPS_16
		360	#define PCD_EP0MPS_08 DEP0CTL_MPS_8
		361	/**
		362	* @}
		363	*/
		364
		365	/** @defgroup PCD_ENDP PCD ENDP
		366	* @{
		367	*/
		368	#define PCD_ENDP0 ((uint8_t)0)
		369	#define PCD_ENDP1 ((uint8_t)1)
		370	#define PCD_ENDP2 ((uint8_t)2)
		371	#define PCD_ENDP3 ((uint8_t)3)
		372	#define PCD_ENDP4 ((uint8_t)4)
		373	#define PCD_ENDP5 ((uint8_t)5)
		374	#define PCD_ENDP6 ((uint8_t)6)
		375	#define PCD_ENDP7 ((uint8_t)7)
		376	/**
		377	* @}
		378	*/
		379
		380	/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
		381	* @{
		382	*/
		383	#define PCD_SNG_BUF 0U
		384	#define PCD_DBL_BUF 1U
		385	/**
		386	* @}
		387	*/
		388	#endif /* USB */
		389	/**
		390	* @}
		391	*/
		392
		393	/* Private macros ------------------------------------------------------------*/
		394	/** @addtogroup PCD_Private_Macros PCD Private Macros
		395	* @{
		396	*/
		397	#if defined (USB)
		398	/* SetENDPOINT */
		399	#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) ((&(USBx)->EP0R + (bEpNum) 2U)= (uint16_t)(wRegValue))
		400
		401	/* GetENDPOINT */
		402	#define PCD_GET_ENDPOINT(USBx, bEpNum) ((&(USBx)->EP0R + (bEpNum) 2U))
		403
		404	/* ENDPOINT transfer */
		405	#define USB_EP0StartXfer USB_EPStartXfer
		406
		407	/**
		408	* @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
		409	* @param USBx: USB peripheral instance register address.
		410	* @param bEpNum: Endpoint Number.
		411	* @param wType: Endpoint Type.
		412	* @retval None
		413	*/
		414	#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
		415	((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) \| (wType) )))
		416
		417	/**
		418	* @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
		419	* @param USBx: USB peripheral instance register address.
		420	* @param bEpNum: Endpoint Number.
		421	* @retval Endpoint Type
		422	*/
		423	#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
		424
		425	/**
		426	* @brief free buffer used from the application realizing it to the line
		427	toggles bit SW_BUF in the double buffered endpoint register
		428	* @param USBx: USB peripheral instance register address.
		429	* @param bEpNum: Endpoint Number.
		430	* @param bDir: Direction
		431	* @retval None
		432	*/
		433	#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
		434	{\
		435	if ((bDir) == PCD_EP_DBUF_OUT)\
		436	{ /* OUT double buffered endpoint */\
		437	PCD_TX_DTOG((USBx), (bEpNum));\
		438	}\
		439	else if ((bDir) == PCD_EP_DBUF_IN)\
		440	{ /* IN double buffered endpoint */\
		441	PCD_RX_DTOG((USBx), (bEpNum));\
		442	}\
		443	}
		444
		445	/**
		446	* @brief gets direction of the double buffered endpoint
		447	* @param USBx: USB peripheral instance register address.
		448	* @param bEpNum: Endpoint Number.
		449	* @retval EP_DBUF_OUT, EP_DBUF_IN,
		450	* EP_DBUF_ERR if the endpoint counter not yet programmed.
		451	*/
		452	#define PCD_GET_DB_DIR(USBx, bEpNum)\
		453	{\
		454	if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
		455	return(PCD_EP_DBUF_OUT);\
		456	else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
		457	return(PCD_EP_DBUF_IN);\
		458	else\
		459	return(PCD_EP_DBUF_ERR);\
		460	}
		461
		462	/**
		463	* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
		464	* @param USBx: USB peripheral instance register address.
		465	* @param bEpNum: Endpoint Number.
		466	* @param wState: new state
		467	* @retval None
		468	*/
		469	#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
		470	\
		471	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
		472	/* toggle first bit ? */ \
		473	if((USB_EPTX_DTOG1 & (wState))!= 0U)\
		474	{ \
		475	_wRegVal ^= USB_EPTX_DTOG1; \
		476	} \
		477	/* toggle second bit ? */ \
		478	if((USB_EPTX_DTOG2 & (wState))!= 0U) \
		479	{ \
		480	_wRegVal ^= USB_EPTX_DTOG2; \
		481	} \
		482	PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX));\
		483	} /* PCD_SET_EP_TX_STATUS */
		484
		485	/**
		486	* @brief sets the status for rx transfer (bits STAT_TX[1:0])
		487	* @param USBx: USB peripheral instance register address.
		488	* @param bEpNum: Endpoint Number.
		489	* @param wState: new state
		490	* @retval None
		491	*/
		492	#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
		493	register uint16_t _wRegVal; \
		494	\
		495	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
		496	/* toggle first bit ? */ \
		497	if((USB_EPRX_DTOG1 & (wState))!= 0U) \
		498	{ \
		499	_wRegVal ^= USB_EPRX_DTOG1; \
		500	} \
		501	/* toggle second bit ? */ \
		502	if((USB_EPRX_DTOG2 & (wState))!= 0U) \
		503	{ \
		504	_wRegVal ^= USB_EPRX_DTOG2; \
		505	} \
		506	PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX)); \
		507	} /* PCD_SET_EP_RX_STATUS */
		508
		509	/**
		510	* @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
		511	* @param USBx: USB peripheral instance register address.
		512	* @param bEpNum: Endpoint Number.
		513	* @param wStaterx: new state.
		514	* @param wStatetx: new state.
		515	* @retval None
		516	*/
		517	#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
		518	register uint32_t _wRegVal; \
		519	\
		520	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK \|USB_EPTX_STAT) ;\
		521	/* toggle first bit ? */ \
		522	if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
		523	{ \
		524	_wRegVal ^= USB_EPRX_DTOG1; \
		525	} \
		526	/* toggle second bit ? */ \
		527	if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
		528	{ \
		529	_wRegVal ^= USB_EPRX_DTOG2; \
		530	} \
		531	/* toggle first bit ? */ \
		532	if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
		533	{ \
		534	_wRegVal ^= USB_EPTX_DTOG1; \
		535	} \
		536	/* toggle second bit ? */ \
		537	if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
		538	{ \
		539	_wRegVal ^= USB_EPTX_DTOG2; \
		540	} \
		541	PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX); \
		542	} /* PCD_SET_EP_TXRX_STATUS */
		543
		544	/**
		545	* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
		546	* /STAT_RX[1:0])
		547	* @param USBx: USB peripheral instance register address.
		548	* @param bEpNum: Endpoint Number.
		549	* @retval status
		550	*/
		551	#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
		552	#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
		553
		554	/**
		555	* @brief sets directly the VALID tx/rx-status into the endpoint register
		556	* @param USBx: USB peripheral instance register address.
		557	* @param bEpNum: Endpoint Number.
		558	* @retval None
		559	*/
		560	#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
		561	#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
		562
		563	/**
		564	* @brief checks stall condition in an endpoint.
		565	* @param USBx: USB peripheral instance register address.
		566	* @param bEpNum: Endpoint Number.
		567	* @retval TRUE = endpoint in stall condition.
		568	*/
		569	#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
		570	== USB_EP_TX_STALL)
		571	#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
		572	== USB_EP_RX_STALL)
		573
		574	/**
		575	* @brief set & clear EP_KIND bit.
		576	* @param USBx: USB peripheral instance register address.
		577	* @param bEpNum: Endpoint Number.
		578	* @retval None
		579	*/
		580	#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		581	(USB_EP_CTR_RX\|USB_EP_CTR_TX\|((PCD_GET_ENDPOINT((USBx), (bEpNum)) \| USB_EP_KIND) & USB_EPREG_MASK))))
		582	#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		583	(USB_EP_CTR_RX\|USB_EP_CTR_TX\|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
		584
		585	/**
		586	* @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
		587	* @param USBx: USB peripheral instance register address.
		588	* @param bEpNum: Endpoint Number.
		589	* @retval None
		590	*/
		591	#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
		592	#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
		593
		594	/**
		595	* @brief Sets/clears directly EP_KIND bit in the endpoint register.
		596	* @param USBx: USB peripheral instance register address.
		597	* @param bEpNum: Endpoint Number.
		598	* @retval None
		599	*/
		600	#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
		601	#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
		602
		603	/**
		604	* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
		605	* @param USBx: USB peripheral instance register address.
		606	* @param bEpNum: Endpoint Number.
		607	* @retval None
		608	*/
		609	#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
		610	PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
		611	#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
		612	PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
		613
		614	/**
		615	* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
		616	* @param USBx: USB peripheral instance register address.
		617	* @param bEpNum: Endpoint Number.
		618	* @retval None
		619	*/
		620	#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		621	USB_EP_CTR_RX\|USB_EP_CTR_TX\|USB_EP_DTOG_RX \| (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
		622	#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		623	USB_EP_CTR_RX\|USB_EP_CTR_TX\|USB_EP_DTOG_TX \| (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
		624
		625	/**
		626	* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
		627	* @param USBx: USB peripheral instance register address.
		628	* @param bEpNum: Endpoint Number.
		629	* @retval None
		630	*/
		631	#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0U)\
		632	{ \
		633	PCD_RX_DTOG((USBx), (bEpNum)); \
		634	}
		635	#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0U)\
		636	{ \
		637	PCD_TX_DTOG((USBx), (bEpNum)); \
		638	}
		639
		640	/**
		641	* @brief Sets address in an endpoint register.
		642	* @param USBx: USB peripheral instance register address.
		643	* @param bEpNum: Endpoint Number.
		644	* @param bAddr: Address.
		645	* @retval None
		646	*/
		647	#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
		648	USB_EP_CTR_RX\|USB_EP_CTR_TX\|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) \| (bAddr))
		649
		650	#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
		651
		652	#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8U)*2U+ ((uint32_t)(USBx) + 0x400U)))
		653	#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8U+2U)*2U+ ((uint32_t)(USBx) + 0x400U)))
		654	#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8U+4U)*2U+ ((uint32_t)(USBx) + 0x400U)))
		655	#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8U+6U)*2U+ ((uint32_t)(USBx) + 0x400U)))
		656
		657	#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
		658	uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
		659	PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
		660	}
		661
		662	/**
		663	* @brief sets address of the tx/rx buffer.
		664	* @param USBx: USB peripheral instance register address.
		665	* @param bEpNum: Endpoint Number.
		666	* @param wAddr: address to be set (must be word aligned).
		667	* @retval None
		668	*/
		669	#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
		670	#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
		671
		672	/**
		673	* @brief Gets address of the tx/rx buffer.
		674	* @param USBx: USB peripheral instance register address.
		675	* @param bEpNum: Endpoint Number.
		676	* @retval address of the buffer.
		677	*/
		678	#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
		679	#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
		680
		681	/**
		682	* @brief Sets counter of rx buffer with no. of blocks.
		683	* @param dwReg: Register
		684	* @param wCount: Counter.
		685	* @param wNBlocks: no. of Blocks.
		686	* @retval None
		687	*/
		688	#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
		689	(wNBlocks) = (wCount) >> 5U;\
		690	if(((wCount) & 0x1FU) == 0U)\
		691	{ \
		692	(wNBlocks)--;\
		693	} \
		694	*pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) \| 0x8000U); \
		695	}/* PCD_CALC_BLK32 */
		696
		697	#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
		698	(wNBlocks) = (wCount) >> 1U;\
		699	if(((wCount) & 0x01U) != 0U)\
		700	{ \
		701	(wNBlocks)++;\
		702	} \
		703	*pdwReg = (uint16_t)((wNBlocks) << 10U);\
		704	}/* PCD_CALC_BLK2 */
		705
		706	#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
		707	uint16_t wNBlocks;\
		708	if((wCount) > 62U) \
		709	{ \
		710	PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
		711	} \
		712	else \
		713	{ \
		714	PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
		715	} \
		716	}/* PCD_SET_EP_CNT_RX_REG */
		717
		718	#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
		719	uint32_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
		720	PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
		721	}
		722
		723	/**
		724	* @brief sets counter for the tx/rx buffer.
		725	* @param USBx: USB peripheral instance register address.
		726	* @param bEpNum: Endpoint Number.
		727	* @param wCount: Counter value.
		728	* @retval None
		729	*/
		730	#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
		731
		732
		733	/**
		734	* @brief gets counter of the tx buffer.
		735	* @param USBx: USB peripheral instance register address.
		736	* @param bEpNum: Endpoint Number.
		737	* @retval Counter value
		738	*/
		739	#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3FFU)
		740	#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3FFU)
		741
		742	/**
		743	* @brief Sets buffer 0/1 address in a double buffer endpoint.
		744	* @param USBx: USB peripheral instance register address.
		745	* @param bEpNum: Endpoint Number.
		746	* @param wBuf0Addr: buffer 0 address.
		747	* @retval Counter value
		748	*/
		749	#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
		750	#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
		751
		752	/**
		753	* @brief Sets addresses in a double buffer endpoint.
		754	* @param USBx: USB peripheral instance register address.
		755	* @param bEpNum: Endpoint Number.
		756	* @param wBuf0Addr: buffer 0 address.
		757	* @param wBuf1Addr = buffer 1 address.
		758	* @retval None
		759	*/
		760	#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
		761	PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
		762	PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
		763	} /* PCD_SET_EP_DBUF_ADDR */
		764
		765	/**
		766	* @brief Gets buffer 0/1 address of a double buffer endpoint.
		767	* @param USBx: USB peripheral instance register address.
		768	* @param bEpNum: Endpoint Number.
		769	* @retval None
		770	*/
		771	#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
		772	#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
		773
		774	/**
		775	* @brief Gets buffer 0/1 address of a double buffer endpoint.
		776	* @param USBx: USB peripheral instance register address.
		777	* @param bEpNum: Endpoint Number.
		778	* @param bDir: endpoint dir EP_DBUF_OUT = OUT
		779	* EP_DBUF_IN = IN
		780	* @param wCount: Counter value
		781	* @retval None
		782	*/
		783	#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
		784	if((bDir) == PCD_EP_DBUF_OUT)\
		785	/* OUT endpoint */ \
		786	{PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
		787	else if((bDir) == PCD_EP_DBUF_IN)\
		788	/* IN endpoint */ \
		789	*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
		790	} /* SetEPDblBuf0Count*/
		791
		792	#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
		793	if((bDir) == PCD_EP_DBUF_OUT)\
		794	{/* OUT endpoint */ \
		795	PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
		796	} \
		797	else if((bDir) == PCD_EP_DBUF_IN)\
		798	{/* IN endpoint */ \
		799	*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
		800	} \
		801	} /* SetEPDblBuf1Count */
		802
		803	#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
		804	PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
		805	PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
		806	} /* PCD_SET_EP_DBUF_CNT */
		807
		808	/**
		809	* @brief Gets buffer 0/1 rx/tx counter for double buffering.
		810	* @param USBx: USB peripheral instance register address.
		811	* @param bEpNum: Endpoint Number.
		812	* @retval None
		813	*/
		814	#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
		815	#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
		816
		817	#endif /* USB */
		818
		819	/** @defgroup PCD_Instance_definition PCD Instance definition
		820	* @{
		821	*/
		822	#define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
		823	/**
		824	* @}
		825	*/
		826
		827	/**
		828	* @}
		829	*/
		830
		831	/**
		832	* @}
		833	*/
		834
		835	/**
		836	* @}
		837	*/
		838
		839	#endif /* STM32F102x6 \|\| STM32F102xB \|\| */
		840	/* STM32F103x6 \|\| STM32F103xB \|\| */
		841	/* STM32F103xE \|\| STM32F103xG \|\| */
		842	/* STM32F105xC \|\| STM32F107xC */
		843
		844	#ifdef __cplusplus
		845	}
		846	#endif
		847
		848
		849	#endif /* __STM32F1xx_HAL_PCD_H */
		850
		851	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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(root)/trunk/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h – Rev 2