WebSVN – DashDisplay – Blame – /trunk/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h

Rev	Author	Line No.	Line
2	mjames	1	/**
		2	******************************************************************************
		3	* @file stm32f1xx_hal_pcd.h
		4	* @author MCD Application Team
5	mjames	5	* @version V1.0.4
		6	* @date 29-April-2016
2	mjames	7	* @brief Header file of PCD HAL module.
		8	******************************************************************************
		9	* @attention
		10	*
5	mjames	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
2	mjames	12	*
		13	* Redistribution and use in source and binary forms, with or without modification,
		14	* are permitted provided that the following conditions are met:
		15	* 1. Redistributions of source code must retain the above copyright notice,
		16	* this list of conditions and the following disclaimer.
		17	* 2. Redistributions in binary form must reproduce the above copyright notice,
		18	* this list of conditions and the following disclaimer in the documentation
		19	* and/or other materials provided with the distribution.
		20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
		21	* may be used to endorse or promote products derived from this software
		22	* without specific prior written permission.
		23	*
		24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
		26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
		27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
		28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
		29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
		30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
		31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
		32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
		33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
		34	*
		35	******************************************************************************
		36	*/
		37
		38	/* Define to prevent recursive inclusion -------------------------------------*/
		39	#ifndef __STM32F1xx_HAL_PCD_H
		40	#define __STM32F1xx_HAL_PCD_H
		41
		42	#ifdef __cplusplus
		43	extern "C" {
		44	#endif
		45
		46	#if defined(STM32F102x6) \|\| defined(STM32F102xB) \|\| \
		47	defined(STM32F103x6) \|\| defined(STM32F103xB) \|\| \
		48	defined(STM32F103xE) \|\| defined(STM32F103xG) \|\| \
		49	defined(STM32F105xC) \|\| defined(STM32F107xC)
		50
		51	/* Includes ------------------------------------------------------------------*/
		52	#include "stm32f1xx_ll_usb.h"
		53
		54	/** @addtogroup STM32F1xx_HAL_Driver
		55	* @{
		56	*/
		57
		58	/** @addtogroup PCD
		59	* @{
		60	*/
		61
		62	/* Exported types ------------------------------------------------------------*/
		63	/** @defgroup PCD_Exported_Types PCD Exported Types
		64	* @{
		65	*/
		66
		67	/**
		68	* @brief PCD State structure definition
		69	*/
		70	typedef enum
		71	{
		72	HAL_PCD_STATE_RESET = 0x00,
		73	HAL_PCD_STATE_READY = 0x01,
		74	HAL_PCD_STATE_ERROR = 0x02,
		75	HAL_PCD_STATE_BUSY = 0x03,
		76	HAL_PCD_STATE_TIMEOUT = 0x04
		77	} PCD_StateTypeDef;
		78
		79	#if defined (USB)
		80	/**
		81	* @brief PCD double buffered endpoint direction
		82	*/
		83	typedef enum
		84	{
		85	PCD_EP_DBUF_OUT,
		86	PCD_EP_DBUF_IN,
		87	PCD_EP_DBUF_ERR,
		88	}PCD_EP_DBUF_DIR;
		89
		90	/**
		91	* @brief PCD endpoint buffer number
		92	*/
		93	typedef enum
		94	{
		95	PCD_EP_NOBUF,
		96	PCD_EP_BUF0,
		97	PCD_EP_BUF1
		98	}PCD_EP_BUF_NUM;
		99	#endif /* USB */
		100
		101	#if defined (USB_OTG_FS)
		102	typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
		103	typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
		104	typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
		105	#endif /* USB_OTG_FS */
		106
		107	#if defined (USB)
		108	typedef USB_TypeDef PCD_TypeDef;
		109	typedef USB_CfgTypeDef PCD_InitTypeDef;
		110	typedef USB_EPTypeDef PCD_EPTypeDef;
		111	#endif /* USB */
		112
		113	/**
		114	* @brief PCD Handle Structure definition
		115	*/
		116	typedef struct
		117	{
		118	PCD_TypeDef Instance; /!< Register base address */
		119	PCD_InitTypeDef Init; /!< PCD required parameters /
		120	__IO uint8_t USB_Address; /!< USB Address: not used by USB OTG FS /
		121	PCD_EPTypeDef IN_ep[15]; /!< IN endpoint parameters /
		122	PCD_EPTypeDef OUT_ep[15]; /!< OUT endpoint parameters /
		123	HAL_LockTypeDef Lock; /!< PCD peripheral status /
		124	__IO PCD_StateTypeDef State; /!< PCD communication state /
		125	uint32_t Setup[12]; /!< Setup packet buffer /
		126	void pData; /!< Pointer to upper stack Handler */
		127	} PCD_HandleTypeDef;
		128
		129	/**
		130	* @}
		131	*/
		132
		133	/* Include PCD HAL Extension module */
		134	#include "stm32f1xx_hal_pcd_ex.h"
		135
		136	/* Exported constants --------------------------------------------------------*/
		137	/** @defgroup PCD_Exported_Constants PCD Exported Constants
		138	* @{
		139	*/
		140
		141	/** @defgroup PCD_Speed PCD Speed
		142	* @{
		143	*/
		144	#define PCD_SPEED_HIGH 0 /* Not Supported */
		145	#define PCD_SPEED_HIGH_IN_FULL 1 /* Not Supported */
		146	#define PCD_SPEED_FULL 2
		147	/**
		148	* @}
		149	*/
		150
		151	/** @defgroup PCD_PHY_Module PCD PHY Module
		152	* @{
		153	*/
		154	#define PCD_PHY_EMBEDDED 2
		155	/**
		156	* @}
		157	*/
		158
		159	/** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
		160	* @{
		161	*/
		162	#ifndef USBD_FS_TRDT_VALUE
		163	#define USBD_FS_TRDT_VALUE 5
		164	#endif /* USBD_FS_TRDT_VALUE */
		165	/**
		166	* @}
		167	*/
		168
		169	/**
		170	* @}
		171	*/
		172
		173	/* Exported macros -----------------------------------------------------------*/
		174	/** @defgroup PCD_Exported_Macros PCD Exported Macros
		175	* @brief macros to handle interrupts and specific clock configurations
		176	* @{
		177	*/
		178	#if defined (USB_OTG_FS)
		179
		180	#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
		181	#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
		182
		183	#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
		184	#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
		185	#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)
		186
		187	#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) (__IO uint32_t )((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
		188	~(USB_OTG_PCGCCTL_STOPCLK)
		189
		190	#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) (__IO uint32_t )((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) \|= USB_OTG_PCGCCTL_STOPCLK
		191
		192	#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) (((__IO uint32_t )((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10)
		193
		194	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR \|= USB_OTG_FS_WAKEUP_EXTI_LINE
		195	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
		196	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
		197	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
		198
5	mjames	199	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
		200	do{ \
		201	EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
		202	EXTI->RTSR \|= USB_OTG_FS_WAKEUP_EXTI_LINE; \
		203	} while(0)
2	mjames	204
5	mjames	205	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \
		206	do{ \
		207	EXTI->FTSR \|= (USB_OTG_FS_WAKEUP_EXTI_LINE); \
		208	EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
		209	} while(0)
2	mjames	210
5	mjames	211	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \
		212	do{ \
		213	EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
		214	EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
		215	EXTI->RTSR \|= USB_OTG_FS_WAKEUP_EXTI_LINE; \
		216	EXTI->FTSR \|= USB_OTG_FS_WAKEUP_EXTI_LINE; \
		217	} while(0)
2	mjames	218
		219	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER \|= USB_OTG_FS_WAKEUP_EXTI_LINE)
		220	#endif /* USB_OTG_FS */
		221
		222	#if defined (USB)
		223	#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
		224	#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
		225	#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
		226	#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
		227
		228	#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR \|= USB_WAKEUP_EXTI_LINE
		229	#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
		230	#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
		231	#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
		232
5	mjames	233	#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
		234	do{ \
		235	EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
		236	EXTI->RTSR \|= USB_WAKEUP_EXTI_LINE; \
		237	} while(0)
2	mjames	238
5	mjames	239	#define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \
		240	do{ \
		241	EXTI->FTSR \|= (USB_WAKEUP_EXTI_LINE); \
		242	EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
		243	} while(0)
2	mjames	244
5	mjames	245	#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \
		246	do{ \
		247	EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
		248	EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
		249	EXTI->RTSR \|= USB_WAKEUP_EXTI_LINE; \
		250	EXTI->FTSR \|= USB_WAKEUP_EXTI_LINE; \
		251	} while(0)
2	mjames	252	#endif /* USB */
		253
		254	/**
		255	* @}
		256	*/
		257
		258	/* Exported functions --------------------------------------------------------*/
		259	/** @addtogroup PCD_Exported_Functions PCD Exported Functions
		260	* @{
		261	*/
		262
		263	/* Initialization/de-initialization functions ********************************/
		264	/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
		265	* @{
		266	*/
		267	HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
		268	HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
		269	void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
		270	void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
		271	/**
		272	* @}
		273	*/
		274
		275	/* I/O operation functions ***************************************************/
		276	/* Non-Blocking mode: Interrupt */
		277	/** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
		278	* @{
		279	*/
		280	HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
		281	HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
		282	void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
		283
		284	void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		285	void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		286	void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
		287	void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
		288	void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
		289	void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
		290	void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
		291	void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		292	void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		293	void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
		294	void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
		295	/**
		296	* @}
		297	*/
		298
		299	/* Peripheral Control functions **********************************************/
		300	/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
		301	* @{
		302	*/
		303	HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
		304	HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
		305	HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
		306	HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
		307	HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		308	HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef hpcd, uint8_t ep_addr, uint8_t pBuf, uint32_t len);
		309	HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef hpcd, uint8_t ep_addr, uint8_t pBuf, uint32_t len);
		310	uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		311	HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		312	HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		313	HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		314	HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
		315	HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
		316	/**
		317	* @}
		318	*/
		319
		320	/* Peripheral State functions ************************************************/
		321	/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
		322	* @{
		323	*/
		324	PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
		325	/**
		326	* @}
		327	*/
		328
		329	/**
		330	* @}
		331	*/
		332
		333	/* Private constants ---------------------------------------------------------*/
		334	/** @defgroup PCD_Private_Constants PCD Private Constants
		335	* @{
		336	*/
		337	/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
		338	* @{
		339	*/
		340	#if defined (USB_OTG_FS)
		341	#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08)
		342	#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0C)
		343	#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10)
		344
		345	#define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00040000) /!< External interrupt line 18 Connected to the USB EXTI Line /
		346	#endif /* USB_OTG_FS */
		347
		348	#if defined (USB)
		349	#define USB_WAKEUP_EXTI_LINE ((uint32_t)0x00040000) /!< External interrupt line 18 Connected to the USB EXTI Line /
		350	#endif /* USB */
		351	/**
		352	* @}
		353	*/
		354
		355	#if defined (USB)
		356	/** @defgroup PCD_EP0_MPS PCD EP0 MPS
		357	* @{
		358	*/
		359	#define PCD_EP0MPS_64 DEP0CTL_MPS_64
		360	#define PCD_EP0MPS_32 DEP0CTL_MPS_32
		361	#define PCD_EP0MPS_16 DEP0CTL_MPS_16
		362	#define PCD_EP0MPS_08 DEP0CTL_MPS_8
		363	/**
		364	* @}
		365	*/
		366
		367	/** @defgroup PCD_ENDP PCD ENDP
		368	* @{
		369	*/
		370	#define PCD_ENDP0 ((uint8_t)0)
		371	#define PCD_ENDP1 ((uint8_t)1)
		372	#define PCD_ENDP2 ((uint8_t)2)
		373	#define PCD_ENDP3 ((uint8_t)3)
		374	#define PCD_ENDP4 ((uint8_t)4)
		375	#define PCD_ENDP5 ((uint8_t)5)
		376	#define PCD_ENDP6 ((uint8_t)6)
		377	#define PCD_ENDP7 ((uint8_t)7)
		378	/**
		379	* @}
		380	*/
		381
		382	/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
		383	* @{
		384	*/
		385	#define PCD_SNG_BUF 0
		386	#define PCD_DBL_BUF 1
		387	/**
		388	* @}
		389	*/
		390	#endif /* USB */
		391	/**
		392	* @}
		393	*/
		394
		395	/* Private macros ------------------------------------------------------------*/
		396	/** @addtogroup PCD_Private_Macros PCD Private Macros
		397	* @{
		398	*/
		399	#if defined (USB)
		400	/* SetENDPOINT */
		401	#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) ((&(USBx)->EP0R + (bEpNum) 2)= (uint16_t)(wRegValue))
		402
		403	/* GetENDPOINT */
		404	#define PCD_GET_ENDPOINT(USBx, bEpNum) ((&(USBx)->EP0R + (bEpNum) 2))
		405
		406	/* ENDPOINT transfer */
		407	#define USB_EP0StartXfer USB_EPStartXfer
		408
		409	/**
		410	* @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
		411	* @param USBx: USB peripheral instance register address.
		412	* @param bEpNum: Endpoint Number.
		413	* @param wType: Endpoint Type.
		414	* @retval None
		415	*/
		416	#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
		417	((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) \| (wType) )))
		418
		419	/**
		420	* @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
		421	* @param USBx: USB peripheral instance register address.
		422	* @param bEpNum: Endpoint Number.
		423	* @retval Endpoint Type
		424	*/
		425	#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
		426
		427	/**
		428	* @brief free buffer used from the application realizing it to the line
		429	toggles bit SW_BUF in the double buffered endpoint register
		430	* @param USBx: USB peripheral instance register address.
		431	* @param bEpNum: Endpoint Number.
		432	* @param bDir: Direction
		433	* @retval None
		434	*/
		435	#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
		436	{\
		437	if ((bDir) == PCD_EP_DBUF_OUT)\
		438	{ /* OUT double buffered endpoint */\
		439	PCD_TX_DTOG((USBx), (bEpNum));\
		440	}\
		441	else if ((bDir) == PCD_EP_DBUF_IN)\
		442	{ /* IN double buffered endpoint */\
		443	PCD_RX_DTOG((USBx), (bEpNum));\
		444	}\
		445	}
		446
		447	/**
		448	* @brief gets direction of the double buffered endpoint
		449	* @param USBx: USB peripheral instance register address.
		450	* @param bEpNum: Endpoint Number.
		451	* @retval EP_DBUF_OUT, EP_DBUF_IN,
		452	* EP_DBUF_ERR if the endpoint counter not yet programmed.
		453	*/
		454	#define PCD_GET_DB_DIR(USBx, bEpNum)\
		455	{\
		456	if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
		457	return(PCD_EP_DBUF_OUT);\
		458	else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
		459	return(PCD_EP_DBUF_IN);\
		460	else\
		461	return(PCD_EP_DBUF_ERR);\
		462	}
		463
		464	/**
		465	* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
		466	* @param USBx: USB peripheral instance register address.
		467	* @param bEpNum: Endpoint Number.
		468	* @param wState: new state
		469	* @retval None
		470	*/
		471	#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
		472	\
		473	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
		474	/* toggle first bit ? */ \
		475	if((USB_EPTX_DTOG1 & (wState))!= 0)\
		476	{ \
		477	_wRegVal ^= USB_EPTX_DTOG1; \
		478	} \
		479	/* toggle second bit ? */ \
		480	if((USB_EPTX_DTOG2 & (wState))!= 0) \
		481	{ \
		482	_wRegVal ^= USB_EPTX_DTOG2; \
		483	} \
		484	PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX));\
		485	} /* PCD_SET_EP_TX_STATUS */
		486
		487	/**
		488	* @brief sets the status for rx transfer (bits STAT_TX[1:0])
		489	* @param USBx: USB peripheral instance register address.
		490	* @param bEpNum: Endpoint Number.
		491	* @param wState: new state
		492	* @retval None
		493	*/
		494	#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
		495	register uint16_t _wRegVal; \
		496	\
		497	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
		498	/* toggle first bit ? */ \
		499	if((USB_EPRX_DTOG1 & (wState))!= 0) \
		500	{ \
		501	_wRegVal ^= USB_EPRX_DTOG1; \
		502	} \
		503	/* toggle second bit ? */ \
		504	if((USB_EPRX_DTOG2 & (wState))!= 0) \
		505	{ \
		506	_wRegVal ^= USB_EPRX_DTOG2; \
		507	} \
		508	PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX)); \
		509	} /* PCD_SET_EP_RX_STATUS */
		510
		511	/**
		512	* @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
		513	* @param USBx: USB peripheral instance register address.
		514	* @param bEpNum: Endpoint Number.
		515	* @param wStaterx: new state.
		516	* @param wStatetx: new state.
		517	* @retval None
		518	*/
		519	#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
		520	register uint32_t _wRegVal; \
		521	\
		522	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK \|USB_EPTX_STAT) ;\
		523	/* toggle first bit ? */ \
		524	if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
		525	{ \
		526	_wRegVal ^= USB_EPRX_DTOG1; \
		527	} \
		528	/* toggle second bit ? */ \
		529	if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
		530	{ \
		531	_wRegVal ^= USB_EPRX_DTOG2; \
		532	} \
		533	/* toggle first bit ? */ \
		534	if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \
		535	{ \
		536	_wRegVal ^= USB_EPTX_DTOG1; \
		537	} \
		538	/* toggle second bit ? */ \
		539	if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \
		540	{ \
		541	_wRegVal ^= USB_EPTX_DTOG2; \
		542	} \
		543	PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX); \
		544	} /* PCD_SET_EP_TXRX_STATUS */
		545
		546	/**
		547	* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
		548	* /STAT_RX[1:0])
		549	* @param USBx: USB peripheral instance register address.
		550	* @param bEpNum: Endpoint Number.
		551	* @retval status
		552	*/
		553	#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
		554	#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
		555
		556	/**
		557	* @brief sets directly the VALID tx/rx-status into the endpoint register
		558	* @param USBx: USB peripheral instance register address.
		559	* @param bEpNum: Endpoint Number.
		560	* @retval None
		561	*/
		562	#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
		563	#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
		564
		565	/**
		566	* @brief checks stall condition in an endpoint.
		567	* @param USBx: USB peripheral instance register address.
		568	* @param bEpNum: Endpoint Number.
		569	* @retval TRUE = endpoint in stall condition.
		570	*/
		571	#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
		572	== USB_EP_TX_STALL)
		573	#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
		574	== USB_EP_RX_STALL)
		575
		576	/**
		577	* @brief set & clear EP_KIND bit.
		578	* @param USBx: USB peripheral instance register address.
		579	* @param bEpNum: Endpoint Number.
		580	* @retval None
		581	*/
		582	#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		583	(USB_EP_CTR_RX\|USB_EP_CTR_TX\|((PCD_GET_ENDPOINT((USBx), (bEpNum)) \| USB_EP_KIND) & USB_EPREG_MASK))))
		584	#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		585	(USB_EP_CTR_RX\|USB_EP_CTR_TX\|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
		586
		587	/**
		588	* @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
		589	* @param USBx: USB peripheral instance register address.
		590	* @param bEpNum: Endpoint Number.
		591	* @retval None
		592	*/
		593	#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
		594	#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
		595
		596	/**
		597	* @brief Sets/clears directly EP_KIND bit in the endpoint register.
		598	* @param USBx: USB peripheral instance register address.
		599	* @param bEpNum: Endpoint Number.
		600	* @retval None
		601	*/
		602	#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
		603	#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
		604
		605	/**
		606	* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
		607	* @param USBx: USB peripheral instance register address.
		608	* @param bEpNum: Endpoint Number.
		609	* @retval None
		610	*/
		611	#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
		612	PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK))
		613	#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
		614	PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK))
		615
		616	/**
		617	* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
		618	* @param USBx: USB peripheral instance register address.
		619	* @param bEpNum: Endpoint Number.
		620	* @retval None
		621	*/
		622	#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		623	USB_EP_CTR_RX\|USB_EP_CTR_TX\|USB_EP_DTOG_RX \| (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
		624	#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		625	USB_EP_CTR_RX\|USB_EP_CTR_TX\|USB_EP_DTOG_TX \| (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
		626
		627	/**
		628	* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
		629	* @param USBx: USB peripheral instance register address.
		630	* @param bEpNum: Endpoint Number.
		631	* @retval None
		632	*/
		633	#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\
		634	{ \
		635	PCD_RX_DTOG((USBx), (bEpNum)); \
		636	}
		637	#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\
		638	{ \
		639	PCD_TX_DTOG((USBx), (bEpNum)); \
		640	}
		641
		642	/**
		643	* @brief Sets address in an endpoint register.
		644	* @param USBx: USB peripheral instance register address.
		645	* @param bEpNum: Endpoint Number.
		646	* @param bAddr: Address.
		647	* @retval None
		648	*/
		649	#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
		650	USB_EP_CTR_RX\|USB_EP_CTR_TX\|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) \| (bAddr))
		651
		652	#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
		653
		654	#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8)*2+ ((uint32_t)(USBx) + 0x400)))
		655	#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8+2)*2+ ((uint32_t)(USBx) + 0x400)))
		656	#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8+4)*2+ ((uint32_t)(USBx) + 0x400)))
		657	#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8+6)*2+ ((uint32_t)(USBx) + 0x400)))
		658
		659	#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
		660	uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
		661	PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
		662	}
		663
		664	/**
		665	* @brief sets address of the tx/rx buffer.
		666	* @param USBx: USB peripheral instance register address.
		667	* @param bEpNum: Endpoint Number.
		668	* @param wAddr: address to be set (must be word aligned).
		669	* @retval None
		670	*/
		671	#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
		672	#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
		673
		674	/**
		675	* @brief Gets address of the tx/rx buffer.
		676	* @param USBx: USB peripheral instance register address.
		677	* @param bEpNum: Endpoint Number.
		678	* @retval address of the buffer.
		679	*/
		680	#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
		681	#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
		682
		683	/**
		684	* @brief Sets counter of rx buffer with no. of blocks.
		685	* @param dwReg: Register
		686	* @param wCount: Counter.
		687	* @param wNBlocks: no. of Blocks.
		688	* @retval None
		689	*/
		690	#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
		691	(wNBlocks) = (wCount) >> 5;\
		692	if(((wCount) & 0x1f) == 0)\
		693	{ \
		694	(wNBlocks)--;\
		695	} \
		696	*pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) \| 0x8000); \
		697	}/* PCD_CALC_BLK32 */
		698
		699	#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
		700	(wNBlocks) = (wCount) >> 1;\
		701	if(((wCount) & 0x1) != 0)\
		702	{ \
		703	(wNBlocks)++;\
		704	} \
		705	*pdwReg = (uint16_t)((wNBlocks) << 10);\
		706	}/* PCD_CALC_BLK2 */
		707
		708	#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
		709	uint16_t wNBlocks;\
		710	if((wCount) > 62) \
		711	{ \
		712	PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
		713	} \
		714	else \
		715	{ \
		716	PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
		717	} \
		718	}/* PCD_SET_EP_CNT_RX_REG */
		719
		720	#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
		721	uint32_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
		722	PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
		723	}
		724
		725	/**
		726	* @brief sets counter for the tx/rx buffer.
		727	* @param USBx: USB peripheral instance register address.
		728	* @param bEpNum: Endpoint Number.
		729	* @param wCount: Counter value.
		730	* @retval None
		731	*/
		732	#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
		733
		734
		735	/**
		736	* @brief gets counter of the tx buffer.
		737	* @param USBx: USB peripheral instance register address.
		738	* @param bEpNum: Endpoint Number.
		739	* @retval Counter value
		740	*/
		741	#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
		742	#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
		743
		744	/**
		745	* @brief Sets buffer 0/1 address in a double buffer endpoint.
		746	* @param USBx: USB peripheral instance register address.
		747	* @param bEpNum: Endpoint Number.
		748	* @param wBuf0Addr: buffer 0 address.
		749	* @retval Counter value
		750	*/
		751	#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
		752	#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
		753
		754	/**
		755	* @brief Sets addresses in a double buffer endpoint.
		756	* @param USBx: USB peripheral instance register address.
		757	* @param bEpNum: Endpoint Number.
		758	* @param wBuf0Addr: buffer 0 address.
		759	* @param wBuf1Addr = buffer 1 address.
		760	* @retval None
		761	*/
		762	#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
		763	PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
		764	PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
		765	} /* PCD_SET_EP_DBUF_ADDR */
		766
		767	/**
		768	* @brief Gets buffer 0/1 address of a double buffer endpoint.
		769	* @param USBx: USB peripheral instance register address.
		770	* @param bEpNum: Endpoint Number.
		771	* @retval None
		772	*/
		773	#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
		774	#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
		775
		776	/**
		777	* @brief Gets buffer 0/1 address of a double buffer endpoint.
		778	* @param USBx: USB peripheral instance register address.
		779	* @param bEpNum: Endpoint Number.
		780	* @param bDir: endpoint dir EP_DBUF_OUT = OUT
		781	* EP_DBUF_IN = IN
		782	* @param wCount: Counter value
		783	* @retval None
		784	*/
		785	#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
		786	if((bDir) == PCD_EP_DBUF_OUT)\
		787	/* OUT endpoint */ \
		788	{PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
		789	else if((bDir) == PCD_EP_DBUF_IN)\
		790	/* IN endpoint */ \
		791	*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
		792	} /* SetEPDblBuf0Count*/
		793
		794	#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
		795	if((bDir) == PCD_EP_DBUF_OUT)\
		796	{/* OUT endpoint */ \
		797	PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
		798	} \
		799	else if((bDir) == PCD_EP_DBUF_IN)\
		800	{/* IN endpoint */ \
		801	*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
		802	} \
		803	} /* SetEPDblBuf1Count */
		804
		805	#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
		806	PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
		807	PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
		808	} /* PCD_SET_EP_DBUF_CNT */
		809
		810	/**
		811	* @brief Gets buffer 0/1 rx/tx counter for double buffering.
		812	* @param USBx: USB peripheral instance register address.
		813	* @param bEpNum: Endpoint Number.
		814	* @retval None
		815	*/
		816	#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
		817	#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
		818
		819	#endif /* USB */
		820
		821	/** @defgroup PCD_Instance_definition PCD Instance definition
		822	* @{
		823	*/
		824	#define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
		825	/**
		826	* @}
		827	*/
		828
		829	/**
		830	* @}
		831	*/
		832
		833	/**
		834	* @}
		835	*/
		836
		837	/**
		838	* @}
		839	*/
		840
		841	#endif /* STM32F102x6 \|\| STM32F102xB \|\| */
		842	/* STM32F103x6 \|\| STM32F103xB \|\| */
		843	/* STM32F103xE \|\| STM32F103xG \|\| */
		844	/* STM32F105xC \|\| STM32F107xC */
		845
		846	#ifdef __cplusplus
		847	}
		848	#endif
		849
		850
		851	#endif /* __STM32F1xx_HAL_PCD_H */
		852
		853	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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(root)/trunk/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h – Rev 5