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Rev	Author	Line No.	Line
2	mjames	1	/**
		2	******************************************************************************
		3	* @file stm32f1xx_hal_pcd.h
		4	* @author MCD Application Team
		5	* @version V1.0.1
		6	* @date 31-July-2015
		7	* @brief Header file of PCD HAL module.
		8	******************************************************************************
		9	* @attention
		10	*
		11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
		12	*
		13	* Redistribution and use in source and binary forms, with or without modification,
		14	* are permitted provided that the following conditions are met:
		15	* 1. Redistributions of source code must retain the above copyright notice,
		16	* this list of conditions and the following disclaimer.
		17	* 2. Redistributions in binary form must reproduce the above copyright notice,
		18	* this list of conditions and the following disclaimer in the documentation
		19	* and/or other materials provided with the distribution.
		20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
		21	* may be used to endorse or promote products derived from this software
		22	* without specific prior written permission.
		23	*
		24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
		26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
		27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
		28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
		29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
		30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
		31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
		32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
		33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
		34	*
		35	******************************************************************************
		36	*/
		37
		38	/* Define to prevent recursive inclusion -------------------------------------*/
		39	#ifndef __STM32F1xx_HAL_PCD_H
		40	#define __STM32F1xx_HAL_PCD_H
		41
		42	#ifdef __cplusplus
		43	extern "C" {
		44	#endif
		45
		46	#if defined(STM32F102x6) \|\| defined(STM32F102xB) \|\| \
		47	defined(STM32F103x6) \|\| defined(STM32F103xB) \|\| \
		48	defined(STM32F103xE) \|\| defined(STM32F103xG) \|\| \
		49	defined(STM32F105xC) \|\| defined(STM32F107xC)
		50
		51	/* Includes ------------------------------------------------------------------*/
		52	#include "stm32f1xx_ll_usb.h"
		53
		54	/** @addtogroup STM32F1xx_HAL_Driver
		55	* @{
		56	*/
		57
		58	/** @addtogroup PCD
		59	* @{
		60	*/
		61
		62	/* Exported types ------------------------------------------------------------*/
		63	/** @defgroup PCD_Exported_Types PCD Exported Types
		64	* @{
		65	*/
		66
		67	/**
		68	* @brief PCD State structure definition
		69	*/
		70	typedef enum
		71	{
		72	HAL_PCD_STATE_RESET = 0x00,
		73	HAL_PCD_STATE_READY = 0x01,
		74	HAL_PCD_STATE_ERROR = 0x02,
		75	HAL_PCD_STATE_BUSY = 0x03,
		76	HAL_PCD_STATE_TIMEOUT = 0x04
		77	} PCD_StateTypeDef;
		78
		79	#if defined (USB)
		80	/**
		81	* @brief PCD double buffered endpoint direction
		82	*/
		83	typedef enum
		84	{
		85	PCD_EP_DBUF_OUT,
		86	PCD_EP_DBUF_IN,
		87	PCD_EP_DBUF_ERR,
		88	}PCD_EP_DBUF_DIR;
		89
		90	/**
		91	* @brief PCD endpoint buffer number
		92	*/
		93	typedef enum
		94	{
		95	PCD_EP_NOBUF,
		96	PCD_EP_BUF0,
		97	PCD_EP_BUF1
		98	}PCD_EP_BUF_NUM;
		99	#endif /* USB */
		100
		101	#if defined (USB_OTG_FS)
		102	typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
		103	typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
		104	typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
		105	#endif /* USB_OTG_FS */
		106
		107	#if defined (USB)
		108	typedef USB_TypeDef PCD_TypeDef;
		109	typedef USB_CfgTypeDef PCD_InitTypeDef;
		110	typedef USB_EPTypeDef PCD_EPTypeDef;
		111	#endif /* USB */
		112
		113	/**
		114	* @brief PCD Handle Structure definition
		115	*/
		116	typedef struct
		117	{
		118	PCD_TypeDef Instance; /!< Register base address */
		119	PCD_InitTypeDef Init; /!< PCD required parameters /
		120	__IO uint8_t USB_Address; /!< USB Address: not used by USB OTG FS /
		121	PCD_EPTypeDef IN_ep[15]; /!< IN endpoint parameters /
		122	PCD_EPTypeDef OUT_ep[15]; /!< OUT endpoint parameters /
		123	HAL_LockTypeDef Lock; /!< PCD peripheral status /
		124	__IO PCD_StateTypeDef State; /!< PCD communication state /
		125	uint32_t Setup[12]; /!< Setup packet buffer /
		126	void pData; /!< Pointer to upper stack Handler */
		127	} PCD_HandleTypeDef;
		128
		129	/**
		130	* @}
		131	*/
		132
		133	/* Include PCD HAL Extension module */
		134	#include "stm32f1xx_hal_pcd_ex.h"
		135
		136	/* Exported constants --------------------------------------------------------*/
		137	/** @defgroup PCD_Exported_Constants PCD Exported Constants
		138	* @{
		139	*/
		140
		141	/** @defgroup PCD_Speed PCD Speed
		142	* @{
		143	*/
		144	#define PCD_SPEED_HIGH 0 /* Not Supported */
		145	#define PCD_SPEED_HIGH_IN_FULL 1 /* Not Supported */
		146	#define PCD_SPEED_FULL 2
		147	/**
		148	* @}
		149	*/
		150
		151	/** @defgroup PCD_PHY_Module PCD PHY Module
		152	* @{
		153	*/
		154	#define PCD_PHY_EMBEDDED 2
		155	/**
		156	* @}
		157	*/
		158
		159	/** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
		160	* @{
		161	*/
		162	#ifndef USBD_FS_TRDT_VALUE
		163	#define USBD_FS_TRDT_VALUE 5
		164	#endif /* USBD_FS_TRDT_VALUE */
		165	/**
		166	* @}
		167	*/
		168
		169	/**
		170	* @}
		171	*/
		172
		173	/* Exported macros -----------------------------------------------------------*/
		174	/** @defgroup PCD_Exported_Macros PCD Exported Macros
		175	* @brief macros to handle interrupts and specific clock configurations
		176	* @{
		177	*/
		178	#if defined (USB_OTG_FS)
		179
		180	#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
		181	#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
		182
		183	#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
		184	#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
		185	#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)
		186
		187	#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) (__IO uint32_t )((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
		188	~(USB_OTG_PCGCCTL_STOPCLK)
		189
		190	#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) (__IO uint32_t )((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) \|= USB_OTG_PCGCCTL_STOPCLK
		191
		192	#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) (((__IO uint32_t )((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10)
		193
		194	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR \|= USB_OTG_FS_WAKEUP_EXTI_LINE
		195	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
		196	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
		197	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
		198
		199	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
		200	EXTI->RTSR \|= USB_OTG_FS_WAKEUP_EXTI_LINE
		201
		202	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR \|= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
		203	EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
		204
		205	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
		206	EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
		207	EXTI->RTSR \|= USB_OTG_FS_WAKEUP_EXTI_LINE;\
		208	EXTI->FTSR \|= USB_OTG_FS_WAKEUP_EXTI_LINE
		209
		210	#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER \|= USB_OTG_FS_WAKEUP_EXTI_LINE)
		211	#endif /* USB_OTG_FS */
		212
		213	#if defined (USB)
		214	#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
		215	#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
		216	#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
		217	#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
		218
		219	#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR \|= USB_WAKEUP_EXTI_LINE
		220	#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
		221	#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
		222	#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
		223
		224	#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
		225	EXTI->RTSR \|= USB_WAKEUP_EXTI_LINE
		226
		227	#define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR \|= (USB_WAKEUP_EXTI_LINE);\
		228	EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE)
		229
		230	#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\
		231	EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
		232	EXTI->RTSR \|= USB_WAKEUP_EXTI_LINE;\
		233	EXTI->FTSR \|= USB_WAKEUP_EXTI_LINE
		234	#endif /* USB */
		235
		236	/**
		237	* @}
		238	*/
		239
		240	/* Exported functions --------------------------------------------------------*/
		241	/** @addtogroup PCD_Exported_Functions PCD Exported Functions
		242	* @{
		243	*/
		244
		245	/* Initialization/de-initialization functions ********************************/
		246	/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
		247	* @{
		248	*/
		249	HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
		250	HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
		251	void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
		252	void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
		253	/**
		254	* @}
		255	*/
		256
		257	/* I/O operation functions ***************************************************/
		258	/* Non-Blocking mode: Interrupt */
		259	/** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
		260	* @{
		261	*/
		262	HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
		263	HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
		264	void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
		265
		266	void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		267	void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		268	void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
		269	void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
		270	void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
		271	void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
		272	void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
		273	void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		274	void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
		275	void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
		276	void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
		277	/**
		278	* @}
		279	*/
		280
		281	/* Peripheral Control functions **********************************************/
		282	/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
		283	* @{
		284	*/
		285	HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
		286	HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
		287	HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
		288	HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
		289	HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		290	HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef hpcd, uint8_t ep_addr, uint8_t pBuf, uint32_t len);
		291	HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef hpcd, uint8_t ep_addr, uint8_t pBuf, uint32_t len);
		292	uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		293	HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		294	HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		295	HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
		296	HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
		297	HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
		298	/**
		299	* @}
		300	*/
		301
		302	/* Peripheral State functions ************************************************/
		303	/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
		304	* @{
		305	*/
		306	PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
		307	/**
		308	* @}
		309	*/
		310
		311	/**
		312	* @}
		313	*/
		314
		315	/* Private constants ---------------------------------------------------------*/
		316	/** @defgroup PCD_Private_Constants PCD Private Constants
		317	* @{
		318	*/
		319	/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
		320	* @{
		321	*/
		322	#if defined (USB_OTG_FS)
		323	#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08)
		324	#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0C)
		325	#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10)
		326
		327	#define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00040000) /!< External interrupt line 18 Connected to the USB EXTI Line /
		328	#endif /* USB_OTG_FS */
		329
		330	#if defined (USB)
		331	#define USB_WAKEUP_EXTI_LINE ((uint32_t)0x00040000) /!< External interrupt line 18 Connected to the USB EXTI Line /
		332	#endif /* USB */
		333	/**
		334	* @}
		335	*/
		336
		337	#if defined (USB)
		338	/** @defgroup PCD_EP0_MPS PCD EP0 MPS
		339	* @{
		340	*/
		341	#define PCD_EP0MPS_64 DEP0CTL_MPS_64
		342	#define PCD_EP0MPS_32 DEP0CTL_MPS_32
		343	#define PCD_EP0MPS_16 DEP0CTL_MPS_16
		344	#define PCD_EP0MPS_08 DEP0CTL_MPS_8
		345	/**
		346	* @}
		347	*/
		348
		349	/** @defgroup PCD_ENDP PCD ENDP
		350	* @{
		351	*/
		352	#define PCD_ENDP0 ((uint8_t)0)
		353	#define PCD_ENDP1 ((uint8_t)1)
		354	#define PCD_ENDP2 ((uint8_t)2)
		355	#define PCD_ENDP3 ((uint8_t)3)
		356	#define PCD_ENDP4 ((uint8_t)4)
		357	#define PCD_ENDP5 ((uint8_t)5)
		358	#define PCD_ENDP6 ((uint8_t)6)
		359	#define PCD_ENDP7 ((uint8_t)7)
		360	/**
		361	* @}
		362	*/
		363
		364	/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
		365	* @{
		366	*/
		367	#define PCD_SNG_BUF 0
		368	#define PCD_DBL_BUF 1
		369	/**
		370	* @}
		371	*/
		372	#endif /* USB */
		373	/**
		374	* @}
		375	*/
		376
		377	/* Private macros ------------------------------------------------------------*/
		378	/** @addtogroup PCD_Private_Macros PCD Private Macros
		379	* @{
		380	*/
		381	#if defined (USB)
		382	/* SetENDPOINT */
		383	#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) ((&(USBx)->EP0R + (bEpNum) 2)= (uint16_t)(wRegValue))
		384
		385	/* GetENDPOINT */
		386	#define PCD_GET_ENDPOINT(USBx, bEpNum) ((&(USBx)->EP0R + (bEpNum) 2))
		387
		388	/* ENDPOINT transfer */
		389	#define USB_EP0StartXfer USB_EPStartXfer
		390
		391	/**
		392	* @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
		393	* @param USBx: USB peripheral instance register address.
		394	* @param bEpNum: Endpoint Number.
		395	* @param wType: Endpoint Type.
		396	* @retval None
		397	*/
		398	#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
		399	((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) \| (wType) )))
		400
		401	/**
		402	* @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
		403	* @param USBx: USB peripheral instance register address.
		404	* @param bEpNum: Endpoint Number.
		405	* @retval Endpoint Type
		406	*/
		407	#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
		408
		409	/**
		410	* @brief free buffer used from the application realizing it to the line
		411	toggles bit SW_BUF in the double buffered endpoint register
		412	* @param USBx: USB peripheral instance register address.
		413	* @param bEpNum: Endpoint Number.
		414	* @param bDir: Direction
		415	* @retval None
		416	*/
		417	#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
		418	{\
		419	if ((bDir) == PCD_EP_DBUF_OUT)\
		420	{ /* OUT double buffered endpoint */\
		421	PCD_TX_DTOG((USBx), (bEpNum));\
		422	}\
		423	else if ((bDir) == PCD_EP_DBUF_IN)\
		424	{ /* IN double buffered endpoint */\
		425	PCD_RX_DTOG((USBx), (bEpNum));\
		426	}\
		427	}
		428
		429	/**
		430	* @brief gets direction of the double buffered endpoint
		431	* @param USBx: USB peripheral instance register address.
		432	* @param bEpNum: Endpoint Number.
		433	* @retval EP_DBUF_OUT, EP_DBUF_IN,
		434	* EP_DBUF_ERR if the endpoint counter not yet programmed.
		435	*/
		436	#define PCD_GET_DB_DIR(USBx, bEpNum)\
		437	{\
		438	if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
		439	return(PCD_EP_DBUF_OUT);\
		440	else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
		441	return(PCD_EP_DBUF_IN);\
		442	else\
		443	return(PCD_EP_DBUF_ERR);\
		444	}
		445
		446	/**
		447	* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
		448	* @param USBx: USB peripheral instance register address.
		449	* @param bEpNum: Endpoint Number.
		450	* @param wState: new state
		451	* @retval None
		452	*/
		453	#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
		454	\
		455	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
		456	/* toggle first bit ? */ \
		457	if((USB_EPTX_DTOG1 & (wState))!= 0)\
		458	{ \
		459	_wRegVal ^= USB_EPTX_DTOG1; \
		460	} \
		461	/* toggle second bit ? */ \
		462	if((USB_EPTX_DTOG2 & (wState))!= 0) \
		463	{ \
		464	_wRegVal ^= USB_EPTX_DTOG2; \
		465	} \
		466	PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX));\
		467	} /* PCD_SET_EP_TX_STATUS */
		468
		469	/**
		470	* @brief sets the status for rx transfer (bits STAT_TX[1:0])
		471	* @param USBx: USB peripheral instance register address.
		472	* @param bEpNum: Endpoint Number.
		473	* @param wState: new state
		474	* @retval None
		475	*/
		476	#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
		477	register uint16_t _wRegVal; \
		478	\
		479	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
		480	/* toggle first bit ? */ \
		481	if((USB_EPRX_DTOG1 & (wState))!= 0) \
		482	{ \
		483	_wRegVal ^= USB_EPRX_DTOG1; \
		484	} \
		485	/* toggle second bit ? */ \
		486	if((USB_EPRX_DTOG2 & (wState))!= 0) \
		487	{ \
		488	_wRegVal ^= USB_EPRX_DTOG2; \
		489	} \
		490	PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX)); \
		491	} /* PCD_SET_EP_RX_STATUS */
		492
		493	/**
		494	* @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
		495	* @param USBx: USB peripheral instance register address.
		496	* @param bEpNum: Endpoint Number.
		497	* @param wStaterx: new state.
		498	* @param wStatetx: new state.
		499	* @retval None
		500	*/
		501	#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
		502	register uint32_t _wRegVal; \
		503	\
		504	_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK \|USB_EPTX_STAT) ;\
		505	/* toggle first bit ? */ \
		506	if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
		507	{ \
		508	_wRegVal ^= USB_EPRX_DTOG1; \
		509	} \
		510	/* toggle second bit ? */ \
		511	if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
		512	{ \
		513	_wRegVal ^= USB_EPRX_DTOG2; \
		514	} \
		515	/* toggle first bit ? */ \
		516	if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \
		517	{ \
		518	_wRegVal ^= USB_EPTX_DTOG1; \
		519	} \
		520	/* toggle second bit ? */ \
		521	if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \
		522	{ \
		523	_wRegVal ^= USB_EPTX_DTOG2; \
		524	} \
		525	PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal \| USB_EP_CTR_RX\|USB_EP_CTR_TX); \
		526	} /* PCD_SET_EP_TXRX_STATUS */
		527
		528	/**
		529	* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
		530	* /STAT_RX[1:0])
		531	* @param USBx: USB peripheral instance register address.
		532	* @param bEpNum: Endpoint Number.
		533	* @retval status
		534	*/
		535	#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
		536	#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
		537
		538	/**
		539	* @brief sets directly the VALID tx/rx-status into the endpoint register
		540	* @param USBx: USB peripheral instance register address.
		541	* @param bEpNum: Endpoint Number.
		542	* @retval None
		543	*/
		544	#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
		545	#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
		546
		547	/**
		548	* @brief checks stall condition in an endpoint.
		549	* @param USBx: USB peripheral instance register address.
		550	* @param bEpNum: Endpoint Number.
		551	* @retval TRUE = endpoint in stall condition.
		552	*/
		553	#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
		554	== USB_EP_TX_STALL)
		555	#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
		556	== USB_EP_RX_STALL)
		557
		558	/**
		559	* @brief set & clear EP_KIND bit.
		560	* @param USBx: USB peripheral instance register address.
		561	* @param bEpNum: Endpoint Number.
		562	* @retval None
		563	*/
		564	#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		565	(USB_EP_CTR_RX\|USB_EP_CTR_TX\|((PCD_GET_ENDPOINT((USBx), (bEpNum)) \| USB_EP_KIND) & USB_EPREG_MASK))))
		566	#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		567	(USB_EP_CTR_RX\|USB_EP_CTR_TX\|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
		568
		569	/**
		570	* @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
		571	* @param USBx: USB peripheral instance register address.
		572	* @param bEpNum: Endpoint Number.
		573	* @retval None
		574	*/
		575	#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
		576	#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
		577
		578	/**
		579	* @brief Sets/clears directly EP_KIND bit in the endpoint register.
		580	* @param USBx: USB peripheral instance register address.
		581	* @param bEpNum: Endpoint Number.
		582	* @retval None
		583	*/
		584	#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
		585	#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
		586
		587	/**
		588	* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
		589	* @param USBx: USB peripheral instance register address.
		590	* @param bEpNum: Endpoint Number.
		591	* @retval None
		592	*/
		593	#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
		594	PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK))
		595	#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
		596	PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK))
		597
		598	/**
		599	* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
		600	* @param USBx: USB peripheral instance register address.
		601	* @param bEpNum: Endpoint Number.
		602	* @retval None
		603	*/
		604	#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		605	USB_EP_CTR_RX\|USB_EP_CTR_TX\|USB_EP_DTOG_RX \| (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
		606	#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
		607	USB_EP_CTR_RX\|USB_EP_CTR_TX\|USB_EP_DTOG_TX \| (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
		608
		609	/**
		610	* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
		611	* @param USBx: USB peripheral instance register address.
		612	* @param bEpNum: Endpoint Number.
		613	* @retval None
		614	*/
		615	#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\
		616	{ \
		617	PCD_RX_DTOG((USBx), (bEpNum)); \
		618	}
		619	#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\
		620	{ \
		621	PCD_TX_DTOG((USBx), (bEpNum)); \
		622	}
		623
		624	/**
		625	* @brief Sets address in an endpoint register.
		626	* @param USBx: USB peripheral instance register address.
		627	* @param bEpNum: Endpoint Number.
		628	* @param bAddr: Address.
		629	* @retval None
		630	*/
		631	#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
		632	USB_EP_CTR_RX\|USB_EP_CTR_TX\|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) \| (bAddr))
		633
		634	#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
		635
		636	#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8)*2+ ((uint32_t)(USBx) + 0x400)))
		637	#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8+2)*2+ ((uint32_t)(USBx) + 0x400)))
		638	#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8+4)*2+ ((uint32_t)(USBx) + 0x400)))
		639	#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t )(((USBx)->BTABLE+(bEpNum)8+6)*2+ ((uint32_t)(USBx) + 0x400)))
		640
		641	#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
		642	uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
		643	PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
		644	}
		645
		646	/**
		647	* @brief sets address of the tx/rx buffer.
		648	* @param USBx: USB peripheral instance register address.
		649	* @param bEpNum: Endpoint Number.
		650	* @param wAddr: address to be set (must be word aligned).
		651	* @retval None
		652	*/
		653	#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
		654	#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
		655
		656	/**
		657	* @brief Gets address of the tx/rx buffer.
		658	* @param USBx: USB peripheral instance register address.
		659	* @param bEpNum: Endpoint Number.
		660	* @retval address of the buffer.
		661	*/
		662	#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
		663	#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
		664
		665	/**
		666	* @brief Sets counter of rx buffer with no. of blocks.
		667	* @param dwReg: Register
		668	* @param wCount: Counter.
		669	* @param wNBlocks: no. of Blocks.
		670	* @retval None
		671	*/
		672	#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
		673	(wNBlocks) = (wCount) >> 5;\
		674	if(((wCount) & 0x1f) == 0)\
		675	{ \
		676	(wNBlocks)--;\
		677	} \
		678	*pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) \| 0x8000); \
		679	}/* PCD_CALC_BLK32 */
		680
		681	#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
		682	(wNBlocks) = (wCount) >> 1;\
		683	if(((wCount) & 0x1) != 0)\
		684	{ \
		685	(wNBlocks)++;\
		686	} \
		687	*pdwReg = (uint16_t)((wNBlocks) << 10);\
		688	}/* PCD_CALC_BLK2 */
		689
		690	#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
		691	uint16_t wNBlocks;\
		692	if((wCount) > 62) \
		693	{ \
		694	PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
		695	} \
		696	else \
		697	{ \
		698	PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
		699	} \
		700	}/* PCD_SET_EP_CNT_RX_REG */
		701
		702	#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
		703	uint32_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
		704	PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
		705	}
		706
		707	/**
		708	* @brief sets counter for the tx/rx buffer.
		709	* @param USBx: USB peripheral instance register address.
		710	* @param bEpNum: Endpoint Number.
		711	* @param wCount: Counter value.
		712	* @retval None
		713	*/
		714	#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
		715
		716
		717	/**
		718	* @brief gets counter of the tx buffer.
		719	* @param USBx: USB peripheral instance register address.
		720	* @param bEpNum: Endpoint Number.
		721	* @retval Counter value
		722	*/
		723	#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
		724	#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
		725
		726	/**
		727	* @brief Sets buffer 0/1 address in a double buffer endpoint.
		728	* @param USBx: USB peripheral instance register address.
		729	* @param bEpNum: Endpoint Number.
		730	* @param wBuf0Addr: buffer 0 address.
		731	* @retval Counter value
		732	*/
		733	#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
		734	#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
		735
		736	/**
		737	* @brief Sets addresses in a double buffer endpoint.
		738	* @param USBx: USB peripheral instance register address.
		739	* @param bEpNum: Endpoint Number.
		740	* @param wBuf0Addr: buffer 0 address.
		741	* @param wBuf1Addr = buffer 1 address.
		742	* @retval None
		743	*/
		744	#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
		745	PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
		746	PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
		747	} /* PCD_SET_EP_DBUF_ADDR */
		748
		749	/**
		750	* @brief Gets buffer 0/1 address of a double buffer endpoint.
		751	* @param USBx: USB peripheral instance register address.
		752	* @param bEpNum: Endpoint Number.
		753	* @retval None
		754	*/
		755	#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
		756	#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
		757
		758	/**
		759	* @brief Gets buffer 0/1 address of a double buffer endpoint.
		760	* @param USBx: USB peripheral instance register address.
		761	* @param bEpNum: Endpoint Number.
		762	* @param bDir: endpoint dir EP_DBUF_OUT = OUT
		763	* EP_DBUF_IN = IN
		764	* @param wCount: Counter value
		765	* @retval None
		766	*/
		767	#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
		768	if((bDir) == PCD_EP_DBUF_OUT)\
		769	/* OUT endpoint */ \
		770	{PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
		771	else if((bDir) == PCD_EP_DBUF_IN)\
		772	/* IN endpoint */ \
		773	*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
		774	} /* SetEPDblBuf0Count*/
		775
		776	#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
		777	if((bDir) == PCD_EP_DBUF_OUT)\
		778	{/* OUT endpoint */ \
		779	PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
		780	} \
		781	else if((bDir) == PCD_EP_DBUF_IN)\
		782	{/* IN endpoint */ \
		783	*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
		784	} \
		785	} /* SetEPDblBuf1Count */
		786
		787	#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
		788	PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
		789	PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
		790	} /* PCD_SET_EP_DBUF_CNT */
		791
		792	/**
		793	* @brief Gets buffer 0/1 rx/tx counter for double buffering.
		794	* @param USBx: USB peripheral instance register address.
		795	* @param bEpNum: Endpoint Number.
		796	* @retval None
		797	*/
		798	#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
		799	#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
		800
		801	#endif /* USB */
		802
		803	/** @defgroup PCD_Instance_definition PCD Instance definition
		804	* @{
		805	*/
		806	#define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
		807	/**
		808	* @}
		809	*/
		810
		811	/**
		812	* @}
		813	*/
		814
		815	/**
		816	* @}
		817	*/
		818
		819	/**
		820	* @}
		821	*/
		822
		823	#endif /* STM32F102x6 \|\| STM32F102xB \|\| */
		824	/* STM32F103x6 \|\| STM32F103xB \|\| */
		825	/* STM32F103xE \|\| STM32F103xG \|\| */
		826	/* STM32F105xC \|\| STM32F107xC */
		827
		828	#ifdef __cplusplus
		829	}
		830	#endif
		831
		832
		833	#endif /* __STM32F1xx_HAL_PCD_H */
		834
		835	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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(root)/trunk/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h – Rev 2