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| Rev | Author | Line No. | Line |
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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_mmc.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of MMC HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | mjames | 9 | * <h2><center>© Copyright (c) 2018 STMicroelectronics. |
| 10 | * All rights reserved.</center></h2> |
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| 2 | mjames | 11 | * |
| 9 | mjames | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 2 | mjames | 16 | * |
| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | |||
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 9 | mjames | 21 | #ifndef STM32F1xx_HAL_MMC_H |
| 22 | #define STM32F1xx_HAL_MMC_H |
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| 2 | mjames | 23 | |
| 9 | mjames | 24 | #if defined(SDIO) |
| 25 | |||
| 2 | mjames | 26 | #ifdef __cplusplus |
| 27 | extern "C" { |
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| 28 | #endif |
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| 29 | |||
| 30 | /* Includes ------------------------------------------------------------------*/ |
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| 31 | #include "stm32f1xx_ll_sdmmc.h" |
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| 32 | |||
| 33 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 34 | * @{ |
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| 35 | */ |
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| 36 | |||
| 9 | mjames | 37 | /** @addtogroup MMC |
| 2 | mjames | 38 | * @{ |
| 39 | */ |
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| 40 | |||
| 41 | /* Exported types ------------------------------------------------------------*/ |
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| 42 | /** @defgroup MMC_Exported_Types MMC Exported Types |
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| 43 | * @{ |
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| 44 | */ |
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| 45 | |||
| 46 | /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure |
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| 47 | * @{ |
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| 48 | */ |
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| 49 | typedef enum |
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| 50 | { |
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| 9 | mjames | 51 | HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ |
| 52 | HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ |
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| 53 | HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ |
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| 54 | HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ |
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| 55 | HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ |
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| 56 | HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ |
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| 57 | HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */ |
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| 58 | HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ |
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| 2 | mjames | 59 | }HAL_MMC_StateTypeDef; |
| 60 | /** |
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| 61 | * @} |
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| 62 | */ |
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| 63 | |||
| 64 | /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure |
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| 65 | * @{ |
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| 66 | */ |
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| 9 | mjames | 67 | typedef uint32_t HAL_MMC_CardStateTypeDef; |
| 68 | |||
| 69 | #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready */ |
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| 70 | #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ |
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| 71 | #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ |
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| 72 | #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ |
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| 73 | #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ |
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| 74 | #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ |
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| 75 | #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ |
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| 76 | #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ |
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| 77 | #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error */ |
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| 2 | mjames | 78 | /** |
| 79 | * @} |
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| 80 | */ |
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| 81 | |||
| 82 | /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition |
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| 83 | * @{ |
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| 84 | */ |
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| 85 | #define MMC_InitTypeDef SDIO_InitTypeDef |
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| 86 | #define MMC_TypeDef SDIO_TypeDef |
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| 87 | |||
| 88 | /** |
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| 89 | * @brief MMC Card Information Structure definition |
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| 90 | */ |
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| 91 | typedef struct |
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| 92 | { |
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| 93 | uint32_t CardType; /*!< Specifies the card Type */ |
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| 94 | |||
| 95 | uint32_t Class; /*!< Specifies the class of the card class */ |
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| 96 | |||
| 97 | uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ |
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| 98 | |||
| 99 | uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ |
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| 100 | |||
| 101 | uint32_t BlockSize; /*!< Specifies one block size in bytes */ |
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| 102 | |||
| 103 | uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ |
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| 104 | |||
| 105 | uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ |
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| 106 | |||
| 107 | }HAL_MMC_CardInfoTypeDef; |
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| 108 | |||
| 109 | /** |
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| 110 | * @brief MMC handle Structure definition |
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| 111 | */ |
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| 9 | mjames | 112 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
| 113 | typedef struct __MMC_HandleTypeDef |
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| 114 | #else |
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| 2 | mjames | 115 | typedef struct |
| 9 | mjames | 116 | #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ |
| 2 | mjames | 117 | { |
| 9 | mjames | 118 | MMC_TypeDef *Instance; /*!< MMC registers base address */ |
| 2 | mjames | 119 | |
| 120 | MMC_InitTypeDef Init; /*!< MMC required parameters */ |
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| 121 | |||
| 122 | HAL_LockTypeDef Lock; /*!< MMC locking object */ |
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| 123 | |||
| 9 | mjames | 124 | uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ |
| 2 | mjames | 125 | |
| 126 | uint32_t TxXferSize; /*!< MMC Tx Transfer size */ |
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| 127 | |||
| 9 | mjames | 128 | uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ |
| 2 | mjames | 129 | |
| 130 | uint32_t RxXferSize; /*!< MMC Rx Transfer size */ |
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| 131 | |||
| 132 | __IO uint32_t Context; /*!< MMC transfer context */ |
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| 133 | |||
| 134 | __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ |
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| 135 | |||
| 136 | __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ |
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| 137 | |||
| 138 | DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */ |
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| 139 | |||
| 140 | DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */ |
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| 141 | |||
| 142 | HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ |
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| 9 | mjames | 143 | |
| 2 | mjames | 144 | uint32_t CSD[4U]; /*!< MMC card specific data table */ |
| 145 | |||
| 146 | uint32_t CID[4U]; /*!< MMC card identification number table */ |
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| 147 | |||
| 9 | mjames | 148 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
| 149 | void (* TxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
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| 150 | void (* RxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
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| 151 | void (* ErrorCallback) (struct __MMC_HandleTypeDef *hmmc); |
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| 152 | void (* AbortCpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
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| 153 | |||
| 154 | void (* MspInitCallback) (struct __MMC_HandleTypeDef *hmmc); |
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| 155 | void (* MspDeInitCallback) (struct __MMC_HandleTypeDef *hmmc); |
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| 156 | #endif |
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| 2 | mjames | 157 | }MMC_HandleTypeDef; |
| 158 | |||
| 159 | /** |
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| 160 | * @} |
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| 161 | */ |
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| 162 | |||
| 163 | /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register |
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| 164 | * @{ |
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| 165 | */ |
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| 166 | typedef struct |
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| 167 | { |
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| 168 | __IO uint8_t CSDStruct; /*!< CSD structure */ |
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| 169 | __IO uint8_t SysSpecVersion; /*!< System specification version */ |
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| 170 | __IO uint8_t Reserved1; /*!< Reserved */ |
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| 171 | __IO uint8_t TAAC; /*!< Data read access time 1 */ |
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| 172 | __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ |
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| 173 | __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ |
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| 174 | __IO uint16_t CardComdClasses; /*!< Card command classes */ |
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| 175 | __IO uint8_t RdBlockLen; /*!< Max. read data block length */ |
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| 176 | __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ |
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| 177 | __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ |
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| 178 | __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ |
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| 179 | __IO uint8_t DSRImpl; /*!< DSR implemented */ |
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| 180 | __IO uint8_t Reserved2; /*!< Reserved */ |
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| 181 | __IO uint32_t DeviceSize; /*!< Device Size */ |
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| 182 | __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ |
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| 183 | __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ |
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| 184 | __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ |
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| 185 | __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ |
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| 186 | __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ |
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| 187 | __IO uint8_t EraseGrSize; /*!< Erase group size */ |
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| 188 | __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ |
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| 189 | __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ |
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| 190 | __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ |
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| 191 | __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ |
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| 192 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
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| 193 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
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| 194 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
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| 195 | __IO uint8_t Reserved3; /*!< Reserved */ |
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| 196 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
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| 9 | mjames | 197 | __IO uint8_t FileFormatGroup; /*!< File format group */ |
| 2 | mjames | 198 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
| 199 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
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| 200 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
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| 201 | __IO uint8_t FileFormat; /*!< File format */ |
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| 202 | __IO uint8_t ECC; /*!< ECC code */ |
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| 203 | __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
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| 204 | __IO uint8_t Reserved4; /*!< Always 1 */ |
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| 205 | |||
| 206 | }HAL_MMC_CardCSDTypeDef; |
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| 207 | /** |
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| 208 | * @} |
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| 209 | */ |
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| 210 | |||
| 211 | /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register |
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| 212 | * @{ |
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| 213 | */ |
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| 214 | typedef struct |
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| 215 | { |
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| 216 | __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ |
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| 217 | __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ |
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| 218 | __IO uint32_t ProdName1; /*!< Product Name part1 */ |
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| 219 | __IO uint8_t ProdName2; /*!< Product Name part2 */ |
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| 220 | __IO uint8_t ProdRev; /*!< Product Revision */ |
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| 221 | __IO uint32_t ProdSN; /*!< Product Serial Number */ |
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| 222 | __IO uint8_t Reserved1; /*!< Reserved1 */ |
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| 223 | __IO uint16_t ManufactDate; /*!< Manufacturing Date */ |
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| 224 | __IO uint8_t CID_CRC; /*!< CID CRC */ |
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| 225 | __IO uint8_t Reserved2; /*!< Always 1 */ |
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| 226 | |||
| 227 | }HAL_MMC_CardCIDTypeDef; |
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| 228 | /** |
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| 229 | * @} |
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| 230 | */ |
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| 231 | |||
| 9 | mjames | 232 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
| 233 | /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition |
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| 2 | mjames | 234 | * @{ |
| 235 | */ |
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| 9 | mjames | 236 | typedef enum |
| 2 | mjames | 237 | { |
| 9 | mjames | 238 | HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ |
| 239 | HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ |
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| 240 | HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ |
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| 241 | HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ |
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| 2 | mjames | 242 | |
| 9 | mjames | 243 | HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ |
| 244 | HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ |
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| 245 | }HAL_MMC_CallbackIDTypeDef; |
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| 2 | mjames | 246 | /** |
| 247 | * @} |
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| 248 | */ |
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| 249 | |||
| 9 | mjames | 250 | /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition |
| 251 | * @{ |
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| 252 | */ |
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| 253 | typedef void (*pMMC_CallbackTypeDef) (MMC_HandleTypeDef *hmmc); |
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| 2 | mjames | 254 | /** |
| 255 | * @} |
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| 256 | */ |
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| 9 | mjames | 257 | #endif |
| 258 | /** |
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| 259 | * @} |
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| 260 | */ |
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| 2 | mjames | 261 | |
| 262 | /* Exported constants --------------------------------------------------------*/ |
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| 263 | /** @defgroup MMC_Exported_Constants Exported Constants |
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| 264 | * @{ |
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| 265 | */ |
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| 266 | |||
| 9 | mjames | 267 | #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ |
| 2 | mjames | 268 | |
| 269 | /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition |
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| 270 | * @{ |
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| 271 | */ |
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| 272 | #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
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| 273 | #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ |
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| 274 | #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ |
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| 275 | #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ |
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| 276 | #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ |
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| 277 | #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ |
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| 278 | #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ |
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| 279 | #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ |
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| 280 | #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the |
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| 281 | number of transferred bytes does not match the block length */ |
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| 282 | #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ |
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| 283 | #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ |
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| 284 | #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ |
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| 285 | #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock |
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| 286 | command or if there was an attempt to access a locked card */ |
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| 287 | #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ |
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| 288 | #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ |
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| 289 | #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ |
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| 290 | #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ |
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| 291 | #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ |
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| 292 | #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ |
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| 293 | #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ |
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| 294 | #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ |
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| 295 | #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ |
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| 296 | #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ |
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| 297 | #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out |
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| 298 | of erase sequence command was received */ |
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| 299 | #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ |
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| 300 | #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ |
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| 301 | #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ |
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| 302 | #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ |
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| 303 | #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ |
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| 304 | #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
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| 305 | #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
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| 306 | #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
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| 307 | #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
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| 9 | mjames | 308 | |
| 309 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
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| 310 | #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ |
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| 311 | #endif |
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| 2 | mjames | 312 | /** |
| 313 | * @} |
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| 314 | */ |
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| 315 | |||
| 9 | mjames | 316 | /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration |
| 2 | mjames | 317 | * @{ |
| 318 | */ |
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| 9 | mjames | 319 | #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ |
| 320 | #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ |
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| 321 | #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ |
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| 322 | #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ |
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| 323 | #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ |
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| 324 | #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ |
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| 325 | #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ |
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| 326 | |||
| 2 | mjames | 327 | /** |
| 328 | * @} |
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| 329 | */ |
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| 330 | |||
| 331 | /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode |
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| 332 | * @{ |
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| 333 | */ |
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| 334 | /** |
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| 335 | * @brief |
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| 336 | */ |
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| 337 | #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */ |
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| 338 | #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */ |
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| 339 | #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */ |
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| 340 | #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */ |
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| 341 | #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U |
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| 342 | /** |
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| 343 | * @} |
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| 344 | */ |
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| 345 | |||
| 346 | /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards |
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| 347 | * @{ |
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| 348 | */ |
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| 9 | mjames | 349 | #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ |
| 350 | #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ |
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| 351 | |||
| 2 | mjames | 352 | /** |
| 353 | * @} |
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| 354 | */ |
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| 355 | |||
| 356 | /** |
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| 357 | * @} |
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| 358 | */ |
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| 359 | |||
| 360 | /* Exported macro ------------------------------------------------------------*/ |
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| 361 | /** @defgroup MMC_Exported_macros MMC Exported Macros |
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| 362 | * @brief macros to handle interrupts and specific clock configurations |
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| 363 | * @{ |
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| 364 | */ |
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| 9 | mjames | 365 | /** @brief Reset MMC handle state. |
| 366 | * @param __HANDLE__ : MMC handle. |
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| 367 | * @retval None |
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| 368 | */ |
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| 369 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
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| 370 | #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ |
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| 371 | (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ |
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| 372 | (__HANDLE__)->MspInitCallback = NULL; \ |
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| 373 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
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| 374 | } while(0) |
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| 375 | #else |
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| 376 | #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) |
||
| 377 | #endif |
||
| 2 | mjames | 378 | |
| 379 | /** |
||
| 380 | * @brief Enable the MMC device. |
||
| 381 | * @retval None |
||
| 382 | */ |
||
| 383 | #define __HAL_MMC_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance) |
||
| 384 | |||
| 385 | /** |
||
| 386 | * @brief Disable the MMC device. |
||
| 387 | * @retval None |
||
| 388 | */ |
||
| 389 | #define __HAL_MMC_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance) |
||
| 390 | |||
| 391 | /** |
||
| 392 | * @brief Enable the SDMMC DMA transfer. |
||
| 393 | * @retval None |
||
| 394 | */ |
||
| 395 | #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance) |
||
| 396 | |||
| 397 | /** |
||
| 398 | * @brief Disable the SDMMC DMA transfer. |
||
| 399 | * @retval None |
||
| 400 | */ |
||
| 401 | #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDIO_DMA_DISABLE((__HANDLE__)->Instance) |
||
| 402 | |||
| 403 | /** |
||
| 404 | * @brief Enable the MMC device interrupt. |
||
| 405 | * @param __HANDLE__: MMC Handle |
||
| 406 | * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled. |
||
| 407 | * This parameter can be one or a combination of the following values: |
||
| 408 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
| 409 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
| 410 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
| 411 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
| 412 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
| 413 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
| 414 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
| 415 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
| 9 | mjames | 416 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
| 2 | mjames | 417 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
| 418 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
||
| 419 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
||
| 420 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
||
| 421 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
| 422 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
| 423 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
||
| 424 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
| 425 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
| 426 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
||
| 427 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
||
| 428 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
||
| 429 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
||
| 430 | * @retval None |
||
| 431 | */ |
||
| 432 | #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
| 433 | |||
| 434 | /** |
||
| 435 | * @brief Disable the MMC device interrupt. |
||
| 436 | * @param __HANDLE__: MMC Handle |
||
| 437 | * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled. |
||
| 438 | * This parameter can be one or a combination of the following values: |
||
| 439 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
| 440 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
| 441 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
| 442 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
| 443 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
| 444 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
| 445 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
| 446 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
| 9 | mjames | 447 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
| 2 | mjames | 448 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
| 449 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
||
| 450 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
||
| 451 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
||
| 452 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
| 453 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
| 454 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
||
| 455 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
| 456 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
| 457 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
||
| 458 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
||
| 459 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
||
| 460 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
||
| 461 | * @retval None |
||
| 462 | */ |
||
| 463 | #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
| 464 | |||
| 465 | /** |
||
| 466 | * @brief Check whether the specified MMC flag is set or not. |
||
| 467 | * @param __HANDLE__: MMC Handle |
||
| 468 | * @param __FLAG__: specifies the flag to check. |
||
| 469 | * This parameter can be one of the following values: |
||
| 470 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
||
| 471 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
||
| 472 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
||
| 473 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
||
| 474 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
||
| 475 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
||
| 476 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
||
| 477 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
||
| 9 | mjames | 478 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
| 2 | mjames | 479 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
| 480 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
||
| 481 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
||
| 482 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
||
| 483 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
||
| 484 | * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
||
| 485 | * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
||
| 486 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
||
| 487 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
||
| 488 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
||
| 489 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
||
| 490 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
||
| 491 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
||
| 492 | * @retval The new state of MMC FLAG (SET or RESET). |
||
| 493 | */ |
||
| 494 | #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
||
| 495 | |||
| 496 | /** |
||
| 497 | * @brief Clear the MMC's pending flags. |
||
| 498 | * @param __HANDLE__: MMC Handle |
||
| 499 | * @param __FLAG__: specifies the flag to clear. |
||
| 500 | * This parameter can be one or a combination of the following values: |
||
| 501 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
||
| 502 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
||
| 503 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
||
| 504 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
||
| 505 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
||
| 506 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
||
| 507 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
||
| 508 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
||
| 9 | mjames | 509 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
| 2 | mjames | 510 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
| 511 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
||
| 512 | * @retval None |
||
| 513 | */ |
||
| 514 | #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
||
| 515 | |||
| 516 | /** |
||
| 517 | * @brief Check whether the specified MMC interrupt has occurred or not. |
||
| 518 | * @param __HANDLE__: MMC Handle |
||
| 519 | * @param __INTERRUPT__: specifies the SDMMC interrupt source to check. |
||
| 520 | * This parameter can be one of the following values: |
||
| 521 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
| 522 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
| 523 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
| 524 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
| 525 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
| 526 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
| 527 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
| 528 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
| 9 | mjames | 529 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
| 2 | mjames | 530 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
| 531 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
||
| 532 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
||
| 533 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
||
| 534 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
| 535 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
| 536 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
||
| 537 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
| 538 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
| 539 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
||
| 540 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
||
| 541 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
||
| 542 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
||
| 543 | * @retval The new state of MMC IT (SET or RESET). |
||
| 544 | */ |
||
| 545 | #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
| 546 | |||
| 547 | /** |
||
| 548 | * @brief Clear the MMC's interrupt pending bits. |
||
| 549 | * @param __HANDLE__: MMC Handle |
||
| 550 | * @param __INTERRUPT__: specifies the interrupt pending bit to clear. |
||
| 551 | * This parameter can be one or a combination of the following values: |
||
| 552 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
||
| 553 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
||
| 554 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
||
| 555 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
||
| 556 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
||
| 557 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
||
| 558 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
||
| 559 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
||
| 9 | mjames | 560 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
| 561 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
||
| 562 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
||
| 563 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
||
| 564 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
||
| 565 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
||
| 2 | mjames | 566 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
| 567 | * @retval None |
||
| 568 | */ |
||
| 569 | #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
||
| 570 | |||
| 571 | /** |
||
| 572 | * @} |
||
| 573 | */ |
||
| 574 | |||
| 575 | /* Exported functions --------------------------------------------------------*/ |
||
| 576 | /** @defgroup MMC_Exported_Functions MMC Exported Functions |
||
| 577 | * @{ |
||
| 578 | */ |
||
| 579 | |||
| 580 | /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions |
||
| 581 | * @{ |
||
| 582 | */ |
||
| 583 | HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); |
||
| 584 | HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); |
||
| 585 | HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); |
||
| 586 | void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); |
||
| 587 | void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); |
||
| 9 | mjames | 588 | |
| 2 | mjames | 589 | /** |
| 590 | * @} |
||
| 591 | */ |
||
| 592 | |||
| 593 | /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions |
||
| 594 | * @{ |
||
| 595 | */ |
||
| 596 | /* Blocking mode: Polling */ |
||
| 597 | HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
||
| 598 | HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
||
| 599 | HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); |
||
| 600 | /* Non-Blocking mode: IT */ |
||
| 601 | HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
||
| 602 | HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
||
| 603 | /* Non-Blocking mode: DMA */ |
||
| 604 | HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
||
| 605 | HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
||
| 606 | |||
| 607 | void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); |
||
| 608 | |||
| 609 | /* Callback in non blocking modes (DMA) */ |
||
| 610 | void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); |
||
| 611 | void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); |
||
| 612 | void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); |
||
| 613 | void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); |
||
| 9 | mjames | 614 | |
| 615 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
||
| 616 | /* MMC callback registering/unregistering */ |
||
| 617 | HAL_StatusTypeDef HAL_MMC_RegisterCallback (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback); |
||
| 618 | HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); |
||
| 619 | #endif |
||
| 2 | mjames | 620 | /** |
| 621 | * @} |
||
| 622 | */ |
||
| 623 | |||
| 624 | /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions |
||
| 625 | * @{ |
||
| 626 | */ |
||
| 627 | HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); |
||
| 628 | /** |
||
| 629 | * @} |
||
| 630 | */ |
||
| 631 | |||
| 632 | /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions |
||
| 633 | * @{ |
||
| 634 | */ |
||
| 635 | HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); |
||
| 9 | mjames | 636 | HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); |
| 637 | HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); |
||
| 638 | HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); |
||
| 2 | mjames | 639 | /** |
| 640 | * @} |
||
| 641 | */ |
||
| 642 | |||
| 643 | /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions |
||
| 644 | * @{ |
||
| 645 | */ |
||
| 646 | HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); |
||
| 647 | uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); |
||
| 648 | /** |
||
| 649 | * @} |
||
| 650 | */ |
||
| 651 | |||
| 652 | /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management |
||
| 653 | * @{ |
||
| 654 | */ |
||
| 655 | HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); |
||
| 656 | HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); |
||
| 657 | /** |
||
| 658 | * @} |
||
| 659 | */ |
||
| 660 | |||
| 661 | /* Private types -------------------------------------------------------------*/ |
||
| 662 | /** @defgroup MMC_Private_Types MMC Private Types |
||
| 663 | * @{ |
||
| 664 | */ |
||
| 665 | |||
| 666 | /** |
||
| 667 | * @} |
||
| 668 | */ |
||
| 669 | |||
| 670 | /* Private defines -----------------------------------------------------------*/ |
||
| 671 | /** @defgroup MMC_Private_Defines MMC Private Defines |
||
| 672 | * @{ |
||
| 673 | */ |
||
| 674 | |||
| 675 | /** |
||
| 676 | * @} |
||
| 677 | */ |
||
| 678 | |||
| 679 | /* Private variables ---------------------------------------------------------*/ |
||
| 680 | /** @defgroup MMC_Private_Variables MMC Private Variables |
||
| 681 | * @{ |
||
| 682 | */ |
||
| 683 | |||
| 684 | /** |
||
| 685 | * @} |
||
| 686 | */ |
||
| 687 | |||
| 688 | /* Private constants ---------------------------------------------------------*/ |
||
| 689 | /** @defgroup MMC_Private_Constants MMC Private Constants |
||
| 690 | * @{ |
||
| 691 | */ |
||
| 692 | |||
| 693 | /** |
||
| 694 | * @} |
||
| 695 | */ |
||
| 696 | |||
| 697 | /* Private macros ------------------------------------------------------------*/ |
||
| 698 | /** @defgroup MMC_Private_Macros MMC Private Macros |
||
| 699 | * @{ |
||
| 700 | */ |
||
| 701 | |||
| 702 | /** |
||
| 703 | * @} |
||
| 704 | */ |
||
| 705 | |||
| 706 | /* Private functions prototypes ----------------------------------------------*/ |
||
| 707 | /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes |
||
| 708 | * @{ |
||
| 709 | */ |
||
| 710 | |||
| 711 | /** |
||
| 712 | * @} |
||
| 713 | */ |
||
| 714 | |||
| 715 | /* Private functions ---------------------------------------------------------*/ |
||
| 716 | /** @defgroup MMC_Private_Functions MMC Private Functions |
||
| 717 | * @{ |
||
| 718 | */ |
||
| 719 | |||
| 720 | /** |
||
| 721 | * @} |
||
| 722 | */ |
||
| 723 | |||
| 9 | mjames | 724 | |
| 2 | mjames | 725 | /** |
| 726 | * @} |
||
| 727 | */ |
||
| 728 | |||
| 729 | /** |
||
| 730 | * @} |
||
| 731 | */ |
||
| 732 | |||
| 733 | /** |
||
| 734 | * @} |
||
| 735 | */ |
||
| 736 | |||
| 737 | #ifdef __cplusplus |
||
| 738 | } |
||
| 739 | #endif |
||
| 740 | |||
| 9 | mjames | 741 | #endif /* SDIO */ |
| 2 | mjames | 742 | |
| 9 | mjames | 743 | #endif /* STM32F1xx_HAL_MMC_H */ |
| 2 | mjames | 744 | |
| 745 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |