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| Rev | Author | Line No. | Line |
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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_iwdg.h |
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| 4 | * @author MCD Application Team |
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| 5 | mjames | 5 | * @version V1.0.4 |
| 6 | * @date 29-April-2016 |
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| 2 | mjames | 7 | * @brief Header file of IWDG HAL module. |
| 8 | ****************************************************************************** |
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| 9 | * @attention |
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| 10 | * |
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| 5 | mjames | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| 2 | mjames | 12 | * |
| 13 | * Redistribution and use in source and binary forms, with or without modification, |
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| 14 | * are permitted provided that the following conditions are met: |
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| 15 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 16 | * this list of conditions and the following disclaimer. |
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| 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 18 | * this list of conditions and the following disclaimer in the documentation |
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| 19 | * and/or other materials provided with the distribution. |
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| 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 21 | * may be used to endorse or promote products derived from this software |
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| 22 | * without specific prior written permission. |
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| 23 | * |
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| 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 34 | * |
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| 35 | ****************************************************************************** |
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| 36 | */ |
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| 37 | |||
| 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 39 | #ifndef __STM32F1xx_HAL_IWDG_H |
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| 40 | #define __STM32F1xx_HAL_IWDG_H |
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| 41 | |||
| 42 | #ifdef __cplusplus |
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| 43 | extern "C" { |
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| 44 | #endif |
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| 45 | |||
| 46 | /* Includes ------------------------------------------------------------------*/ |
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| 47 | #include "stm32f1xx_hal_def.h" |
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| 48 | |||
| 49 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 50 | * @{ |
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| 51 | */ |
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| 52 | |||
| 53 | /** @addtogroup IWDG |
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| 54 | * @{ |
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| 55 | */ |
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| 56 | |||
| 57 | /* Exported types ------------------------------------------------------------*/ |
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| 58 | |||
| 59 | /** @defgroup IWDG_Exported_Types IWDG Exported Types |
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| 60 | * @{ |
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| 61 | */ |
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| 62 | |||
| 63 | /** |
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| 64 | * @brief IWDG HAL State Structure definition |
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| 65 | */ |
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| 66 | typedef enum |
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| 67 | { |
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| 68 | HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */ |
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| 69 | HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */ |
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| 70 | HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */ |
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| 71 | HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */ |
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| 72 | HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */ |
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| 73 | |||
| 74 | }HAL_IWDG_StateTypeDef; |
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| 75 | |||
| 76 | /** |
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| 77 | * @brief IWDG Init structure definition |
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| 78 | */ |
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| 79 | typedef struct |
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| 80 | { |
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| 81 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. |
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| 82 | This parameter can be a value of @ref IWDG_Prescaler */ |
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| 83 | |||
| 84 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. |
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| 85 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
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| 86 | |||
| 87 | }IWDG_InitTypeDef; |
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| 88 | |||
| 89 | /** |
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| 90 | * @brief IWDG Handle Structure definition |
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| 91 | */ |
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| 92 | typedef struct |
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| 93 | { |
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| 94 | IWDG_TypeDef *Instance; /*!< Register base address */ |
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| 95 | |||
| 96 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
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| 97 | |||
| 98 | HAL_LockTypeDef Lock; /*!< IWDG Locking object */ |
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| 99 | |||
| 100 | __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */ |
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| 101 | |||
| 102 | }IWDG_HandleTypeDef; |
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| 103 | |||
| 104 | /** |
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| 105 | * @} |
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| 106 | */ |
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| 107 | |||
| 108 | /* Exported constants --------------------------------------------------------*/ |
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| 109 | |||
| 110 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants |
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| 111 | * @{ |
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| 112 | */ |
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| 113 | |||
| 114 | /** @defgroup IWDG_Registers_BitMask IWDG Registers BitMask |
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| 115 | * @brief IWDG registers bit mask |
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| 116 | * @{ |
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| 117 | */ |
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| 118 | /* --- KR Register ---*/ |
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| 119 | /* KR register bit mask */ |
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| 120 | #define IWDG_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */ |
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| 121 | #define IWDG_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */ |
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| 122 | #define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */ |
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| 123 | #define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */ |
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| 124 | |||
| 125 | /** |
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| 126 | * @} |
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| 127 | */ |
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| 128 | |||
| 129 | /** @defgroup IWDG_Flag_definition IWDG Flag definition |
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| 130 | * @{ |
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| 131 | */ |
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| 132 | #define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update Flag */ |
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| 133 | #define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update Flag */ |
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| 134 | |||
| 135 | /** |
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| 136 | * @} |
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| 137 | */ |
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| 138 | |||
| 139 | /** @defgroup IWDG_Prescaler IWDG Prescaler |
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| 140 | * @{ |
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| 141 | */ |
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| 142 | #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */ |
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| 143 | #define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */ |
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| 144 | #define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */ |
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| 145 | #define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */ |
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| 146 | #define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */ |
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| 147 | #define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */ |
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| 148 | #define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */ |
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| 149 | |||
| 150 | /** |
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| 151 | * @} |
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| 152 | */ |
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| 153 | |||
| 154 | |||
| 155 | /** |
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| 156 | * @} |
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| 157 | */ |
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| 158 | |||
| 159 | /* Exported macros -----------------------------------------------------------*/ |
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| 160 | |||
| 161 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros |
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| 162 | * @{ |
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| 163 | */ |
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| 164 | |||
| 165 | /** @brief Reset IWDG handle state |
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| 166 | * @param __HANDLE__: IWDG handle. |
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| 167 | * @retval None |
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| 168 | */ |
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| 169 | #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET) |
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| 170 | |||
| 171 | /** |
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| 172 | * @brief Enables the IWDG peripheral. |
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| 173 | * @param __HANDLE__: IWDG handle |
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| 174 | * @retval None |
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| 175 | */ |
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| 176 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) |
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| 177 | |||
| 178 | /** |
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| 179 | * @brief Reloads IWDG counter with value defined in the reload register |
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| 180 | * (write access to IWDG_PR and IWDG_RLR registers disabled). |
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| 181 | * @param __HANDLE__: IWDG handle |
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| 182 | * @retval None |
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| 183 | */ |
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| 184 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) |
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| 185 | |||
| 186 | |||
| 187 | |||
| 188 | /** |
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| 189 | * @brief Gets the selected IWDG's flag status. |
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| 190 | * @param __HANDLE__: IWDG handle |
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| 191 | * @param __FLAG__: specifies the flag to check. |
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| 192 | * This parameter can be one of the following values: |
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| 193 | * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag |
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| 194 | * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag |
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| 195 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
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| 196 | */ |
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| 197 | #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
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| 198 | |||
| 199 | /** |
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| 200 | * @} |
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| 201 | */ |
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| 202 | |||
| 203 | /* Private macro -------------------------------------------------------------*/ |
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| 204 | |||
| 205 | /** @defgroup IWDG_Private_Macros IWDG Private Macros |
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| 206 | * @{ |
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| 207 | */ |
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| 208 | |||
| 209 | |||
| 210 | /** |
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| 211 | * @brief Enables write access to IWDG_PR and IWDG_RLR registers. |
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| 212 | * @param __HANDLE__: IWDG handle |
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| 213 | * @retval None |
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| 214 | */ |
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| 215 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) |
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| 216 | |||
| 217 | /** |
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| 218 | * @brief Disables write access to IWDG_PR and IWDG_RLR registers. |
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| 219 | * @param __HANDLE__: IWDG handle |
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| 220 | * @retval None |
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| 221 | */ |
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| 222 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) |
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| 223 | |||
| 224 | |||
| 225 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ |
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| 226 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ |
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| 227 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ |
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| 228 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ |
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| 229 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ |
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| 230 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ |
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| 231 | ((__PRESCALER__) == IWDG_PRESCALER_256)) |
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| 232 | |||
| 233 | |||
| 234 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF) |
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| 235 | |||
| 236 | |||
| 237 | /** |
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| 238 | * @} |
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| 239 | */ |
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| 240 | |||
| 241 | |||
| 242 | |||
| 243 | /* Exported functions --------------------------------------------------------*/ |
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| 244 | |||
| 245 | /** @addtogroup IWDG_Exported_Functions |
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| 246 | * @{ |
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| 247 | */ |
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| 248 | |||
| 249 | /** @addtogroup IWDG_Exported_Functions_Group1 |
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| 250 | * @{ |
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| 251 | */ |
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| 252 | /* Initialization/de-initialization functions ********************************/ |
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| 253 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
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| 254 | void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg); |
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| 255 | |||
| 256 | /** |
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| 257 | * @} |
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| 258 | */ |
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| 259 | |||
| 260 | /** @addtogroup IWDG_Exported_Functions_Group2 |
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| 261 | * @{ |
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| 262 | */ |
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| 263 | /* I/O operation functions ****************************************************/ |
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| 264 | HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg); |
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| 265 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
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| 266 | |||
| 267 | /** |
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| 268 | * @} |
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| 269 | */ |
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| 270 | |||
| 271 | /** @addtogroup IWDG_Exported_Functions_Group3 |
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| 272 | * @{ |
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| 273 | */ |
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| 274 | /* Peripheral State functions ************************************************/ |
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| 275 | HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg); |
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| 276 | |||
| 277 | /** |
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| 278 | * @} |
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| 279 | */ |
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| 280 | |||
| 281 | /** |
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| 282 | * @} |
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| 283 | */ |
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| 284 | |||
| 285 | /** |
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| 286 | * @} |
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| 287 | */ |
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| 288 | |||
| 289 | /** |
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| 290 | * @} |
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| 291 | */ |
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| 292 | |||
| 293 | #ifdef __cplusplus |
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| 294 | } |
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| 295 | #endif |
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| 296 | |||
| 297 | #endif /* __STM32F1xx_HAL_IWDG_H */ |
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| 298 | |||
| 299 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |