WebSVN – canSerial – Blame – /trunk/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2s.h

Rev	Author	Line No.	Line
2	mjames	1	/**
		2	******************************************************************************
		3	* @file stm32f1xx_hal_i2s.h
		4	* @author MCD Application Team
		5	* @brief Header file of I2S HAL module.
		6	******************************************************************************
		7	* @attention
		8	*
		9	* <h2><center>© Copyright (c) 2016 STMicroelectronics.
		10	* All rights reserved.</center></h2>
		11	*
		12	* This software component is licensed by ST under BSD 3-Clause license,
		13	* the "License"; You may not use this file except in compliance with the
		14	* License. You may obtain a copy of the License at:
		15	* opensource.org/licenses/BSD-3-Clause
		16	*
		17	******************************************************************************
		18	*/
		19
		20	/* Define to prevent recursive inclusion -------------------------------------*/
		21	#ifndef STM32F1xx_HAL_I2S_H
		22	#define STM32F1xx_HAL_I2S_H
		23
		24	#ifdef __cplusplus
		25	extern "C" {
		26	#endif
		27
		28	/* Includes ------------------------------------------------------------------*/
		29	#include "stm32f1xx_hal_def.h"
		30
		31	#if defined(SPI_I2S_SUPPORT)
		32	/** @addtogroup STM32F1xx_HAL_Driver
		33	* @{
		34	*/
		35
		36	/** @addtogroup I2S
		37	* @{
		38	*/
		39
		40	/* Exported types ------------------------------------------------------------*/
		41	/** @defgroup I2S_Exported_Types I2S Exported Types
		42	* @{
		43	*/
		44
		45	/**
		46	* @brief I2S Init structure definition
		47	*/
		48	typedef struct
		49	{
		50	uint32_t Mode; /*!< Specifies the I2S operating mode.
		51	This parameter can be a value of @ref I2S_Mode */
		52
		53	uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
		54	This parameter can be a value of @ref I2S_Standard */
		55
		56	uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
		57	This parameter can be a value of @ref I2S_Data_Format */
		58
		59	uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
		60	This parameter can be a value of @ref I2S_MCLK_Output */
		61
		62	uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
		63	This parameter can be a value of @ref I2S_Audio_Frequency */
		64
		65	uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
		66	This parameter can be a value of @ref I2S_Clock_Polarity */
		67	} I2S_InitTypeDef;
		68
		69	/**
		70	* @brief HAL State structures definition
		71	*/
		72	typedef enum
		73	{
		74	HAL_I2S_STATE_RESET = 0x00U, /!< I2S not yet initialized or disabled /
		75	HAL_I2S_STATE_READY = 0x01U, /!< I2S initialized and ready for use /
		76	HAL_I2S_STATE_BUSY = 0x02U, /!< I2S internal process is ongoing /
		77	HAL_I2S_STATE_BUSY_TX = 0x03U, /!< Data Transmission process is ongoing /
		78	HAL_I2S_STATE_BUSY_RX = 0x04U, /!< Data Reception process is ongoing /
		79	HAL_I2S_STATE_TIMEOUT = 0x06U, /!< I2S timeout state /
		80	HAL_I2S_STATE_ERROR = 0x07U /!< I2S error state /
		81	} HAL_I2S_StateTypeDef;
		82
		83	/**
		84	* @brief I2S handle Structure definition
		85	*/
		86	#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
		87	typedef struct __I2S_HandleTypeDef
		88	#else
		89	typedef struct
		90	#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
		91	{
		92	SPI_TypeDef Instance; /!< I2S registers base address */
		93
		94	I2S_InitTypeDef Init; /!< I2S communication parameters /
		95
		96	uint16_t pTxBuffPtr; /!< Pointer to I2S Tx transfer buffer */
		97
		98	__IO uint16_t TxXferSize; /!< I2S Tx transfer size /
		99
		100	__IO uint16_t TxXferCount; /!< I2S Tx transfer Counter /
		101
		102	uint16_t pRxBuffPtr; /!< Pointer to I2S Rx transfer buffer */
		103
		104	__IO uint16_t RxXferSize; /!< I2S Rx transfer size /
		105
		106	__IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
		107	(This field is initialized at the
		108	same value as transfer size at the
		109	beginning of the transfer and
		110	decremented when a sample is received
		111	NbSamplesReceived = RxBufferSize-RxBufferCount) */
		112	DMA_HandleTypeDef hdmatx; /!< I2S Tx DMA handle parameters */
		113
		114	DMA_HandleTypeDef hdmarx; /!< I2S Rx DMA handle parameters */
		115
		116	__IO HAL_LockTypeDef Lock; /!< I2S locking object /
		117
		118	__IO HAL_I2S_StateTypeDef State; /!< I2S communication state /
		119
		120	__IO uint32_t ErrorCode; /*!< I2S Error code
		121	This parameter can be a value of @ref I2S_Error */
		122
		123	#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
		124	void (* TxCpltCallback)(struct __I2S_HandleTypeDef hi2s); /!< I2S Tx Completed callback */
		125	void (* RxCpltCallback)(struct __I2S_HandleTypeDef hi2s); /!< I2S Rx Completed callback */
		126	void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef hi2s); /!< I2S Tx Half Completed callback */
		127	void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef hi2s); /!< I2S Rx Half Completed callback */
		128	void (* ErrorCallback)(struct __I2S_HandleTypeDef hi2s); /!< I2S Error callback */
		129	void (* MspInitCallback)(struct __I2S_HandleTypeDef hi2s); /!< I2S Msp Init callback */
		130	void (* MspDeInitCallback)(struct __I2S_HandleTypeDef hi2s); /!< I2S Msp DeInit callback */
		131
		132	#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
		133	} I2S_HandleTypeDef;
		134
		135	#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
		136	/**
		137	* @brief HAL I2S Callback ID enumeration definition
		138	*/
		139	typedef enum
		140	{
		141	HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /!< I2S Tx Completed callback ID /
		142	HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /!< I2S Rx Completed callback ID /
		143	HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /!< I2S Tx Half Completed callback ID /
		144	HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /!< I2S Rx Half Completed callback ID /
		145	HAL_I2S_ERROR_CB_ID = 0x06U, /!< I2S Error callback ID /
		146	HAL_I2S_MSPINIT_CB_ID = 0x07U, /!< I2S Msp Init callback ID /
		147	HAL_I2S_MSPDEINIT_CB_ID = 0x08U /!< I2S Msp DeInit callback ID /
		148
		149	} HAL_I2S_CallbackIDTypeDef;
		150
		151	/**
		152	* @brief HAL I2S Callback pointer definition
		153	*/
		154	typedef void (pI2S_CallbackTypeDef)(I2S_HandleTypeDef hi2s); /!< pointer to an I2S callback function /
		155
		156	#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
		157	/**
		158	* @}
		159	*/
		160
		161	/* Exported constants --------------------------------------------------------*/
		162	/** @defgroup I2S_Exported_Constants I2S Exported Constants
		163	* @{
		164	*/
		165	/** @defgroup I2S_Error I2S Error
		166	* @{
		167	*/
		168	#define HAL_I2S_ERROR_NONE (0x00000000U) /!< No error /
		169	#define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /!< Timeout error /
		170	#define HAL_I2S_ERROR_OVR (0x00000002U) /!< OVR error /
		171	#define HAL_I2S_ERROR_UDR (0x00000004U) /!< UDR error /
		172	#define HAL_I2S_ERROR_DMA (0x00000008U) /!< DMA transfer error /
		173	#define HAL_I2S_ERROR_PRESCALER (0x00000010U) /!< Prescaler Calculation error /
		174	#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
		175	#define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U) /!< Invalid Callback error /
		176	#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
		177	#define HAL_I2S_ERROR_BUSY_LINE_RX (0x00000040U) /!< Busy Rx Line error /
		178	/**
		179	* @}
		180	*/
		181
		182	/** @defgroup I2S_Mode I2S Mode
		183	* @{
		184	*/
		185	#define I2S_MODE_SLAVE_TX (0x00000000U)
		186	#define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0)
		187	#define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1)
		188	#define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 \| SPI_I2SCFGR_I2SCFG_1))
		189	/**
		190	* @}
		191	*/
		192
		193	/** @defgroup I2S_Standard I2S Standard
		194	* @{
		195	*/
		196	#define I2S_STANDARD_PHILIPS (0x00000000U)
		197	#define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0)
		198	#define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1)
		199	#define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 \| SPI_I2SCFGR_I2SSTD_1))
		200	#define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 \| SPI_I2SCFGR_I2SSTD_1 \| SPI_I2SCFGR_PCMSYNC))
		201	/**
		202	* @}
		203	*/
		204
		205	/** @defgroup I2S_Data_Format I2S Data Format
		206	* @{
		207	*/
		208	#define I2S_DATAFORMAT_16B (0x00000000U)
		209	#define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN)
		210	#define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN \| SPI_I2SCFGR_DATLEN_0))
		211	#define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN \| SPI_I2SCFGR_DATLEN_1))
		212	/**
		213	* @}
		214	*/
		215
		216	/** @defgroup I2S_MCLK_Output I2S MCLK Output
		217	* @{
		218	*/
		219	#define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE)
		220	#define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
		221	/**
		222	* @}
		223	*/
		224
		225	/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
		226	* @{
		227	*/
		228	#define I2S_AUDIOFREQ_192K (192000U)
		229	#define I2S_AUDIOFREQ_96K (96000U)
		230	#define I2S_AUDIOFREQ_48K (48000U)
		231	#define I2S_AUDIOFREQ_44K (44100U)
		232	#define I2S_AUDIOFREQ_32K (32000U)
		233	#define I2S_AUDIOFREQ_22K (22050U)
		234	#define I2S_AUDIOFREQ_16K (16000U)
		235	#define I2S_AUDIOFREQ_11K (11025U)
		236	#define I2S_AUDIOFREQ_8K (8000U)
		237	#define I2S_AUDIOFREQ_DEFAULT (2U)
		238	/**
		239	* @}
		240	*/
		241
		242	/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
		243	* @{
		244	*/
		245	#define I2S_CPOL_LOW (0x00000000U)
		246	#define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
		247	/**
		248	* @}
		249	*/
		250
		251	/** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
		252	* @{
		253	*/
		254	#define I2S_IT_TXE SPI_CR2_TXEIE
		255	#define I2S_IT_RXNE SPI_CR2_RXNEIE
		256	#define I2S_IT_ERR SPI_CR2_ERRIE
		257	/**
		258	* @}
		259	*/
		260
		261	/** @defgroup I2S_Flags_Definition I2S Flags Definition
		262	* @{
		263	*/
		264	#define I2S_FLAG_TXE SPI_SR_TXE
		265	#define I2S_FLAG_RXNE SPI_SR_RXNE
		266
		267	#define I2S_FLAG_UDR SPI_SR_UDR
		268	#define I2S_FLAG_OVR SPI_SR_OVR
		269	#define I2S_FLAG_FRE SPI_SR_FRE
		270
		271	#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
		272	#define I2S_FLAG_BSY SPI_SR_BSY
		273
		274	#define I2S_FLAG_MASK (SPI_SR_RXNE\
		275	\| SPI_SR_TXE \| SPI_SR_UDR \| SPI_SR_OVR \| SPI_SR_CHSIDE \| SPI_SR_BSY)
		276	/**
		277	* @}
		278	*/
		279
		280	/**
		281	* @}
		282	*/
		283
		284	/* Exported macros -----------------------------------------------------------*/
		285	/** @defgroup I2S_Exported_macros I2S Exported Macros
		286	* @{
		287	*/
		288
		289	/** @brief Reset I2S handle state
		290	* @param __HANDLE__ specifies the I2S Handle.
		291	* @retval None
		292	*/
		293	#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
		294	#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \
		295	(__HANDLE__)->State = HAL_I2S_STATE_RESET; \
		296	(__HANDLE__)->MspInitCallback = NULL; \
		297	(__HANDLE__)->MspDeInitCallback = NULL; \
		298	} while(0)
		299	#else
		300	#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
		301	#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
		302
		303	/** @brief Enable the specified SPI peripheral (in I2S mode).
		304	* @param __HANDLE__ specifies the I2S Handle.
		305	* @retval None
		306	*/
		307	#define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
		308
		309	/** @brief Disable the specified SPI peripheral (in I2S mode).
		310	* @param __HANDLE__ specifies the I2S Handle.
		311	* @retval None
		312	*/
		313	#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
		314
		315	/** @brief Enable the specified I2S interrupts.
		316	* @param __HANDLE__ specifies the I2S Handle.
		317	* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
		318	* This parameter can be one of the following values:
		319	* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
		320	* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
		321	* @arg I2S_IT_ERR: Error interrupt enable
		322	* @retval None
		323	*/
		324	#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
		325
		326	/** @brief Disable the specified I2S interrupts.
		327	* @param __HANDLE__ specifies the I2S Handle.
		328	* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
		329	* This parameter can be one of the following values:
		330	* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
		331	* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
		332	* @arg I2S_IT_ERR: Error interrupt enable
		333	* @retval None
		334	*/
		335	#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
		336
		337	/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
		338	* @param __HANDLE__ specifies the I2S Handle.
		339	* This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
		340	* @param __INTERRUPT__ specifies the I2S interrupt source to check.
		341	* This parameter can be one of the following values:
		342	* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
		343	* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
		344	* @arg I2S_IT_ERR: Error interrupt enable
		345	* @retval The new state of __IT__ (TRUE or FALSE).
		346	*/
		347	#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
		348	& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
		349
		350	/** @brief Checks whether the specified I2S flag is set or not.
		351	* @param __HANDLE__ specifies the I2S Handle.
		352	* @param __FLAG__ specifies the flag to check.
		353	* This parameter can be one of the following values:
		354	* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
		355	* @arg I2S_FLAG_TXE: Transmit buffer empty flag
		356	* @arg I2S_FLAG_UDR: Underrun flag
		357	* @arg I2S_FLAG_OVR: Overrun flag
		358	* @arg I2S_FLAG_FRE: Frame error flag
		359	* @arg I2S_FLAG_CHSIDE: Channel Side flag
		360	* @arg I2S_FLAG_BSY: Busy flag
		361	* @retval The new state of __FLAG__ (TRUE or FALSE).
		362	*/
		363	#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
		364
		365	/** @brief Clears the I2S OVR pending flag.
		366	* @param __HANDLE__ specifies the I2S Handle.
		367	* @retval None
		368	*/
		369	#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
		370	__IO uint32_t tmpreg_ovr = 0x00U; \
		371	tmpreg_ovr = (__HANDLE__)->Instance->DR; \
		372	tmpreg_ovr = (__HANDLE__)->Instance->SR; \
		373	UNUSED(tmpreg_ovr); \
		374	}while(0U)
		375	/** @brief Clears the I2S UDR pending flag.
		376	* @param __HANDLE__ specifies the I2S Handle.
		377	* @retval None
		378	*/
		379	#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
		380	__IO uint32_t tmpreg_udr = 0x00U;\
		381	tmpreg_udr = ((__HANDLE__)->Instance->SR);\
		382	UNUSED(tmpreg_udr); \
		383	}while(0U)
		384	/** @brief Flush the I2S DR Register.
		385	* @param __HANDLE__ specifies the I2S Handle.
		386	* @retval None
		387	*/
		388	#define __HAL_I2S_FLUSH_RX_DR(__HANDLE__) do{\
		389	__IO uint32_t tmpreg_dr = 0x00U;\
		390	tmpreg_dr = ((__HANDLE__)->Instance->DR);\
		391	UNUSED(tmpreg_dr); \
		392	}while(0U)
		393	/**
		394	* @}
		395	*/
		396
		397	/* Exported functions --------------------------------------------------------*/
		398	/** @addtogroup I2S_Exported_Functions
		399	* @{
		400	*/
		401
		402	/** @addtogroup I2S_Exported_Functions_Group1
		403	* @{
		404	*/
		405	/* Initialization/de-initialization functions ********************************/
		406	HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
		407	HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s);
		408	void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
		409	void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
		410
		411	/* Callbacks Register/UnRegister functions ***********************************/
		412	#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
		413	HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID,
		414	pI2S_CallbackTypeDef pCallback);
		415	HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
		416	#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
		417	/**
		418	* @}
		419	*/
		420
		421	/** @addtogroup I2S_Exported_Functions_Group2
		422	* @{
		423	*/
		424	/* I/O operation functions ***************************************************/
		425	/* Blocking mode: Polling */
		426	HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size, uint32_t Timeout);
		427	HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size, uint32_t Timeout);
		428
		429	/* Non-Blocking mode: Interrupt */
		430	HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size);
		431	HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size);
		432	void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
		433
		434	/* Non-Blocking mode: DMA */
		435	HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size);
		436	HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size);
		437
		438	HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
		439	HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
		440	HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
		441
		442	/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
		443	void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
		444	void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
		445	void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
		446	void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
		447	void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
		448	/**
		449	* @}
		450	*/
		451
		452	/** @addtogroup I2S_Exported_Functions_Group3
		453	* @{
		454	*/
		455	/* Peripheral Control and State functions ************************************/
		456	HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
		457	uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
		458	/**
		459	* @}
		460	*/
		461
		462	/**
		463	* @}
		464	*/
		465
		466	/* Private types -------------------------------------------------------------*/
		467	/* Private variables ---------------------------------------------------------*/
		468	/* Private constants ---------------------------------------------------------*/
		469	/* Private macros ------------------------------------------------------------*/
		470	/** @defgroup I2S_Private_Macros I2S Private Macros
		471	* @{
		472	*/
		473
		474	/** @brief Check whether the specified SPI flag is set or not.
		475	* @param __SR__ copy of I2S SR register.
		476	* @param __FLAG__ specifies the flag to check.
		477	* This parameter can be one of the following values:
		478	* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
		479	* @arg I2S_FLAG_TXE: Transmit buffer empty flag
		480	* @arg I2S_FLAG_UDR: Underrun error flag
		481	* @arg I2S_FLAG_OVR: Overrun flag
		482	* @arg I2S_FLAG_CHSIDE: Channel side flag
		483	* @arg I2S_FLAG_BSY: Busy flag
		484	* @retval SET or RESET.
		485	*/
		486	#define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\
		487	& ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)
		488
		489	/** @brief Check whether the specified SPI Interrupt is set or not.
		490	* @param __CR2__ copy of I2S CR2 register.
		491	* @param __INTERRUPT__ specifies the SPI interrupt source to check.
		492	* This parameter can be one of the following values:
		493	* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
		494	* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
		495	* @arg I2S_IT_ERR: Error interrupt enable
		496	* @retval SET or RESET.
		497	*/
		498	#define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__)\
		499	& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
		500
		501	/** @brief Checks if I2S Mode parameter is in allowed range.
		502	* @param __MODE__ specifies the I2S Mode.
		503	* This parameter can be a value of @ref I2S_Mode
		504	* @retval None
		505	*/
		506	#define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) \|\| \
		507	((__MODE__) == I2S_MODE_SLAVE_RX) \|\| \
		508	((__MODE__) == I2S_MODE_MASTER_TX) \|\| \
		509	((__MODE__) == I2S_MODE_MASTER_RX))
		510
		511	#define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) \|\| \
		512	((__STANDARD__) == I2S_STANDARD_MSB) \|\| \
		513	((__STANDARD__) == I2S_STANDARD_LSB) \|\| \
		514	((__STANDARD__) == I2S_STANDARD_PCM_SHORT) \|\| \
		515	((__STANDARD__) == I2S_STANDARD_PCM_LONG))
		516
		517	#define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) \|\| \
		518	((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) \|\| \
		519	((__FORMAT__) == I2S_DATAFORMAT_24B) \|\| \
		520	((__FORMAT__) == I2S_DATAFORMAT_32B))
		521
		522	#define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) \|\| \
		523	((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
		524
		525	#define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \
		526	((__FREQ__) <= I2S_AUDIOFREQ_192K)) \|\| \
		527	((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
		528
		529	/** @brief Checks if I2S Serial clock steady state parameter is in allowed range.
		530	* @param __CPOL__ specifies the I2S serial clock steady state.
		531	* This parameter can be a value of @ref I2S_Clock_Polarity
		532	* @retval None
		533	*/
		534	#define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) \|\| \
		535	((__CPOL__) == I2S_CPOL_HIGH))
		536
		537	/**
		538	* @}
		539	*/
		540
		541	/**
		542	* @}
		543	*/
		544
		545	/**
		546	* @}
		547	*/
		548	#endif /* SPI_I2S_SUPPORT */
		549
		550	#ifdef __cplusplus
		551	}
		552	#endif
		553
		554	#endif /* STM32F1xx_HAL_I2S_H */
		555
		556	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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