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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_i2s.h |
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4 | * @author MCD Application Team |
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5 | * @brief Header file of I2S HAL module. |
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6 | ****************************************************************************** |
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7 | * @attention |
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8 | * |
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9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 | * |
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11 | * Redistribution and use in source and binary forms, with or without modification, |
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12 | * are permitted provided that the following conditions are met: |
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13 | * 1. Redistributions of source code must retain the above copyright notice, |
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14 | * this list of conditions and the following disclaimer. |
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15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 | * this list of conditions and the following disclaimer in the documentation |
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17 | * and/or other materials provided with the distribution. |
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18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 | * may be used to endorse or promote products derived from this software |
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20 | * without specific prior written permission. |
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21 | * |
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22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 | * |
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33 | ****************************************************************************** |
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34 | */ |
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35 | |||
36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 | #ifndef __STM32F1xx_HAL_I2S_H |
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38 | #define __STM32F1xx_HAL_I2S_H |
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39 | |||
40 | #ifdef __cplusplus |
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41 | extern "C" { |
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42 | #endif |
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43 | |||
44 | #if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC) |
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45 | |||
46 | /* Includes ------------------------------------------------------------------*/ |
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47 | #include "stm32f1xx_hal_def.h" |
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48 | |||
49 | /** @addtogroup STM32F1xx_HAL_Driver |
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50 | * @{ |
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51 | */ |
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52 | |||
53 | /** @addtogroup I2S |
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54 | * @{ |
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55 | */ |
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56 | |||
57 | /* Exported types ------------------------------------------------------------*/ |
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58 | /** @defgroup I2S_Exported_Types I2S Exported Types |
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59 | * @{ |
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60 | */ |
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61 | |||
62 | /** |
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63 | * @brief I2S Init structure definition |
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64 | */ |
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65 | typedef struct |
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66 | { |
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67 | uint32_t Mode; /*!< Specifies the I2S operating mode. |
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68 | This parameter can be a value of @ref I2S_Mode */ |
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69 | |||
70 | uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
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71 | This parameter can be a value of @ref I2S_Standard */ |
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72 | |||
73 | uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
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74 | This parameter can be a value of @ref I2S_Data_Format */ |
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75 | |||
76 | uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
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77 | This parameter can be a value of @ref I2S_MCLK_Output */ |
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78 | |||
79 | uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
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80 | This parameter can be a value of @ref I2S_Audio_Frequency */ |
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81 | |||
82 | uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. |
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83 | This parameter can be a value of @ref I2S_Clock_Polarity */ |
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84 | }I2S_InitTypeDef; |
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85 | |||
86 | /** |
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87 | * @brief HAL State structures definition |
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88 | */ |
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89 | typedef enum |
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90 | { |
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91 | HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ |
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92 | HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ |
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93 | HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */ |
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94 | HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ |
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95 | HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ |
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96 | HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ |
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97 | HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */ |
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98 | HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */ |
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99 | |||
100 | }HAL_I2S_StateTypeDef; |
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101 | |||
102 | /** |
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103 | * @brief I2S handle Structure definition |
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104 | */ |
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105 | typedef struct __I2S_HandleTypeDef |
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106 | { |
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107 | SPI_TypeDef *Instance; /*!< I2S registers base address */ |
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108 | |||
109 | I2S_InitTypeDef Init; /*!< I2S communication parameters */ |
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110 | |||
111 | uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ |
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112 | |||
113 | __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ |
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114 | |||
115 | __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ |
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116 | |||
117 | uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ |
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118 | |||
119 | __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ |
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120 | |||
121 | __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter |
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122 | (This field is initialized at the |
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123 | same value as transfer size at the |
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124 | beginning of the transfer and |
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125 | decremented when a sample is received |
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126 | NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
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127 | |||
128 | void (*IrqHandlerISR) (struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */ |
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129 | |||
130 | DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ |
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131 | |||
132 | DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ |
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133 | |||
134 | __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ |
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135 | |||
136 | __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ |
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137 | |||
138 | __IO uint32_t ErrorCode; /*!< I2S Error code |
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139 | This parameter can be a value of @ref I2S_ErrorCode */ |
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140 | |||
141 | }I2S_HandleTypeDef; |
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142 | /** |
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143 | * @} |
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144 | */ |
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145 | |||
146 | /* Exported constants --------------------------------------------------------*/ |
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147 | /** @defgroup I2S_Exported_Constants I2S Exported Constants |
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148 | * @{ |
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149 | */ |
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150 | /** |
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151 | * @defgroup I2S_ErrorCode I2S Error Code |
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152 | * @{ |
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153 | */ |
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154 | #define HAL_I2S_ERROR_NONE 0x00000000U /*!< No error */ |
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155 | #define HAL_I2S_ERROR_TIMEOUT 0x00000001U /*!< Timeout error */ |
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156 | #define HAL_I2S_ERROR_OVR 0x00000002U /*!< OVR error */ |
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157 | #define HAL_I2S_ERROR_UDR 0x00000004U /*!< UDR error */ |
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158 | #define HAL_I2S_ERROR_DMA 0x00000008U /*!< DMA transfer error */ |
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159 | #define HAL_I2S_ERROR_PRESCALER 0x00000010U /*!< Prescaler Calculation error */ |
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160 | /** |
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161 | * @} |
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162 | */ |
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163 | |||
164 | /** @defgroup I2S_Mode I2S Mode |
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165 | * @{ |
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166 | */ |
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167 | #define I2S_MODE_SLAVE_TX 0x00000000U |
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168 | #define I2S_MODE_SLAVE_RX ((uint32_t)SPI_I2SCFGR_I2SCFG_0) |
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169 | #define I2S_MODE_MASTER_TX ((uint32_t)SPI_I2SCFGR_I2SCFG_1) |
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170 | #define I2S_MODE_MASTER_RX ((uint32_t)(SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1)) |
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171 | /** |
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172 | * @} |
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173 | */ |
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174 | |||
175 | /** @defgroup I2S_Standard I2S Standard |
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176 | * @{ |
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177 | */ |
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178 | #define I2S_STANDARD_PHILIPS 0x00000000U |
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179 | #define I2S_STANDARD_MSB ((uint32_t)SPI_I2SCFGR_I2SSTD_0) |
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180 | #define I2S_STANDARD_LSB ((uint32_t)SPI_I2SCFGR_I2SSTD_1) |
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181 | #define I2S_STANDARD_PCM_SHORT ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1)) |
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182 | #define I2S_STANDARD_PCM_LONG ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC)) |
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183 | /** |
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184 | * @} |
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185 | */ |
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186 | |||
187 | /** @defgroup I2S_Data_Format I2S Data Format |
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188 | * @{ |
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189 | */ |
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190 | #define I2S_DATAFORMAT_16B 0x00000000U |
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191 | #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)SPI_I2SCFGR_CHLEN) |
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192 | #define I2S_DATAFORMAT_24B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) |
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193 | #define I2S_DATAFORMAT_32B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) |
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194 | /** |
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195 | * @} |
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196 | */ |
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197 | |||
198 | /** @defgroup I2S_MCLK_Output I2S Mclk Output |
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199 | * @{ |
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200 | */ |
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201 | #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) |
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202 | #define I2S_MCLKOUTPUT_DISABLE 0x00000000U |
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203 | /** |
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204 | * @} |
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205 | */ |
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206 | |||
207 | /** @defgroup I2S_Audio_Frequency I2S Audio Frequency |
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208 | * @{ |
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209 | */ |
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210 | #define I2S_AUDIOFREQ_192K 192000U |
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211 | #define I2S_AUDIOFREQ_96K 96000U |
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212 | #define I2S_AUDIOFREQ_48K 48000U |
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213 | #define I2S_AUDIOFREQ_44K 44100U |
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214 | #define I2S_AUDIOFREQ_32K 32000U |
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215 | #define I2S_AUDIOFREQ_22K 22050U |
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216 | #define I2S_AUDIOFREQ_16K 16000U |
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217 | #define I2S_AUDIOFREQ_11K 11025U |
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218 | #define I2S_AUDIOFREQ_8K 8000U |
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219 | #define I2S_AUDIOFREQ_DEFAULT 2U |
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220 | /** |
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221 | * @} |
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222 | */ |
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223 | |||
224 | /** @defgroup I2S_Clock_Polarity I2S Clock Polarity |
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225 | * @{ |
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226 | */ |
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227 | #define I2S_CPOL_LOW 0x00000000U |
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228 | #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) |
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229 | /** |
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230 | * @} |
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231 | */ |
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232 | |||
233 | /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition |
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234 | * @{ |
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235 | */ |
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236 | #define I2S_IT_TXE SPI_CR2_TXEIE |
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237 | #define I2S_IT_RXNE SPI_CR2_RXNEIE |
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238 | #define I2S_IT_ERR SPI_CR2_ERRIE |
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239 | /** |
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240 | * @} |
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241 | */ |
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242 | |||
243 | /** @defgroup I2S_Flags_Definition I2S Flags Definition |
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244 | * @{ |
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245 | */ |
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246 | #define I2S_FLAG_TXE SPI_SR_TXE |
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247 | #define I2S_FLAG_RXNE SPI_SR_RXNE |
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248 | |||
249 | #define I2S_FLAG_UDR SPI_SR_UDR |
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250 | #define I2S_FLAG_OVR SPI_SR_OVR |
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251 | #define I2S_FLAG_FRE SPI_SR_FRE |
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252 | |||
253 | #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
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254 | #define I2S_FLAG_BSY SPI_SR_BSY |
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255 | /** |
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256 | * @} |
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257 | */ |
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258 | |||
259 | /** |
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260 | * @} |
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261 | */ |
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262 | |||
263 | /* Exported macro ------------------------------------------------------------*/ |
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264 | /** @defgroup I2S_Exported_Macros I2S Exported Macros |
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265 | * @{ |
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266 | */ |
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267 | |||
268 | /** @brief Reset I2S handle state |
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269 | * @param __HANDLE__: specifies the I2S Handle. |
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270 | * @retval None |
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271 | */ |
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272 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
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273 | |||
274 | /** @brief Enable the specified SPI peripheral (in I2S mode). |
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275 | * @param __HANDLE__: specifies the I2S Handle. |
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276 | * @retval None |
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277 | */ |
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278 | #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
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279 | |||
280 | /** @brief Disable the specified SPI peripheral (in I2S mode). |
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281 | * @param __HANDLE__: specifies the I2S Handle. |
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282 | * @retval None |
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283 | */ |
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284 | #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
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285 | |||
286 | /** @brief Enable the specified I2S interrupts. |
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287 | * @param __HANDLE__: specifies the I2S Handle. |
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288 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
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289 | * This parameter can be one of the following values: |
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290 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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291 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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292 | * @arg I2S_IT_ERR: Error interrupt enable |
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293 | * @retval None |
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294 | */ |
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295 | #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
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296 | |||
297 | /** @brief Disable the specified I2S interrupts. |
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298 | * @param __HANDLE__: specifies the I2S Handle. |
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299 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
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300 | * This parameter can be one of the following values: |
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301 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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302 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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303 | * @arg I2S_IT_ERR: Error interrupt enable |
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304 | * @retval None |
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305 | */ |
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306 | #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
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307 | |||
308 | /** @brief Checks if the specified I2S interrupt source is enabled or disabled. |
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309 | * @param __HANDLE__: specifies the I2S Handle. |
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310 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
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311 | * @param __INTERRUPT__: specifies the I2S interrupt source to check. |
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312 | * This parameter can be one of the following values: |
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313 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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314 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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315 | * @arg I2S_IT_ERR: Error interrupt enable |
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316 | * @retval The new state of __IT__ (TRUE or FALSE). |
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317 | */ |
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318 | #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
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319 | |||
320 | /** @brief Checks whether the specified I2S flag is set or not. |
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321 | * @param __HANDLE__: specifies the I2S Handle. |
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322 | * @param __FLAG__: specifies the flag to check. |
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323 | * This parameter can be one of the following values: |
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324 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
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325 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
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326 | * @arg I2S_FLAG_UDR: Underrun flag |
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327 | * @arg I2S_FLAG_OVR: Overrun flag |
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328 | * @arg I2S_FLAG_FRE: Frame error flag |
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329 | * @arg I2S_FLAG_CHSIDE: Channel Side flag |
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330 | * @arg I2S_FLAG_BSY: Busy flag |
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331 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
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332 | */ |
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333 | #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
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334 | |||
335 | /** @brief Clears the I2S OVR pending flag. |
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336 | * @param __HANDLE__: specifies the I2S Handle. |
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337 | * @retval None |
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338 | */ |
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339 | #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \ |
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340 | do{ \ |
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341 | __IO uint32_t tmpreg = 0x00U; \ |
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342 | tmpreg = (__HANDLE__)->Instance->DR; \ |
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343 | tmpreg = (__HANDLE__)->Instance->SR; \ |
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344 | UNUSED(tmpreg); \ |
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345 | } while(0U) |
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346 | |||
347 | /** @brief Clears the I2S UDR pending flag. |
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348 | * @param __HANDLE__: specifies the I2S Handle. |
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349 | * @retval None |
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350 | */ |
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351 | #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \ |
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352 | do{ \ |
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353 | __IO uint32_t tmpreg = 0x00U; \ |
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354 | tmpreg = (__HANDLE__)->Instance->SR; \ |
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355 | UNUSED(tmpreg); \ |
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356 | } while(0U) |
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357 | /** |
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358 | * @} |
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359 | */ |
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360 | |||
361 | /* Exported functions --------------------------------------------------------*/ |
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362 | /** @addtogroup I2S_Exported_Functions |
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363 | * @{ |
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364 | */ |
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365 | |||
366 | /** @addtogroup I2S_Exported_Functions_Group1 |
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367 | * @{ |
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368 | */ |
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369 | /* Initialization/de-initialization functions ********************************/ |
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370 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
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371 | HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); |
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372 | void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
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373 | void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
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374 | /** |
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375 | * @} |
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376 | */ |
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377 | |||
378 | /** @addtogroup I2S_Exported_Functions_Group2 |
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379 | * @{ |
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380 | */ |
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381 | /* I/O operation functions ***************************************************/ |
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382 | /* Blocking mode: Polling */ |
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383 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
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384 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
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385 | |||
386 | /* Non-Blocking mode: Interrupt */ |
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387 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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388 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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389 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
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390 | |||
391 | /* Non-Blocking mode: DMA */ |
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392 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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393 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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394 | |||
395 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
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396 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
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397 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
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398 | |||
399 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
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400 | void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
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401 | void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
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402 | void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
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403 | void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
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404 | void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
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405 | /** |
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406 | * @} |
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407 | */ |
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408 | |||
409 | /** @addtogroup I2S_Exported_Functions_Group3 |
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410 | * @{ |
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411 | */ |
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412 | /* Peripheral Control and State functions ************************************/ |
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413 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
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414 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
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415 | /** |
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416 | * @} |
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417 | */ |
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418 | |||
419 | /** |
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420 | * @} |
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421 | */ |
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422 | |||
423 | /* Private types -------------------------------------------------------------*/ |
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424 | /* Private variables ---------------------------------------------------------*/ |
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425 | /* Private constants ---------------------------------------------------------*/ |
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426 | /** @defgroup I2S_Private_Constants I2S Private Constants |
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427 | * @{ |
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428 | */ |
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429 | |||
430 | /** |
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431 | * @} |
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432 | */ |
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433 | |||
434 | /* Private macros ------------------------------------------------------------*/ |
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435 | /** @defgroup I2S_Private_Macros I2S Private Macros |
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436 | * @{ |
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437 | */ |
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438 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
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439 | ((MODE) == I2S_MODE_SLAVE_RX) || \ |
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440 | ((MODE) == I2S_MODE_MASTER_TX) || \ |
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441 | ((MODE) == I2S_MODE_MASTER_RX)) |
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442 | |||
443 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
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444 | ((STANDARD) == I2S_STANDARD_MSB) || \ |
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445 | ((STANDARD) == I2S_STANDARD_LSB) || \ |
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446 | ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ |
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447 | ((STANDARD) == I2S_STANDARD_PCM_LONG)) |
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448 | |||
449 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
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450 | ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ |
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451 | ((FORMAT) == I2S_DATAFORMAT_24B) || \ |
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452 | ((FORMAT) == I2S_DATAFORMAT_32B)) |
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453 | |||
454 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
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455 | ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
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456 | |||
457 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
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458 | ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ |
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459 | ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
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460 | |||
461 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
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462 | ((CPOL) == I2S_CPOL_HIGH)) |
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463 | /** |
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464 | * @} |
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465 | */ |
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466 | |||
467 | /* Private Fonctions ---------------------------------------------------------*/ |
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468 | /** @defgroup I2S_Private_Functions I2S Private Functions |
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469 | * @{ |
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470 | */ |
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471 | /* Private functions are defined in stm32f1xx_hal_i2s.c file */ |
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472 | /** |
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473 | * @} |
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474 | */ |
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475 | |||
476 | /** |
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477 | * @} |
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478 | */ |
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479 | |||
480 | /** |
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481 | * @} |
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482 | */ |
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483 | #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
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484 | |||
485 | #ifdef __cplusplus |
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486 | } |
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487 | #endif |
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488 | |||
489 | #endif /* __STM32F1xx_HAL_I2S_H */ |
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490 | |||
491 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |