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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_i2s.h |
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4 | * @author MCD Application Team |
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5 | mjames | 5 | * @version V1.0.4 |
6 | * @date 29-April-2016 |
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2 | mjames | 7 | * @brief Header file of I2S HAL module. |
8 | ****************************************************************************** |
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9 | * @attention |
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10 | * |
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5 | mjames | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
2 | mjames | 12 | * |
13 | * Redistribution and use in source and binary forms, with or without modification, |
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14 | * are permitted provided that the following conditions are met: |
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15 | * 1. Redistributions of source code must retain the above copyright notice, |
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16 | * this list of conditions and the following disclaimer. |
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17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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18 | * this list of conditions and the following disclaimer in the documentation |
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19 | * and/or other materials provided with the distribution. |
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20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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21 | * may be used to endorse or promote products derived from this software |
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22 | * without specific prior written permission. |
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23 | * |
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24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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34 | * |
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35 | ****************************************************************************** |
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36 | */ |
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37 | |||
38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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39 | #ifndef __STM32F1xx_HAL_I2S_H |
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40 | #define __STM32F1xx_HAL_I2S_H |
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41 | |||
42 | #ifdef __cplusplus |
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43 | extern "C" { |
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44 | #endif |
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45 | |||
46 | #if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC) |
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47 | |||
48 | /* Includes ------------------------------------------------------------------*/ |
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49 | #include "stm32f1xx_hal_def.h" |
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50 | |||
51 | /** @addtogroup STM32F1xx_HAL_Driver |
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52 | * @{ |
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53 | */ |
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54 | |||
55 | /** @addtogroup I2S |
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56 | * @{ |
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57 | */ |
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58 | |||
59 | /* Exported types ------------------------------------------------------------*/ |
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60 | /** @defgroup I2S_Exported_Types I2S Exported Types |
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61 | * @{ |
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62 | */ |
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63 | |||
64 | /** |
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65 | * @brief I2S Init structure definition |
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66 | */ |
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67 | typedef struct |
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68 | { |
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69 | uint32_t Mode; /*!< Specifies the I2S operating mode. |
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70 | This parameter can be a value of @ref I2S_Mode */ |
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71 | |||
72 | uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
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73 | This parameter can be a value of @ref I2S_Standard */ |
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74 | |||
75 | uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
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76 | This parameter can be a value of @ref I2S_Data_Format */ |
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77 | |||
78 | uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
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79 | This parameter can be a value of @ref I2S_MCLK_Output */ |
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80 | |||
81 | uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
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82 | This parameter can be a value of @ref I2S_Audio_Frequency */ |
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83 | |||
84 | uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. |
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85 | This parameter can be a value of @ref I2S_Clock_Polarity */ |
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86 | |||
87 | }I2S_InitTypeDef; |
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88 | |||
89 | /** |
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90 | * @brief HAL State structures definition |
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91 | */ |
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92 | typedef enum |
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93 | { |
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94 | HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */ |
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95 | HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */ |
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96 | HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */ |
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97 | HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
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98 | HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
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99 | HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */ |
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100 | HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */ |
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101 | }HAL_I2S_StateTypeDef; |
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102 | |||
103 | /** |
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104 | * @brief I2S handle Structure definition |
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105 | */ |
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106 | typedef struct |
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107 | { |
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108 | SPI_TypeDef *Instance; /* I2S registers base address */ |
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109 | |||
110 | I2S_InitTypeDef Init; /* I2S communication parameters */ |
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111 | |||
112 | uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */ |
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113 | |||
114 | __IO uint16_t TxXferSize; /* I2S Tx transfer size */ |
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115 | |||
116 | __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */ |
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117 | |||
118 | uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */ |
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119 | |||
120 | __IO uint16_t RxXferSize; /* I2S Rx transfer size */ |
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121 | |||
122 | __IO uint16_t RxXferCount; /* I2S Rx transfer counter |
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123 | (This field is initialized at the |
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124 | same value as transfer size at the |
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125 | beginning of the transfer and |
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126 | decremented when a sample is received. |
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127 | NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
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128 | |||
129 | DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */ |
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130 | |||
131 | DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */ |
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132 | |||
133 | __IO HAL_LockTypeDef Lock; /* I2S locking object */ |
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134 | |||
135 | __IO HAL_I2S_StateTypeDef State; /* I2S communication state */ |
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136 | |||
137 | __IO uint32_t ErrorCode; /* I2S Error code */ |
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138 | |||
139 | }I2S_HandleTypeDef; |
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140 | /** |
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141 | * @} |
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142 | */ |
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143 | |||
144 | /* Exported constants --------------------------------------------------------*/ |
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145 | /** @defgroup I2S_Exported_Constants I2S Exported Constants |
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146 | * @{ |
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147 | */ |
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148 | |||
149 | /** @defgroup I2S_Error_Codes I2S Error Codes |
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150 | * @{ |
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151 | */ |
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152 | #define HAL_I2S_ERROR_NONE ((uint32_t)0x00) /*!< No error */ |
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153 | #define HAL_I2S_ERROR_UDR ((uint32_t)0x01) /*!< I2S Underrun error */ |
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154 | #define HAL_I2S_ERROR_OVR ((uint32_t)0x02) /*!< I2S Overrun error */ |
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155 | #define HAL_I2S_ERROR_FRE ((uint32_t)0x04) /*!< I2S Frame format error */ |
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156 | #define HAL_I2S_ERROR_DMA ((uint32_t)0x08) /*!< DMA transfer error */ |
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157 | |||
158 | /** |
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159 | * @} |
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160 | */ |
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161 | |||
162 | |||
163 | /** @defgroup I2S_Mode I2S Mode |
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164 | * @{ |
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165 | */ |
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166 | #define I2S_MODE_SLAVE_TX ((uint32_t) 0x00000000) |
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167 | #define I2S_MODE_SLAVE_RX ((uint32_t) SPI_I2SCFGR_I2SCFG_0) |
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168 | #define I2S_MODE_MASTER_TX ((uint32_t) SPI_I2SCFGR_I2SCFG_1) |
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169 | #define I2S_MODE_MASTER_RX ((uint32_t)(SPI_I2SCFGR_I2SCFG_0 |\ |
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170 | SPI_I2SCFGR_I2SCFG_1)) |
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171 | |||
172 | /** |
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173 | * @} |
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174 | */ |
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175 | |||
176 | /** @defgroup I2S_Standard I2S Standard |
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177 | * @{ |
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178 | */ |
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179 | #define I2S_STANDARD_PHILIPS ((uint32_t) 0x00000000) |
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180 | #define I2S_STANDARD_MSB ((uint32_t) SPI_I2SCFGR_I2SSTD_0) |
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181 | #define I2S_STANDARD_LSB ((uint32_t) SPI_I2SCFGR_I2SSTD_1) |
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182 | #define I2S_STANDARD_PCM_SHORT ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ |
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183 | SPI_I2SCFGR_I2SSTD_1)) |
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184 | #define I2S_STANDARD_PCM_LONG ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ |
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185 | SPI_I2SCFGR_I2SSTD_1 |\ |
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186 | SPI_I2SCFGR_PCMSYNC)) |
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187 | |||
188 | /** |
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189 | * @} |
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190 | */ |
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191 | |||
192 | /** @defgroup I2S_Data_Format I2S Data Format |
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193 | * @{ |
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194 | */ |
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195 | #define I2S_DATAFORMAT_16B ((uint32_t) 0x00000000) |
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196 | #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t) SPI_I2SCFGR_CHLEN) |
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197 | #define I2S_DATAFORMAT_24B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) |
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198 | #define I2S_DATAFORMAT_32B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) |
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199 | /** |
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200 | * @} |
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201 | */ |
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202 | |||
203 | /** @defgroup I2S_MCLK_Output I2S MCLK Output |
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204 | * @{ |
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205 | */ |
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206 | #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) |
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207 | #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000) |
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208 | /** |
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209 | * @} |
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210 | */ |
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211 | |||
212 | /** @defgroup I2S_Audio_Frequency I2S Audio Frequency |
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213 | * @{ |
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214 | */ |
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215 | #define I2S_AUDIOFREQ_192K ((uint32_t)192000) |
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216 | #define I2S_AUDIOFREQ_96K ((uint32_t)96000) |
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217 | #define I2S_AUDIOFREQ_48K ((uint32_t)48000) |
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218 | #define I2S_AUDIOFREQ_44K ((uint32_t)44100) |
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219 | #define I2S_AUDIOFREQ_32K ((uint32_t)32000) |
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220 | #define I2S_AUDIOFREQ_22K ((uint32_t)22050) |
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221 | #define I2S_AUDIOFREQ_16K ((uint32_t)16000) |
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222 | #define I2S_AUDIOFREQ_11K ((uint32_t)11025) |
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223 | #define I2S_AUDIOFREQ_8K ((uint32_t)8000) |
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224 | #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2) |
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225 | /** |
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226 | * @} |
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227 | */ |
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228 | |||
229 | /** @defgroup I2S_Clock_Polarity I2S Clock Polarity |
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230 | * @{ |
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231 | */ |
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232 | #define I2S_CPOL_LOW ((uint32_t)0x00000000) |
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233 | #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) |
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234 | /** |
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235 | * @} |
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236 | */ |
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237 | |||
238 | /** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition |
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239 | * @{ |
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240 | */ |
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241 | #define I2S_IT_TXE SPI_CR2_TXEIE |
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242 | #define I2S_IT_RXNE SPI_CR2_RXNEIE |
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243 | #define I2S_IT_ERR SPI_CR2_ERRIE |
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244 | /** |
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245 | * @} |
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246 | */ |
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247 | |||
248 | /** @defgroup I2S_Flag_definition I2S Flag definition |
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249 | * @{ |
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250 | */ |
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251 | #define I2S_FLAG_TXE SPI_SR_TXE |
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252 | #define I2S_FLAG_RXNE SPI_SR_RXNE |
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253 | |||
254 | #define I2S_FLAG_UDR SPI_SR_UDR |
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255 | #define I2S_FLAG_OVR SPI_SR_OVR |
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256 | #define I2S_FLAG_FRE SPI_SR_FRE |
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257 | |||
258 | #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
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259 | #define I2S_FLAG_BSY SPI_SR_BSY |
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260 | /** |
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261 | * @} |
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262 | */ |
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263 | |||
264 | /** |
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265 | * @} |
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266 | */ |
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267 | |||
268 | /* Exported macro ------------------------------------------------------------*/ |
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269 | /** @defgroup I2S_Exported_macros I2S Exported Macros |
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270 | * @{ |
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271 | */ |
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272 | |||
273 | /** @brief Reset I2S handle state |
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274 | * @param __HANDLE__: specifies the I2S Handle. |
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275 | * @retval None |
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276 | */ |
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277 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
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278 | |||
279 | /** @brief Enable the specified SPI peripheral (in I2S mode). |
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280 | * @param __HANDLE__: specifies the I2S Handle. |
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281 | * @retval None |
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282 | */ |
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283 | #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
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284 | |||
285 | /** @brief Disable the specified SPI peripheral (in I2S mode). |
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286 | * @param __HANDLE__: specifies the I2S Handle. |
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287 | * @retval None |
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288 | */ |
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289 | #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
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290 | |||
291 | /** @brief Enable the specified I2S interrupts. |
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292 | * @param __HANDLE__: specifies the I2S Handle. |
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293 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
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294 | * This parameter can be one of the following values: |
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295 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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296 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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297 | * @arg I2S_IT_ERR: Error interrupt enable |
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298 | * @retval None |
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299 | */ |
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300 | #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
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301 | |||
302 | /** @brief Disable the specified I2S interrupts. |
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303 | * @param __HANDLE__: specifies the I2S Handle. |
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304 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
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305 | * This parameter can be one of the following values: |
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306 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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307 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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308 | * @arg I2S_IT_ERR: Error interrupt enable |
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309 | * @retval None |
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310 | */ |
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311 | #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
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312 | |||
313 | /** @brief Checks if the specified I2S interrupt source is enabled or disabled. |
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314 | * @param __HANDLE__: specifies the I2S Handle. |
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315 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
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316 | * @param __INTERRUPT__: specifies the I2S interrupt source to check. |
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317 | * This parameter can be one of the following values: |
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318 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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319 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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320 | * @arg I2S_IT_ERR: Error interrupt enable |
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321 | * @retval The new state of __IT__ (TRUE or FALSE). |
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322 | */ |
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323 | #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
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324 | |||
325 | /** @brief Checks whether the specified I2S flag is set or not. |
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326 | * @param __HANDLE__: specifies the I2S Handle. |
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327 | * @param __FLAG__: specifies the flag to check. |
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328 | * This parameter can be one of the following values: |
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329 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
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330 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
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331 | * @arg I2S_FLAG_UDR: Underrun flag |
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332 | * @arg I2S_FLAG_OVR: Overrun flag |
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333 | * @arg I2S_FLAG_CHSIDE: Channel Side flag |
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334 | * @arg I2S_FLAG_BSY: Busy flag |
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335 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
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336 | */ |
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337 | #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
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338 | |||
339 | /** @brief Clears the I2S OVR pending flag. |
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340 | * @param __HANDLE__: specifies the I2S Handle. |
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341 | * @retval None |
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342 | */ |
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343 | #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{__IO uint32_t tmpreg = (__HANDLE__)->Instance->DR;\ |
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344 | tmpreg = (__HANDLE__)->Instance->SR;\ |
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345 | UNUSED(tmpreg); \ |
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346 | }while(0) |
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347 | /** @brief Clears the I2S UDR pending flag. |
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348 | * @param __HANDLE__: specifies the I2S Handle. |
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349 | * @retval None |
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350 | */ |
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351 | #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR) |
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352 | /** |
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353 | * @} |
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354 | */ |
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355 | |||
356 | /* Exported functions --------------------------------------------------------*/ |
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357 | /** @addtogroup I2S_Exported_Functions |
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358 | * @{ |
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359 | */ |
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360 | |||
361 | /** @addtogroup I2S_Exported_Functions_Group1 |
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362 | * @{ |
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363 | */ |
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364 | /* Initialization/de-initialization functions ********************************/ |
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365 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
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366 | HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); |
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367 | void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
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368 | void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
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369 | /** |
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370 | * @} |
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371 | */ |
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372 | |||
373 | /** @addtogroup I2S_Exported_Functions_Group2 |
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374 | * @{ |
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375 | */ |
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376 | /* I/O operation functions ***************************************************/ |
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377 | /* Blocking mode: Polling */ |
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378 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
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379 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
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380 | |||
381 | /* Non-Blocking mode: Interrupt */ |
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382 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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383 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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384 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
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385 | |||
386 | /* Non-Blocking mode: DMA */ |
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387 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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388 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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389 | |||
390 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
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391 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
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392 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
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393 | |||
394 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
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395 | void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
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396 | void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
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397 | void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
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398 | void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
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399 | void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
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400 | /** |
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401 | * @} |
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402 | */ |
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403 | |||
404 | /** @addtogroup I2S_Exported_Functions_Group3 |
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405 | * @{ |
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406 | */ |
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407 | /* Peripheral Control and State functions ************************************/ |
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408 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
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409 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
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410 | /** |
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411 | * @} |
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412 | */ |
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413 | |||
414 | /** |
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415 | * @} |
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416 | */ |
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417 | |||
418 | /* Private macros ------------------------------------------------------------*/ |
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419 | /** @defgroup I2S_Private_Macros I2S Private Macros |
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420 | * @{ |
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421 | */ |
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422 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
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423 | ((MODE) == I2S_MODE_SLAVE_RX) || \ |
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424 | ((MODE) == I2S_MODE_MASTER_TX) || \ |
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425 | ((MODE) == I2S_MODE_MASTER_RX)) |
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426 | |||
427 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
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428 | ((STANDARD) == I2S_STANDARD_MSB) || \ |
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429 | ((STANDARD) == I2S_STANDARD_LSB) || \ |
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430 | ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ |
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431 | ((STANDARD) == I2S_STANDARD_PCM_LONG)) |
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432 | |||
433 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
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434 | ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ |
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435 | ((FORMAT) == I2S_DATAFORMAT_24B) || \ |
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436 | ((FORMAT) == I2S_DATAFORMAT_32B)) |
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437 | |||
438 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
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439 | ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
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440 | |||
441 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
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442 | ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ |
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443 | ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
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444 | |||
445 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
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446 | ((CPOL) == I2S_CPOL_HIGH)) |
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447 | /** |
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448 | * @} |
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449 | */ |
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450 | |||
451 | /* Private Fonctions ---------------------------------------------------------*/ |
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452 | /** @defgroup I2S_Private_Functions I2S Private Functions |
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453 | * @{ |
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454 | */ |
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455 | /* Private functions are defined in stm32f1xx_hal_i2s.c file */ |
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456 | /** |
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457 | * @} |
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458 | */ |
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459 | |||
460 | /** |
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461 | * @} |
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462 | */ |
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463 | |||
464 | /** |
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465 | * @} |
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466 | */ |
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467 | #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
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468 | |||
469 | #ifdef __cplusplus |
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470 | } |
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471 | #endif |
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472 | |||
473 | #endif /* __STM32F1xx_HAL_I2S_H */ |
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474 | |||
475 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |