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2 mjames 1
/**
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  ******************************************************************************
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  * @file    stm32f1xx_hal_i2s.h
4
  * @author  MCD Application Team
5 mjames 5
  * @version V1.0.4
6
  * @date    29-April-2016
2 mjames 7
  * @brief   Header file of I2S HAL module.
8
  ******************************************************************************
9
  * @attention
10
  *
5 mjames 11
  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
2 mjames 12
  *
13
  * Redistribution and use in source and binary forms, with or without modification,
14
  * are permitted provided that the following conditions are met:
15
  *   1. Redistributions of source code must retain the above copyright notice,
16
  *      this list of conditions and the following disclaimer.
17
  *   2. Redistributions in binary form must reproduce the above copyright notice,
18
  *      this list of conditions and the following disclaimer in the documentation
19
  *      and/or other materials provided with the distribution.
20
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
21
  *      may be used to endorse or promote products derived from this software
22
  *      without specific prior written permission.
23
  *
24
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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  *
35
  ******************************************************************************
36
  */
37
 
38
/* Define to prevent recursive inclusion -------------------------------------*/
39
#ifndef __STM32F1xx_HAL_I2S_H
40
#define __STM32F1xx_HAL_I2S_H
41
 
42
#ifdef __cplusplus
43
 extern "C" {
44
#endif
45
 
46
#if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)
47
 
48
/* Includes ------------------------------------------------------------------*/
49
#include "stm32f1xx_hal_def.h"  
50
 
51
/** @addtogroup STM32F1xx_HAL_Driver
52
  * @{
53
  */
54
 
55
/** @addtogroup I2S
56
  * @{
57
  */
58
 
59
/* Exported types ------------------------------------------------------------*/
60
/** @defgroup I2S_Exported_Types I2S Exported Types
61
  * @{
62
  */
63
 
64
/**
65
  * @brief I2S Init structure definition  
66
  */
67
typedef struct
68
{
69
  uint32_t Mode;         /*!< Specifies the I2S operating mode.
70
                              This parameter can be a value of @ref I2S_Mode */
71
 
72
  uint32_t Standard;     /*!< Specifies the standard used for the I2S communication.
73
                              This parameter can be a value of @ref I2S_Standard */
74
 
75
  uint32_t DataFormat;   /*!< Specifies the data format for the I2S communication.
76
                              This parameter can be a value of @ref I2S_Data_Format */
77
 
78
  uint32_t MCLKOutput;   /*!< Specifies whether the I2S MCLK output is enabled or not.
79
                              This parameter can be a value of @ref I2S_MCLK_Output */
80
 
81
  uint32_t AudioFreq;    /*!< Specifies the frequency selected for the I2S communication.
82
                              This parameter can be a value of @ref I2S_Audio_Frequency */
83
 
84
  uint32_t CPOL;         /*!< Specifies the idle state of the I2S clock.
85
                              This parameter can be a value of @ref I2S_Clock_Polarity */
86
 
87
}I2S_InitTypeDef;
88
 
89
/**
90
  * @brief  HAL State structures definition
91
  */
92
typedef enum
93
{
94
  HAL_I2S_STATE_RESET      = 0x00,  /*!< I2S not yet initialized or disabled                */
95
  HAL_I2S_STATE_READY      = 0x01,  /*!< I2S initialized and ready for use                  */
96
  HAL_I2S_STATE_BUSY       = 0x02,  /*!< I2S internal process is ongoing                    */  
97
  HAL_I2S_STATE_BUSY_TX    = 0x12,  /*!< Data Transmission process is ongoing               */
98
  HAL_I2S_STATE_BUSY_RX    = 0x22,  /*!< Data Reception process is ongoing                  */
99
  HAL_I2S_STATE_TIMEOUT    = 0x03,  /*!< I2S timeout state                                  */
100
  HAL_I2S_STATE_ERROR      = 0x04   /*!< I2S error state                                    */      
101
}HAL_I2S_StateTypeDef;
102
 
103
/**
104
  * @brief I2S handle Structure definition  
105
  */
106
typedef struct
107
{
108
  SPI_TypeDef                *Instance;    /* I2S registers base address        */
109
 
110
  I2S_InitTypeDef            Init;         /* I2S communication parameters      */
111
 
112
  uint16_t                   *pTxBuffPtr;  /* Pointer to I2S Tx transfer buffer */
113
 
114
  __IO uint16_t              TxXferSize;   /* I2S Tx transfer size              */
115
 
116
  __IO uint16_t              TxXferCount;  /* I2S Tx transfer Counter           */
117
 
118
  uint16_t                   *pRxBuffPtr;  /* Pointer to I2S Rx transfer buffer */
119
 
120
  __IO uint16_t              RxXferSize;   /* I2S Rx transfer size              */
121
 
122
  __IO uint16_t              RxXferCount;  /* I2S Rx transfer counter
123
                                              (This field is initialized at the
124
                                               same value as transfer size at the
125
                                               beginning of the transfer and
126
                                               decremented when a sample is received.
127
                                               NbSamplesReceived = RxBufferSize-RxBufferCount) */
128
 
129
  DMA_HandleTypeDef          *hdmatx;      /* I2S Tx DMA handle parameters      */
130
 
131
  DMA_HandleTypeDef          *hdmarx;      /* I2S Rx DMA handle parameters      */
132
 
133
  __IO HAL_LockTypeDef       Lock;         /* I2S locking object                */
134
 
135
  __IO HAL_I2S_StateTypeDef  State;        /* I2S communication state           */
136
 
137
  __IO uint32_t  ErrorCode;    /* I2S Error code                    */
138
 
139
}I2S_HandleTypeDef;
140
/**
141
  * @}
142
  */
143
 
144
/* Exported constants --------------------------------------------------------*/
145
/** @defgroup I2S_Exported_Constants I2S Exported Constants
146
  * @{
147
  */
148
 
149
/** @defgroup I2S_Error_Codes I2S Error Codes
150
  * @{
151
  */
152
#define HAL_I2S_ERROR_NONE      ((uint32_t)0x00)    /*!< No error                    */
153
#define HAL_I2S_ERROR_UDR       ((uint32_t)0x01)    /*!< I2S Underrun error          */
154
#define HAL_I2S_ERROR_OVR       ((uint32_t)0x02)    /*!< I2S Overrun error           */
155
#define HAL_I2S_ERROR_FRE       ((uint32_t)0x04)    /*!< I2S Frame format error      */
156
#define HAL_I2S_ERROR_DMA       ((uint32_t)0x08)    /*!< DMA transfer error          */
157
 
158
/**
159
  * @}
160
  */
161
 
162
 
163
/** @defgroup I2S_Mode I2S Mode
164
  * @{
165
  */
166
#define I2S_MODE_SLAVE_TX                ((uint32_t) 0x00000000)
167
#define I2S_MODE_SLAVE_RX                ((uint32_t) SPI_I2SCFGR_I2SCFG_0)
168
#define I2S_MODE_MASTER_TX               ((uint32_t) SPI_I2SCFGR_I2SCFG_1)
169
#define I2S_MODE_MASTER_RX               ((uint32_t)(SPI_I2SCFGR_I2SCFG_0 |\
170
                                                     SPI_I2SCFGR_I2SCFG_1))
171
 
172
/**
173
  * @}
174
  */
175
 
176
/** @defgroup I2S_Standard I2S Standard
177
  * @{
178
  */
179
#define I2S_STANDARD_PHILIPS             ((uint32_t) 0x00000000)
180
#define I2S_STANDARD_MSB                 ((uint32_t) SPI_I2SCFGR_I2SSTD_0)
181
#define I2S_STANDARD_LSB                 ((uint32_t) SPI_I2SCFGR_I2SSTD_1)
182
#define I2S_STANDARD_PCM_SHORT           ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\
183
                                                     SPI_I2SCFGR_I2SSTD_1))
184
#define I2S_STANDARD_PCM_LONG            ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\
185
                                                     SPI_I2SCFGR_I2SSTD_1 |\
186
                                                     SPI_I2SCFGR_PCMSYNC))
187
 
188
/**
189
  * @}
190
  */
191
 
192
/** @defgroup I2S_Data_Format I2S Data Format
193
  * @{
194
  */
195
#define I2S_DATAFORMAT_16B               ((uint32_t) 0x00000000)
196
#define I2S_DATAFORMAT_16B_EXTENDED      ((uint32_t) SPI_I2SCFGR_CHLEN)
197
#define I2S_DATAFORMAT_24B               ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
198
#define I2S_DATAFORMAT_32B               ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
199
/**
200
  * @}
201
  */
202
 
203
/** @defgroup I2S_MCLK_Output I2S MCLK Output
204
  * @{
205
  */
206
#define I2S_MCLKOUTPUT_ENABLE           ((uint32_t)SPI_I2SPR_MCKOE)
207
#define I2S_MCLKOUTPUT_DISABLE          ((uint32_t)0x00000000)
208
/**
209
  * @}
210
  */
211
 
212
/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
213
  * @{
214
  */
215
#define I2S_AUDIOFREQ_192K               ((uint32_t)192000)
216
#define I2S_AUDIOFREQ_96K                ((uint32_t)96000)
217
#define I2S_AUDIOFREQ_48K                ((uint32_t)48000)
218
#define I2S_AUDIOFREQ_44K                ((uint32_t)44100)
219
#define I2S_AUDIOFREQ_32K                ((uint32_t)32000)
220
#define I2S_AUDIOFREQ_22K                ((uint32_t)22050)
221
#define I2S_AUDIOFREQ_16K                ((uint32_t)16000)
222
#define I2S_AUDIOFREQ_11K                ((uint32_t)11025)
223
#define I2S_AUDIOFREQ_8K                 ((uint32_t)8000)
224
#define I2S_AUDIOFREQ_DEFAULT            ((uint32_t)2)
225
/**
226
  * @}
227
  */
228
 
229
/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
230
  * @{
231
  */
232
#define I2S_CPOL_LOW                    ((uint32_t)0x00000000)
233
#define I2S_CPOL_HIGH                   ((uint32_t)SPI_I2SCFGR_CKPOL)
234
/**
235
  * @}
236
  */
237
 
238
/** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition
239
  * @{
240
  */
241
#define I2S_IT_TXE                      SPI_CR2_TXEIE
242
#define I2S_IT_RXNE                     SPI_CR2_RXNEIE
243
#define I2S_IT_ERR                      SPI_CR2_ERRIE
244
/**
245
  * @}
246
  */
247
 
248
/** @defgroup I2S_Flag_definition I2S Flag definition
249
  * @{
250
  */
251
#define I2S_FLAG_TXE                    SPI_SR_TXE
252
#define I2S_FLAG_RXNE                   SPI_SR_RXNE
253
 
254
#define I2S_FLAG_UDR                    SPI_SR_UDR
255
#define I2S_FLAG_OVR                    SPI_SR_OVR
256
#define I2S_FLAG_FRE                    SPI_SR_FRE
257
 
258
#define I2S_FLAG_CHSIDE                 SPI_SR_CHSIDE
259
#define I2S_FLAG_BSY                    SPI_SR_BSY
260
/**
261
  * @}
262
  */
263
 
264
/**
265
  * @}
266
  */
267
 
268
/* Exported macro ------------------------------------------------------------*/
269
/** @defgroup I2S_Exported_macros I2S Exported Macros
270
  * @{
271
  */
272
 
273
/** @brief  Reset I2S handle state
274
  * @param  __HANDLE__: specifies the I2S Handle.
275
  * @retval None
276
  */
277
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
278
 
279
/** @brief  Enable the specified SPI peripheral (in I2S mode).
280
  * @param  __HANDLE__: specifies the I2S Handle.
281
  * @retval None
282
  */
283
#define __HAL_I2S_ENABLE(__HANDLE__)    (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
284
 
285
/** @brief  Disable the specified SPI peripheral (in I2S mode).
286
  * @param  __HANDLE__: specifies the I2S Handle.
287
  * @retval None
288
  */
289
#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
290
 
291
/** @brief  Enable the specified I2S interrupts.
292
  * @param  __HANDLE__: specifies the I2S Handle.
293
  * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
294
  *         This parameter can be one of the following values:
295
  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
296
  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
297
  *            @arg I2S_IT_ERR: Error interrupt enable
298
  * @retval None
299
  */  
300
#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__)    (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
301
 
302
/** @brief  Disable the specified I2S interrupts.
303
  * @param  __HANDLE__: specifies the I2S Handle.
304
  * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
305
  *         This parameter can be one of the following values:
306
  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
307
  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
308
  *            @arg I2S_IT_ERR: Error interrupt enable
309
  * @retval None
310
  */
311
#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
312
 
313
/** @brief  Checks if the specified I2S interrupt source is enabled or disabled.
314
  * @param  __HANDLE__: specifies the I2S Handle.
315
  *         This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
316
  * @param  __INTERRUPT__: specifies the I2S interrupt source to check.
317
  *          This parameter can be one of the following values:
318
  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
319
  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
320
  *            @arg I2S_IT_ERR: Error interrupt enable
321
  * @retval The new state of __IT__ (TRUE or FALSE).
322
  */
323
#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
324
 
325
/** @brief  Checks whether the specified I2S flag is set or not.
326
  * @param  __HANDLE__: specifies the I2S Handle.
327
  * @param  __FLAG__: specifies the flag to check.
328
  *         This parameter can be one of the following values:
329
  *            @arg I2S_FLAG_RXNE: Receive buffer not empty flag
330
  *            @arg I2S_FLAG_TXE: Transmit buffer empty flag
331
  *            @arg I2S_FLAG_UDR: Underrun flag
332
  *            @arg I2S_FLAG_OVR: Overrun flag
333
  *            @arg I2S_FLAG_CHSIDE: Channel Side flag
334
  *            @arg I2S_FLAG_BSY: Busy flag
335
  * @retval The new state of __FLAG__ (TRUE or FALSE).
336
  */
337
#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
338
 
339
/** @brief Clears the I2S OVR pending flag.
340
  * @param  __HANDLE__: specifies the I2S Handle.
341
  * @retval None
342
  */                                                                                                  
343
#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{__IO uint32_t tmpreg = (__HANDLE__)->Instance->DR;\
344
                                                             tmpreg = (__HANDLE__)->Instance->SR;\
345
                                                             UNUSED(tmpreg); \
346
                                              }while(0)
347
/** @brief Clears the I2S UDR pending flag.
348
  * @param  __HANDLE__: specifies the I2S Handle.
349
  * @retval None
350
  */
351
#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR)
352
/**
353
  * @}
354
  */
355
 
356
/* Exported functions --------------------------------------------------------*/
357
/** @addtogroup I2S_Exported_Functions
358
  * @{
359
  */
360
 
361
/** @addtogroup I2S_Exported_Functions_Group1
362
  * @{
363
  */
364
/* Initialization/de-initialization functions  ********************************/
365
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
366
HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
367
void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
368
void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
369
/**
370
  * @}
371
  */
372
 
373
/** @addtogroup I2S_Exported_Functions_Group2
374
  * @{
375
  */
376
/* I/O operation functions  ***************************************************/
377
 /* Blocking mode: Polling */
378
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
379
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
380
 
381
 /* Non-Blocking mode: Interrupt */
382
HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
383
HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
384
void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
385
 
386
/* Non-Blocking mode: DMA */
387
HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
388
HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
389
 
390
HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
391
HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
392
HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
393
 
394
/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
395
void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
396
void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
397
void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
398
void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
399
void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
400
/**
401
  * @}
402
  */
403
 
404
/** @addtogroup I2S_Exported_Functions_Group3
405
  * @{
406
  */
407
/* Peripheral Control and State functions  ************************************/
408
HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
409
uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
410
/**
411
  * @}
412
  */
413
 
414
/**
415
  * @}
416
  */
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418
/* Private macros ------------------------------------------------------------*/
419
/** @defgroup I2S_Private_Macros I2S Private Macros
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  * @{
421
  */
422
#define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX)  || \
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                           ((MODE) == I2S_MODE_SLAVE_RX)  || \
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                           ((MODE) == I2S_MODE_MASTER_TX) || \
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                           ((MODE) == I2S_MODE_MASTER_RX))
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#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS)   || \
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                                   ((STANDARD) == I2S_STANDARD_MSB)       || \
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                                   ((STANDARD) == I2S_STANDARD_LSB)       || \
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                                   ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
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                                   ((STANDARD) == I2S_STANDARD_PCM_LONG))
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#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B)          || \
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                                    ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
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                                    ((FORMAT) == I2S_DATAFORMAT_24B)          || \
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                                    ((FORMAT) == I2S_DATAFORMAT_32B))
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438
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
439
                                    ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
440
 
441
#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K)    && \
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                                  ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
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                                  ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
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445
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
446
                           ((CPOL) == I2S_CPOL_HIGH))
447
/**
448
  * @}
449
  */
450
 
451
/* Private Fonctions ---------------------------------------------------------*/
452
/** @defgroup I2S_Private_Functions I2S Private Functions
453
  * @{
454
  */
455
/* Private functions are defined in stm32f1xx_hal_i2s.c file */
456
/**
457
  * @}
458
  */
459
 
460
/**
461
  * @}
462
  */
463
 
464
/**
465
  * @}
466
  */
467
#endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
468
 
469
#ifdef __cplusplus
470
}
471
#endif
472
 
473
#endif /* __STM32F1xx_HAL_I2S_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/