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| Rev | Author | Line No. | Line |
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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_i2c.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of I2C HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 10 | * All rights reserved.</center></h2> |
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| 11 | * |
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| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | |||
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 21 | #ifndef __STM32F1xx_HAL_I2C_H |
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| 22 | #define __STM32F1xx_HAL_I2C_H |
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| 23 | |||
| 24 | #ifdef __cplusplus |
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| 25 | extern "C" { |
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| 26 | #endif |
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| 27 | |||
| 28 | /* Includes ------------------------------------------------------------------*/ |
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| 29 | #include "stm32f1xx_hal_def.h" |
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| 30 | |||
| 31 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 32 | * @{ |
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| 33 | */ |
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| 34 | |||
| 35 | /** @addtogroup I2C |
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| 36 | * @{ |
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| 37 | */ |
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| 38 | |||
| 39 | /* Exported types ------------------------------------------------------------*/ |
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| 40 | /** @defgroup I2C_Exported_Types I2C Exported Types |
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| 41 | * @{ |
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| 42 | */ |
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| 43 | |||
| 44 | /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition |
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| 45 | * @brief I2C Configuration Structure definition |
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| 46 | * @{ |
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| 47 | */ |
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| 48 | typedef struct |
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| 49 | { |
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| 50 | uint32_t ClockSpeed; /*!< Specifies the clock frequency. |
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| 51 | This parameter must be set to a value lower than 400kHz */ |
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| 52 | |||
| 53 | uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle. |
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| 54 | This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ |
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| 55 | |||
| 56 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
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| 57 | This parameter can be a 7-bit or 10-bit address. */ |
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| 58 | |||
| 59 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
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| 60 | This parameter can be a value of @ref I2C_addressing_mode */ |
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| 61 | |||
| 62 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
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| 63 | This parameter can be a value of @ref I2C_dual_addressing_mode */ |
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| 64 | |||
| 65 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
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| 66 | This parameter can be a 7-bit address. */ |
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| 67 | |||
| 68 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
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| 69 | This parameter can be a value of @ref I2C_general_call_addressing_mode */ |
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| 70 | |||
| 71 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
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| 72 | This parameter can be a value of @ref I2C_nostretch_mode */ |
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| 73 | |||
| 74 | } I2C_InitTypeDef; |
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| 75 | |||
| 76 | /** |
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| 77 | * @} |
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| 78 | */ |
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| 79 | |||
| 80 | /** @defgroup HAL_state_structure_definition HAL state structure definition |
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| 81 | * @brief HAL State structure definition |
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| 82 | * @note HAL I2C State value coding follow below described bitmap : |
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| 83 | * b7-b6 Error information |
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| 84 | * 00 : No Error |
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| 85 | * 01 : Abort (Abort user request on going) |
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| 86 | * 10 : Timeout |
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| 87 | * 11 : Error |
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| 88 | * b5 Peripheral initialization status |
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| 89 | * 0 : Reset (Peripheral not initialized) |
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| 90 | * 1 : Init done (Peripheral initialized and ready to use. HAL I2C Init function called) |
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| 91 | * b4 (not used) |
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| 92 | * x : Should be set to 0 |
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| 93 | * b3 |
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| 94 | * 0 : Ready or Busy (No Listen mode ongoing) |
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| 95 | * 1 : Listen (Peripheral in Address Listen Mode) |
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| 96 | * b2 Intrinsic process state |
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| 97 | * 0 : Ready |
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| 98 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
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| 99 | * b1 Rx state |
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| 100 | * 0 : Ready (no Rx operation ongoing) |
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| 101 | * 1 : Busy (Rx operation ongoing) |
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| 102 | * b0 Tx state |
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| 103 | * 0 : Ready (no Tx operation ongoing) |
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| 104 | * 1 : Busy (Tx operation ongoing) |
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| 105 | * @{ |
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| 106 | */ |
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| 107 | typedef enum |
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| 108 | { |
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| 109 | HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ |
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| 110 | HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ |
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| 111 | HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ |
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| 112 | HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ |
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| 113 | HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
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| 114 | HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ |
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| 115 | HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission |
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| 116 | process is ongoing */ |
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| 117 | HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception |
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| 118 | process is ongoing */ |
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| 119 | HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ |
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| 120 | HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ |
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| 121 | HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ |
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| 122 | |||
| 123 | } HAL_I2C_StateTypeDef; |
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| 124 | |||
| 125 | /** |
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| 126 | * @} |
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| 127 | */ |
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| 128 | |||
| 129 | /** @defgroup HAL_mode_structure_definition HAL mode structure definition |
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| 130 | * @brief HAL Mode structure definition |
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| 131 | * @note HAL I2C Mode value coding follow below described bitmap :\n |
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| 132 | * b7 (not used)\n |
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| 133 | * x : Should be set to 0\n |
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| 134 | * b6\n |
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| 135 | * 0 : None\n |
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| 136 | * 1 : Memory (HAL I2C communication is in Memory Mode)\n |
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| 137 | * b5\n |
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| 138 | * 0 : None\n |
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| 139 | * 1 : Slave (HAL I2C communication is in Slave Mode)\n |
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| 140 | * b4\n |
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| 141 | * 0 : None\n |
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| 142 | * 1 : Master (HAL I2C communication is in Master Mode)\n |
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| 143 | * b3-b2-b1-b0 (not used)\n |
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| 144 | * xxxx : Should be set to 0000 |
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| 145 | * @{ |
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| 146 | */ |
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| 147 | typedef enum |
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| 148 | { |
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| 149 | HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ |
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| 150 | HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ |
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| 151 | HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ |
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| 152 | HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ |
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| 153 | |||
| 154 | } HAL_I2C_ModeTypeDef; |
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| 155 | |||
| 156 | /** |
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| 157 | * @} |
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| 158 | */ |
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| 159 | |||
| 160 | /** @defgroup I2C_Error_Code_definition I2C Error Code definition |
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| 161 | * @brief I2C Error Code definition |
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| 162 | * @{ |
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| 163 | */ |
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| 164 | #define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */ |
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| 165 | #define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */ |
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| 166 | #define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */ |
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| 167 | #define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */ |
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| 168 | #define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */ |
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| 169 | #define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
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| 170 | #define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */ |
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| 171 | #define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */ |
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| 172 | #define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */ |
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| 173 | #define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */ |
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| 174 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
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| 175 | #define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */ |
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| 176 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
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| 177 | /** |
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| 178 | * @} |
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| 179 | */ |
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| 180 | |||
| 181 | /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition |
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| 182 | * @brief I2C handle Structure definition |
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| 183 | * @{ |
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| 184 | */ |
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| 185 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
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| 186 | typedef struct __I2C_HandleTypeDef |
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| 187 | #else |
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| 188 | typedef struct |
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| 189 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
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| 190 | { |
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| 191 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
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| 192 | |||
| 193 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
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| 194 | |||
| 195 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
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| 196 | |||
| 197 | uint16_t XferSize; /*!< I2C transfer size */ |
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| 198 | |||
| 199 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
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| 200 | |||
| 201 | __IO uint32_t XferOptions; /*!< I2C transfer options */ |
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| 202 | |||
| 203 | __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode |
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| 204 | context for internal usage */ |
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| 205 | |||
| 206 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
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| 207 | |||
| 208 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
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| 209 | |||
| 210 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
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| 211 | |||
| 212 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
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| 213 | |||
| 214 | __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ |
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| 215 | |||
| 216 | __IO uint32_t ErrorCode; /*!< I2C Error code */ |
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| 217 | |||
| 218 | __IO uint32_t Devaddress; /*!< I2C Target device address */ |
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| 219 | |||
| 220 | __IO uint32_t Memaddress; /*!< I2C Target memory address */ |
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| 221 | |||
| 222 | __IO uint32_t MemaddSize; /*!< I2C Target memory address size */ |
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| 223 | |||
| 224 | __IO uint32_t EventCount; /*!< I2C Event counter */ |
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| 225 | |||
| 226 | |||
| 227 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
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| 228 | void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */ |
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| 229 | void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */ |
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| 230 | void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */ |
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| 231 | void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */ |
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| 232 | void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */ |
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| 233 | void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */ |
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| 234 | void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */ |
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| 235 | void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */ |
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| 236 | void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */ |
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| 237 | |||
| 238 | void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */ |
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| 239 | |||
| 240 | void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */ |
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| 241 | void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */ |
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| 242 | |||
| 243 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
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| 244 | } I2C_HandleTypeDef; |
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| 245 | |||
| 246 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
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| 247 | /** |
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| 248 | * @brief HAL I2C Callback ID enumeration definition |
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| 249 | */ |
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| 250 | typedef enum |
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| 251 | { |
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| 252 | HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ |
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| 253 | HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ |
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| 254 | HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ |
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| 255 | HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ |
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| 256 | HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ |
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| 257 | HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ |
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| 258 | HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ |
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| 259 | HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ |
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| 260 | HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ |
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| 261 | |||
| 262 | HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ |
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| 263 | HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ |
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| 264 | |||
| 265 | } HAL_I2C_CallbackIDTypeDef; |
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| 266 | |||
| 267 | /** |
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| 268 | * @brief HAL I2C Callback pointer definition |
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| 269 | */ |
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| 270 | typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */ |
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| 271 | typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */ |
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| 272 | |||
| 273 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
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| 274 | /** |
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| 275 | * @} |
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| 276 | */ |
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| 277 | |||
| 278 | /** |
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| 279 | * @} |
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| 280 | */ |
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| 281 | /* Exported constants --------------------------------------------------------*/ |
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| 282 | |||
| 283 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
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| 284 | * @{ |
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| 285 | */ |
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| 286 | |||
| 287 | /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode |
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| 288 | * @{ |
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| 289 | */ |
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| 290 | #define I2C_DUTYCYCLE_2 0x00000000U |
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| 291 | #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY |
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| 292 | /** |
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| 293 | * @} |
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| 294 | */ |
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| 295 | |||
| 296 | /** @defgroup I2C_addressing_mode I2C addressing mode |
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| 297 | * @{ |
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| 298 | */ |
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| 299 | #define I2C_ADDRESSINGMODE_7BIT 0x00004000U |
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| 300 | #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U) |
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| 301 | /** |
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| 302 | * @} |
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| 303 | */ |
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| 304 | |||
| 305 | /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode |
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| 306 | * @{ |
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| 307 | */ |
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| 308 | #define I2C_DUALADDRESS_DISABLE 0x00000000U |
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| 309 | #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL |
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| 310 | /** |
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| 311 | * @} |
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| 312 | */ |
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| 313 | |||
| 314 | /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode |
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| 315 | * @{ |
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| 316 | */ |
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| 317 | #define I2C_GENERALCALL_DISABLE 0x00000000U |
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| 318 | #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC |
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| 319 | /** |
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| 320 | * @} |
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| 321 | */ |
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| 322 | |||
| 323 | /** @defgroup I2C_nostretch_mode I2C nostretch mode |
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| 324 | * @{ |
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| 325 | */ |
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| 326 | #define I2C_NOSTRETCH_DISABLE 0x00000000U |
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| 327 | #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
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| 328 | /** |
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| 329 | * @} |
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| 330 | */ |
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| 331 | |||
| 332 | /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size |
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| 333 | * @{ |
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| 334 | */ |
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| 335 | #define I2C_MEMADD_SIZE_8BIT 0x00000001U |
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| 336 | #define I2C_MEMADD_SIZE_16BIT 0x00000010U |
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| 337 | /** |
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| 338 | * @} |
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| 339 | */ |
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| 340 | |||
| 341 | /** @defgroup I2C_XferDirection_definition I2C XferDirection definition |
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| 342 | * @{ |
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| 343 | */ |
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| 344 | #define I2C_DIRECTION_RECEIVE 0x00000000U |
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| 345 | #define I2C_DIRECTION_TRANSMIT 0x00000001U |
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| 346 | /** |
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| 347 | * @} |
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| 348 | */ |
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| 349 | |||
| 350 | /** @defgroup I2C_XferOptions_definition I2C XferOptions definition |
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| 351 | * @{ |
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| 352 | */ |
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| 353 | #define I2C_FIRST_FRAME 0x00000001U |
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| 354 | #define I2C_FIRST_AND_NEXT_FRAME 0x00000002U |
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| 355 | #define I2C_NEXT_FRAME 0x00000004U |
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| 356 | #define I2C_FIRST_AND_LAST_FRAME 0x00000008U |
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| 357 | #define I2C_LAST_FRAME_NO_STOP 0x00000010U |
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| 358 | #define I2C_LAST_FRAME 0x00000020U |
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| 359 | |||
| 360 | /* List of XferOptions in usage of : |
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| 361 | * 1- Restart condition in all use cases (direction change or not) |
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| 362 | */ |
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| 363 | #define I2C_OTHER_FRAME (0x00AA0000U) |
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| 364 | #define I2C_OTHER_AND_LAST_FRAME (0xAA000000U) |
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| 365 | /** |
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| 366 | * @} |
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| 367 | */ |
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| 368 | |||
| 369 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
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| 370 | * @brief I2C Interrupt definition |
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| 371 | * Elements values convention: 0xXXXXXXXX |
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| 372 | * - XXXXXXXX : Interrupt control mask |
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| 373 | * @{ |
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| 374 | */ |
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| 375 | #define I2C_IT_BUF I2C_CR2_ITBUFEN |
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| 376 | #define I2C_IT_EVT I2C_CR2_ITEVTEN |
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| 377 | #define I2C_IT_ERR I2C_CR2_ITERREN |
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| 378 | /** |
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| 379 | * @} |
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| 380 | */ |
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| 381 | |||
| 382 | /** @defgroup I2C_Flag_definition I2C Flag definition |
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| 383 | * @{ |
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| 384 | */ |
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| 385 | |||
| 386 | #define I2C_FLAG_OVR 0x00010800U |
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| 387 | #define I2C_FLAG_AF 0x00010400U |
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| 388 | #define I2C_FLAG_ARLO 0x00010200U |
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| 389 | #define I2C_FLAG_BERR 0x00010100U |
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| 390 | #define I2C_FLAG_TXE 0x00010080U |
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| 391 | #define I2C_FLAG_RXNE 0x00010040U |
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| 392 | #define I2C_FLAG_STOPF 0x00010010U |
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| 393 | #define I2C_FLAG_ADD10 0x00010008U |
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| 394 | #define I2C_FLAG_BTF 0x00010004U |
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| 395 | #define I2C_FLAG_ADDR 0x00010002U |
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| 396 | #define I2C_FLAG_SB 0x00010001U |
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| 397 | #define I2C_FLAG_DUALF 0x00100080U |
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| 398 | #define I2C_FLAG_GENCALL 0x00100010U |
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| 399 | #define I2C_FLAG_TRA 0x00100004U |
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| 400 | #define I2C_FLAG_BUSY 0x00100002U |
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| 401 | #define I2C_FLAG_MSL 0x00100001U |
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| 402 | /** |
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| 403 | * @} |
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| 404 | */ |
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| 405 | |||
| 406 | /** |
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| 407 | * @} |
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| 408 | */ |
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| 409 | |||
| 410 | /* Exported macros -----------------------------------------------------------*/ |
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| 411 | |||
| 412 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
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| 413 | * @{ |
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| 414 | */ |
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| 415 | |||
| 416 | /** @brief Reset I2C handle state. |
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| 417 | * @param __HANDLE__ specifies the I2C Handle. |
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| 418 | * @retval None |
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| 419 | */ |
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| 420 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
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| 421 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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| 422 | (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ |
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| 423 | (__HANDLE__)->MspInitCallback = NULL; \ |
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| 424 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
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| 425 | } while(0) |
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| 426 | #else |
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| 427 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
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| 428 | #endif |
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| 429 | |||
| 430 | /** @brief Enable or disable the specified I2C interrupts. |
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| 431 | * @param __HANDLE__ specifies the I2C Handle. |
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| 432 | * @param __INTERRUPT__ specifies the interrupt source to enable or disable. |
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| 433 | * This parameter can be one of the following values: |
||
| 434 | * @arg I2C_IT_BUF: Buffer interrupt enable |
||
| 435 | * @arg I2C_IT_EVT: Event interrupt enable |
||
| 436 | * @arg I2C_IT_ERR: Error interrupt enable |
||
| 437 | * @retval None |
||
| 438 | */ |
||
| 439 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)) |
||
| 440 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) |
||
| 441 | |||
| 442 | /** @brief Checks if the specified I2C interrupt source is enabled or disabled. |
||
| 443 | * @param __HANDLE__ specifies the I2C Handle. |
||
| 444 | * @param __INTERRUPT__ specifies the I2C interrupt source to check. |
||
| 445 | * This parameter can be one of the following values: |
||
| 446 | * @arg I2C_IT_BUF: Buffer interrupt enable |
||
| 447 | * @arg I2C_IT_EVT: Event interrupt enable |
||
| 448 | * @arg I2C_IT_ERR: Error interrupt enable |
||
| 449 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
||
| 450 | */ |
||
| 451 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
||
| 452 | |||
| 453 | /** @brief Checks whether the specified I2C flag is set or not. |
||
| 454 | * @param __HANDLE__ specifies the I2C Handle. |
||
| 455 | * @param __FLAG__ specifies the flag to check. |
||
| 456 | * This parameter can be one of the following values: |
||
| 457 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag |
||
| 458 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
||
| 459 | * @arg I2C_FLAG_ARLO: Arbitration lost flag |
||
| 460 | * @arg I2C_FLAG_BERR: Bus error flag |
||
| 461 | * @arg I2C_FLAG_TXE: Data register empty flag |
||
| 462 | * @arg I2C_FLAG_RXNE: Data register not empty flag |
||
| 463 | * @arg I2C_FLAG_STOPF: Stop detection flag |
||
| 464 | * @arg I2C_FLAG_ADD10: 10-bit header sent flag |
||
| 465 | * @arg I2C_FLAG_BTF: Byte transfer finished flag |
||
| 466 | * @arg I2C_FLAG_ADDR: Address sent flag |
||
| 467 | * Address matched flag |
||
| 468 | * @arg I2C_FLAG_SB: Start bit flag |
||
| 469 | * @arg I2C_FLAG_DUALF: Dual flag |
||
| 470 | * @arg I2C_FLAG_GENCALL: General call header flag |
||
| 471 | * @arg I2C_FLAG_TRA: Transmitter/Receiver flag |
||
| 472 | * @arg I2C_FLAG_BUSY: Bus busy flag |
||
| 473 | * @arg I2C_FLAG_MSL: Master/Slave flag |
||
| 474 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
||
| 475 | */ |
||
| 476 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \ |
||
| 477 | (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \ |
||
| 478 | (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)) |
||
| 479 | |||
| 480 | /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit. |
||
| 481 | * @param __HANDLE__ specifies the I2C Handle. |
||
| 482 | * @param __FLAG__ specifies the flag to clear. |
||
| 483 | * This parameter can be any combination of the following values: |
||
| 484 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) |
||
| 485 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
||
| 486 | * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) |
||
| 487 | * @arg I2C_FLAG_BERR: Bus error flag |
||
| 488 | * @retval None |
||
| 489 | */ |
||
| 490 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK)) |
||
| 491 | |||
| 492 | /** @brief Clears the I2C ADDR pending flag. |
||
| 493 | * @param __HANDLE__ specifies the I2C Handle. |
||
| 494 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
||
| 495 | * @retval None |
||
| 496 | */ |
||
| 497 | #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \ |
||
| 498 | do{ \ |
||
| 499 | __IO uint32_t tmpreg = 0x00U; \ |
||
| 500 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
||
| 501 | tmpreg = (__HANDLE__)->Instance->SR2; \ |
||
| 502 | UNUSED(tmpreg); \ |
||
| 503 | } while(0) |
||
| 504 | |||
| 505 | /** @brief Clears the I2C STOPF pending flag. |
||
| 506 | * @param __HANDLE__ specifies the I2C Handle. |
||
| 507 | * @retval None |
||
| 508 | */ |
||
| 509 | #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \ |
||
| 510 | do{ \ |
||
| 511 | __IO uint32_t tmpreg = 0x00U; \ |
||
| 512 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
||
| 513 | SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \ |
||
| 514 | UNUSED(tmpreg); \ |
||
| 515 | } while(0) |
||
| 516 | |||
| 517 | /** @brief Enable the specified I2C peripheral. |
||
| 518 | * @param __HANDLE__ specifies the I2C Handle. |
||
| 519 | * @retval None |
||
| 520 | */ |
||
| 521 | #define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE) |
||
| 522 | |||
| 523 | /** @brief Disable the specified I2C peripheral. |
||
| 524 | * @param __HANDLE__ specifies the I2C Handle. |
||
| 525 | * @retval None |
||
| 526 | */ |
||
| 527 | #define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE) |
||
| 528 | |||
| 529 | /** |
||
| 530 | * @} |
||
| 531 | */ |
||
| 532 | |||
| 533 | /* Exported functions --------------------------------------------------------*/ |
||
| 534 | /** @addtogroup I2C_Exported_Functions |
||
| 535 | * @{ |
||
| 536 | */ |
||
| 537 | |||
| 538 | /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
||
| 539 | * @{ |
||
| 540 | */ |
||
| 541 | /* Initialization and de-initialization functions******************************/ |
||
| 542 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
||
| 543 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); |
||
| 544 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
||
| 545 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
||
| 546 | |||
| 547 | /* Callbacks Register/UnRegister functions ***********************************/ |
||
| 548 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
||
| 549 | HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback); |
||
| 550 | HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); |
||
| 551 | |||
| 552 | HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); |
||
| 553 | HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); |
||
| 554 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
||
| 555 | /** |
||
| 556 | * @} |
||
| 557 | */ |
||
| 558 | |||
| 559 | /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions |
||
| 560 | * @{ |
||
| 561 | */ |
||
| 562 | /* IO operation functions ****************************************************/ |
||
| 563 | /******* Blocking mode: Polling */ |
||
| 564 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 565 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 566 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 567 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 568 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 569 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 570 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
||
| 571 | |||
| 572 | /******* Non-Blocking mode: Interrupt */ |
||
| 573 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
||
| 574 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
||
| 575 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
||
| 576 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
||
| 577 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
||
| 578 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
||
| 579 | |||
| 580 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||
| 581 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||
| 582 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||
| 583 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||
| 584 | HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); |
||
| 585 | HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); |
||
| 586 | HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); |
||
| 587 | |||
| 588 | /******* Non-Blocking mode: DMA */ |
||
| 589 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
||
| 590 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
||
| 591 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
||
| 592 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
||
| 593 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
||
| 594 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
||
| 595 | |||
| 596 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||
| 597 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||
| 598 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||
| 599 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||
| 600 | /** |
||
| 601 | * @} |
||
| 602 | */ |
||
| 603 | |||
| 604 | /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
||
| 605 | * @{ |
||
| 606 | */ |
||
| 607 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
||
| 608 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
||
| 609 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
||
| 610 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 611 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 612 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 613 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 614 | void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); |
||
| 615 | void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 616 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 617 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 618 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
||
| 619 | void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 620 | /** |
||
| 621 | * @} |
||
| 622 | */ |
||
| 623 | |||
| 624 | /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions |
||
| 625 | * @{ |
||
| 626 | */ |
||
| 627 | /* Peripheral State, Mode and Error functions *********************************/ |
||
| 628 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
||
| 629 | HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); |
||
| 630 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
||
| 631 | |||
| 632 | /** |
||
| 633 | * @} |
||
| 634 | */ |
||
| 635 | |||
| 636 | /** |
||
| 637 | * @} |
||
| 638 | */ |
||
| 639 | /* Private types -------------------------------------------------------------*/ |
||
| 640 | /* Private variables ---------------------------------------------------------*/ |
||
| 641 | /* Private constants ---------------------------------------------------------*/ |
||
| 642 | /** @defgroup I2C_Private_Constants I2C Private Constants |
||
| 643 | * @{ |
||
| 644 | */ |
||
| 645 | #define I2C_FLAG_MASK 0x0000FFFFU |
||
| 646 | #define I2C_MIN_PCLK_FREQ_STANDARD 2000000U /*!< 2 MHz */ |
||
| 647 | #define I2C_MIN_PCLK_FREQ_FAST 4000000U /*!< 4 MHz */ |
||
| 648 | /** |
||
| 649 | * @} |
||
| 650 | */ |
||
| 651 | |||
| 652 | /* Private macros ------------------------------------------------------------*/ |
||
| 653 | /** @defgroup I2C_Private_Macros I2C Private Macros |
||
| 654 | * @{ |
||
| 655 | */ |
||
| 656 | |||
| 657 | #define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST)) |
||
| 658 | #define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR) |
||
| 659 | #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U) |
||
| 660 | #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U)) |
||
| 661 | #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U)) |
||
| 662 | #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9)) |
||
| 663 | #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \ |
||
| 664 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \ |
||
| 665 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) |
||
| 666 | |||
| 667 | #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0))) |
||
| 668 | #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) |
||
| 669 | |||
| 670 | #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF))) |
||
| 671 | #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0))) |
||
| 672 | #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1)))) |
||
| 673 | |||
| 674 | #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8))) |
||
| 675 | #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF))) |
||
| 676 | |||
| 677 | /** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters |
||
| 678 | * @{ |
||
| 679 | */ |
||
| 680 | #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \ |
||
| 681 | ((CYCLE) == I2C_DUTYCYCLE_16_9)) |
||
| 682 | #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \ |
||
| 683 | ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT)) |
||
| 684 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ |
||
| 685 | ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) |
||
| 686 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ |
||
| 687 | ((CALL) == I2C_GENERALCALL_ENABLE)) |
||
| 688 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ |
||
| 689 | ((STRETCH) == I2C_NOSTRETCH_ENABLE)) |
||
| 690 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
||
| 691 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
||
| 692 | #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U)) |
||
| 693 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U) |
||
| 694 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U) |
||
| 695 | #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ |
||
| 696 | ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ |
||
| 697 | ((REQUEST) == I2C_NEXT_FRAME) || \ |
||
| 698 | ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ |
||
| 699 | ((REQUEST) == I2C_LAST_FRAME) || \ |
||
| 700 | ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ |
||
| 701 | IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) |
||
| 702 | |||
| 703 | #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ |
||
| 704 | ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) |
||
| 705 | |||
| 706 | #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) |
||
| 707 | #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) |
||
| 708 | /** |
||
| 709 | * @} |
||
| 710 | */ |
||
| 711 | |||
| 712 | /** |
||
| 713 | * @} |
||
| 714 | */ |
||
| 715 | |||
| 716 | /* Private functions ---------------------------------------------------------*/ |
||
| 717 | /** @defgroup I2C_Private_Functions I2C Private Functions |
||
| 718 | * @{ |
||
| 719 | */ |
||
| 720 | |||
| 721 | /** |
||
| 722 | * @} |
||
| 723 | */ |
||
| 724 | |||
| 725 | /** |
||
| 726 | * @} |
||
| 727 | */ |
||
| 728 | |||
| 729 | /** |
||
| 730 | * @} |
||
| 731 | */ |
||
| 732 | |||
| 733 | #ifdef __cplusplus |
||
| 734 | } |
||
| 735 | #endif |
||
| 736 | |||
| 737 | |||
| 738 | #endif /* __STM32F1xx_HAL_I2C_H */ |
||
| 739 | |||
| 740 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |