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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_i2c.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of I2C HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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| 10 | * |
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| 11 | * Redistribution and use in source and binary forms, with or without modification, |
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| 12 | * are permitted provided that the following conditions are met: |
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| 13 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 14 | * this list of conditions and the following disclaimer. |
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| 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 16 | * this list of conditions and the following disclaimer in the documentation |
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| 17 | * and/or other materials provided with the distribution. |
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| 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 19 | * may be used to endorse or promote products derived from this software |
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| 20 | * without specific prior written permission. |
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| 21 | * |
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| 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 32 | * |
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| 33 | ****************************************************************************** |
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| 34 | */ |
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| 35 | |||
| 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 37 | #ifndef __STM32F1xx_HAL_I2C_H |
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| 38 | #define __STM32F1xx_HAL_I2C_H |
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| 39 | |||
| 40 | #ifdef __cplusplus |
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| 41 | extern "C" { |
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| 42 | #endif |
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| 43 | |||
| 44 | /* Includes ------------------------------------------------------------------*/ |
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| 45 | #include "stm32f1xx_hal_def.h" |
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| 46 | |||
| 47 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 48 | * @{ |
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| 49 | */ |
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| 50 | |||
| 51 | /** @addtogroup I2C |
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| 52 | * @{ |
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| 53 | */ |
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| 54 | |||
| 55 | /* Exported types ------------------------------------------------------------*/ |
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| 56 | /** @defgroup I2C_Exported_Types I2C Exported Types |
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| 57 | * @{ |
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| 58 | */ |
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| 59 | |||
| 60 | /** |
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| 61 | * @brief I2C Configuration Structure definition |
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| 62 | */ |
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| 63 | typedef struct |
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| 64 | { |
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| 65 | uint32_t ClockSpeed; /*!< Specifies the clock frequency. |
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| 66 | This parameter must be set to a value lower than 400kHz */ |
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| 67 | |||
| 68 | uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle. |
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| 69 | This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ |
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| 70 | |||
| 71 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
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| 72 | This parameter can be a 7-bit or 10-bit address. */ |
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| 73 | |||
| 74 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
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| 75 | This parameter can be a value of @ref I2C_addressing_mode */ |
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| 76 | |||
| 77 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
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| 78 | This parameter can be a value of @ref I2C_dual_addressing_mode */ |
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| 79 | |||
| 80 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
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| 81 | This parameter can be a 7-bit address. */ |
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| 82 | |||
| 83 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
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| 84 | This parameter can be a value of @ref I2C_general_call_addressing_mode */ |
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| 85 | |||
| 86 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
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| 87 | This parameter can be a value of @ref I2C_nostretch_mode */ |
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| 88 | |||
| 89 | }I2C_InitTypeDef; |
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| 90 | |||
| 91 | /** |
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| 92 | * @brief HAL State structure definition |
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| 93 | * @note HAL I2C State value coding follow below described bitmap : |
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| 94 | * b7-b6 Error information |
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| 95 | * 00 : No Error |
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| 96 | * 01 : Abort (Abort user request on going) |
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| 97 | * 10 : Timeout |
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| 98 | * 11 : Error |
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| 99 | * b5 IP initilisation status |
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| 100 | * 0 : Reset (IP not initialized) |
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| 101 | * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called) |
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| 102 | * b4 (not used) |
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| 103 | * x : Should be set to 0 |
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| 104 | * b3 |
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| 105 | * 0 : Ready or Busy (No Listen mode ongoing) |
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| 106 | * 1 : Listen (IP in Address Listen Mode) |
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| 107 | * b2 Intrinsic process state |
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| 108 | * 0 : Ready |
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| 109 | * 1 : Busy (IP busy with some configuration or internal operations) |
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| 110 | * b1 Rx state |
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| 111 | * 0 : Ready (no Rx operation ongoing) |
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| 112 | * 1 : Busy (Rx operation ongoing) |
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| 113 | * b0 Tx state |
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| 114 | * 0 : Ready (no Tx operation ongoing) |
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| 115 | * 1 : Busy (Tx operation ongoing) |
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| 116 | */ |
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| 117 | typedef enum |
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| 118 | { |
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| 119 | HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ |
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| 120 | HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ |
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| 121 | HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ |
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| 122 | HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ |
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| 123 | HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
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| 124 | HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ |
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| 125 | HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission |
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| 126 | process is ongoing */ |
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| 127 | HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception |
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| 128 | process is ongoing */ |
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| 129 | HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ |
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| 130 | HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ |
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| 131 | HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ |
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| 132 | |||
| 133 | }HAL_I2C_StateTypeDef; |
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| 134 | |||
| 135 | /** |
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| 136 | * @brief HAL Mode structure definition |
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| 137 | * @note HAL I2C Mode value coding follow below described bitmap : |
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| 138 | * b7 (not used) |
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| 139 | * x : Should be set to 0 |
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| 140 | * b6 |
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| 141 | * 0 : None |
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| 142 | * 1 : Memory (HAL I2C communication is in Memory Mode) |
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| 143 | * b5 |
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| 144 | * 0 : None |
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| 145 | * 1 : Slave (HAL I2C communication is in Slave Mode) |
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| 146 | * b4 |
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| 147 | * 0 : None |
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| 148 | * 1 : Master (HAL I2C communication is in Master Mode) |
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| 149 | * b3-b2-b1-b0 (not used) |
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| 150 | * xxxx : Should be set to 0000 |
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| 151 | */ |
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| 152 | typedef enum |
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| 153 | { |
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| 154 | HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ |
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| 155 | HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ |
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| 156 | HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ |
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| 157 | HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ |
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| 158 | |||
| 159 | }HAL_I2C_ModeTypeDef; |
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| 160 | |||
| 161 | /** |
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| 162 | * @brief I2C handle Structure definition |
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| 163 | */ |
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| 164 | typedef struct |
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| 165 | { |
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| 166 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
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| 167 | |||
| 168 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
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| 169 | |||
| 170 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
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| 171 | |||
| 172 | uint16_t XferSize; /*!< I2C transfer size */ |
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| 173 | |||
| 174 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
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| 175 | |||
| 176 | __IO uint32_t XferOptions; /*!< I2C transfer options */ |
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| 177 | |||
| 178 | __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode |
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| 179 | context for internal usage */ |
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| 180 | |||
| 181 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
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| 182 | |||
| 183 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
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| 184 | |||
| 185 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
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| 186 | |||
| 187 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
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| 188 | |||
| 189 | __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ |
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| 190 | |||
| 191 | __IO uint32_t ErrorCode; /*!< I2C Error code */ |
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| 192 | |||
| 193 | __IO uint32_t Devaddress; /*!< I2C Target device address */ |
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| 194 | |||
| 195 | __IO uint32_t Memaddress; /*!< I2C Target memory address */ |
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| 196 | |||
| 197 | __IO uint32_t MemaddSize; /*!< I2C Target memory address size */ |
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| 198 | |||
| 199 | __IO uint32_t EventCount; /*!< I2C Event counter */ |
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| 200 | |||
| 201 | }I2C_HandleTypeDef; |
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| 202 | |||
| 203 | /** |
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| 204 | * @} |
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| 205 | */ |
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| 206 | |||
| 207 | /* Exported constants --------------------------------------------------------*/ |
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| 208 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
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| 209 | * @{ |
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| 210 | */ |
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| 211 | |||
| 212 | /** @defgroup I2C_Error_Code I2C Error Code |
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| 213 | * @brief I2C Error Code |
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| 214 | * @{ |
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| 215 | */ |
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| 216 | #define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */ |
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| 217 | #define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */ |
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| 218 | #define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */ |
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| 219 | #define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */ |
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| 220 | #define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */ |
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| 221 | #define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
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| 222 | #define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */ |
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| 223 | /** |
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| 224 | * @} |
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| 225 | */ |
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| 226 | |||
| 227 | /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode |
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| 228 | * @{ |
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| 229 | */ |
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| 230 | #define I2C_DUTYCYCLE_2 0x00000000U |
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| 231 | #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY |
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| 232 | /** |
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| 233 | * @} |
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| 234 | */ |
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| 235 | |||
| 236 | /** @defgroup I2C_addressing_mode I2C addressing mode |
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| 237 | * @{ |
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| 238 | */ |
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| 239 | #define I2C_ADDRESSINGMODE_7BIT 0x00004000U |
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| 240 | #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U) |
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| 241 | /** |
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| 242 | * @} |
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| 243 | */ |
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| 244 | |||
| 245 | /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode |
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| 246 | * @{ |
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| 247 | */ |
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| 248 | #define I2C_DUALADDRESS_DISABLE 0x00000000U |
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| 249 | #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL |
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| 250 | /** |
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| 251 | * @} |
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| 252 | */ |
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| 253 | |||
| 254 | /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode |
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| 255 | * @{ |
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| 256 | */ |
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| 257 | #define I2C_GENERALCALL_DISABLE 0x00000000U |
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| 258 | #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC |
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| 259 | /** |
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| 260 | * @} |
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| 261 | */ |
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| 262 | |||
| 263 | /** @defgroup I2C_nostretch_mode I2C nostretch mode |
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| 264 | * @{ |
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| 265 | */ |
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| 266 | #define I2C_NOSTRETCH_DISABLE 0x00000000U |
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| 267 | #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
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| 268 | /** |
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| 269 | * @} |
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| 270 | */ |
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| 271 | |||
| 272 | /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size |
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| 273 | * @{ |
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| 274 | */ |
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| 275 | #define I2C_MEMADD_SIZE_8BIT 0x00000001U |
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| 276 | #define I2C_MEMADD_SIZE_16BIT 0x00000010U |
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| 277 | /** |
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| 278 | * @} |
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| 279 | */ |
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| 280 | |||
| 281 | /** @defgroup I2C_XferDirection_definition I2C XferDirection definition |
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| 282 | * @{ |
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| 283 | */ |
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| 284 | #define I2C_DIRECTION_RECEIVE 0x00000000U |
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| 285 | #define I2C_DIRECTION_TRANSMIT 0x00000001U |
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| 286 | /** |
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| 287 | * @} |
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| 288 | */ |
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| 289 | |||
| 290 | /** @defgroup I2C_XferOptions_definition I2C XferOptions definition |
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| 291 | * @{ |
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| 292 | */ |
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| 293 | #define I2C_FIRST_FRAME 0x00000001U |
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| 294 | #define I2C_NEXT_FRAME 0x00000002U |
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| 295 | #define I2C_FIRST_AND_LAST_FRAME 0x00000004U |
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| 296 | #define I2C_LAST_FRAME 0x00000008U |
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| 297 | /** |
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| 298 | * @} |
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| 299 | */ |
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| 300 | |||
| 301 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
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| 302 | * @{ |
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| 303 | */ |
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| 304 | #define I2C_IT_BUF I2C_CR2_ITBUFEN |
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| 305 | #define I2C_IT_EVT I2C_CR2_ITEVTEN |
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| 306 | #define I2C_IT_ERR I2C_CR2_ITERREN |
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| 307 | /** |
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| 308 | * @} |
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| 309 | */ |
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| 310 | |||
| 311 | /** @defgroup I2C_Flag_definition I2C Flag definition |
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| 312 | * @{ |
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| 313 | */ |
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| 314 | #define I2C_FLAG_SMBALERT 0x00018000U |
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| 315 | #define I2C_FLAG_TIMEOUT 0x00014000U |
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| 316 | #define I2C_FLAG_PECERR 0x00011000U |
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| 317 | #define I2C_FLAG_OVR 0x00010800U |
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| 318 | #define I2C_FLAG_AF 0x00010400U |
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| 319 | #define I2C_FLAG_ARLO 0x00010200U |
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| 320 | #define I2C_FLAG_BERR 0x00010100U |
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| 321 | #define I2C_FLAG_TXE 0x00010080U |
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| 322 | #define I2C_FLAG_RXNE 0x00010040U |
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| 323 | #define I2C_FLAG_STOPF 0x00010010U |
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| 324 | #define I2C_FLAG_ADD10 0x00010008U |
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| 325 | #define I2C_FLAG_BTF 0x00010004U |
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| 326 | #define I2C_FLAG_ADDR 0x00010002U |
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| 327 | #define I2C_FLAG_SB 0x00010001U |
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| 328 | #define I2C_FLAG_DUALF 0x00100080U |
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| 329 | #define I2C_FLAG_SMBHOST 0x00100040U |
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| 330 | #define I2C_FLAG_SMBDEFAULT 0x00100020U |
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| 331 | #define I2C_FLAG_GENCALL 0x00100010U |
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| 332 | #define I2C_FLAG_TRA 0x00100004U |
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| 333 | #define I2C_FLAG_BUSY 0x00100002U |
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| 334 | #define I2C_FLAG_MSL 0x00100001U |
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| 335 | /** |
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| 336 | * @} |
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| 337 | */ |
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| 338 | |||
| 339 | /** |
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| 340 | * @} |
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| 341 | */ |
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| 342 | |||
| 343 | /* Exported macro ------------------------------------------------------------*/ |
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| 344 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
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| 345 | * @{ |
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| 346 | */ |
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| 347 | |||
| 348 | /** @brief Reset I2C handle state |
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| 349 | * @param __HANDLE__: specifies the I2C Handle. |
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| 350 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
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| 351 | * @retval None |
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| 352 | */ |
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| 353 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
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| 354 | |||
| 355 | /** @brief Enable or disable the specified I2C interrupts. |
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| 356 | * @param __HANDLE__: specifies the I2C Handle. |
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| 357 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
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| 358 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
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| 359 | * This parameter can be one of the following values: |
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| 360 | * @arg I2C_IT_BUF: Buffer interrupt enable |
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| 361 | * @arg I2C_IT_EVT: Event interrupt enable |
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| 362 | * @arg I2C_IT_ERR: Error interrupt enable |
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| 363 | * @retval None |
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| 364 | */ |
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| 365 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
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| 366 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) |
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| 367 | |||
| 368 | /** @brief Checks if the specified I2C interrupt source is enabled or disabled. |
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| 369 | * @param __HANDLE__: specifies the I2C Handle. |
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| 370 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
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| 371 | * @param __INTERRUPT__: specifies the I2C interrupt source to check. |
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| 372 | * This parameter can be one of the following values: |
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| 373 | * @arg I2C_IT_BUF: Buffer interrupt enable |
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| 374 | * @arg I2C_IT_EVT: Event interrupt enable |
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| 375 | * @arg I2C_IT_ERR: Error interrupt enable |
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| 376 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
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| 377 | */ |
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| 378 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
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| 379 | |||
| 380 | /** @brief Checks whether the specified I2C flag is set or not. |
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| 381 | * @param __HANDLE__: specifies the I2C Handle. |
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| 382 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
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| 383 | * @param __FLAG__: specifies the flag to check. |
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| 384 | * This parameter can be one of the following values: |
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| 385 | * @arg I2C_FLAG_SMBALERT: SMBus Alert flag |
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| 386 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag |
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| 387 | * @arg I2C_FLAG_PECERR: PEC error in reception flag |
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| 388 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag |
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| 389 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
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| 390 | * @arg I2C_FLAG_ARLO: Arbitration lost flag |
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| 391 | * @arg I2C_FLAG_BERR: Bus error flag |
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| 392 | * @arg I2C_FLAG_TXE: Data register empty flag |
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| 393 | * @arg I2C_FLAG_RXNE: Data register not empty flag |
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| 394 | * @arg I2C_FLAG_STOPF: Stop detection flag |
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| 395 | * @arg I2C_FLAG_ADD10: 10-bit header sent flag |
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| 396 | * @arg I2C_FLAG_BTF: Byte transfer finished flag |
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| 397 | * @arg I2C_FLAG_ADDR: Address sent flag |
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| 398 | * Address matched flag |
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| 399 | * @arg I2C_FLAG_SB: Start bit flag |
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| 400 | * @arg I2C_FLAG_DUALF: Dual flag |
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| 401 | * @arg I2C_FLAG_SMBHOST: SMBus host header |
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| 402 | * @arg I2C_FLAG_SMBDEFAULT: SMBus default header |
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| 403 | * @arg I2C_FLAG_GENCALL: General call header flag |
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| 404 | * @arg I2C_FLAG_TRA: Transmitter/Receiver flag |
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| 405 | * @arg I2C_FLAG_BUSY: Bus busy flag |
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| 406 | * @arg I2C_FLAG_MSL: Master/Slave flag |
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| 407 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
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| 408 | */ |
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| 409 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)): \ |
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| 410 | ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK))) |
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| 411 | |||
| 412 | /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit. |
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| 413 | * @param __HANDLE__: specifies the I2C Handle. |
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| 414 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
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| 415 | * @param __FLAG__: specifies the flag to clear. |
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| 416 | * This parameter can be any combination of the following values: |
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| 417 | * @arg I2C_FLAG_SMBALERT: SMBus Alert flag |
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| 418 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag |
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| 419 | * @arg I2C_FLAG_PECERR: PEC error in reception flag |
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| 420 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) |
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| 421 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
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| 422 | * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) |
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| 423 | * @arg I2C_FLAG_BERR: Bus error flag |
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| 424 | * @retval None |
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| 425 | */ |
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| 426 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK)) |
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| 427 | |||
| 428 | /** @brief Clears the I2C ADDR pending flag. |
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| 429 | * @param __HANDLE__: specifies the I2C Handle. |
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| 430 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
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| 431 | * @retval None |
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| 432 | */ |
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| 433 | #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \ |
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| 434 | do{ \ |
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| 435 | __IO uint32_t tmpreg = 0x00U; \ |
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| 436 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
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| 437 | tmpreg = (__HANDLE__)->Instance->SR2; \ |
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| 438 | UNUSED(tmpreg); \ |
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| 439 | } while(0U) |
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| 440 | |||
| 441 | /** @brief Clears the I2C STOPF pending flag. |
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| 442 | * @param __HANDLE__: specifies the I2C Handle. |
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| 443 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
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| 444 | * @retval None |
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| 445 | */ |
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| 446 | #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \ |
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| 447 | do{ \ |
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| 448 | __IO uint32_t tmpreg = 0x00U; \ |
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| 449 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
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| 450 | (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE; \ |
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| 451 | UNUSED(tmpreg); \ |
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| 452 | } while(0U) |
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| 453 | |||
| 454 | /** @brief Enable the I2C peripheral. |
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| 455 | * @param __HANDLE__: specifies the I2C Handle. |
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| 456 | * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. |
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| 457 | * @retval None |
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| 458 | */ |
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| 459 | #define __HAL_I2C_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) |
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| 460 | |||
| 461 | /** @brief Disable the I2C peripheral. |
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| 462 | * @param __HANDLE__: specifies the I2C Handle. |
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| 463 | * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. |
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| 464 | * @retval None |
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| 465 | */ |
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| 466 | #define __HAL_I2C_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) |
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| 467 | |||
| 468 | /** |
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| 469 | * @} |
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| 470 | */ |
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| 471 | |||
| 472 | /* Exported functions --------------------------------------------------------*/ |
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| 473 | /** @addtogroup I2C_Exported_Functions |
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| 474 | * @{ |
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| 475 | */ |
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| 476 | |||
| 477 | /** @addtogroup I2C_Exported_Functions_Group1 |
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| 478 | * @{ |
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| 479 | */ |
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| 480 | /* Initialization/de-initialization functions **********************************/ |
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| 481 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
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| 482 | HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c); |
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| 483 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
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| 484 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
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| 485 | /** |
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| 486 | * @} |
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| 487 | */ |
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| 488 | |||
| 489 | /** @addtogroup I2C_Exported_Functions_Group2 |
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| 490 | * @{ |
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| 491 | */ |
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| 492 | /* I/O operation functions *****************************************************/ |
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| 493 | /******* Blocking mode: Polling */ |
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| 494 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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| 495 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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| 496 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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| 497 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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| 498 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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| 499 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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| 500 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
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| 501 | |||
| 502 | /******* Non-Blocking mode: Interrupt */ |
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| 503 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
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| 504 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
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| 505 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
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| 506 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
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| 507 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
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| 508 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
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| 509 | |||
| 510 | HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
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| 511 | HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
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| 512 | HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
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| 513 | HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
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| 514 | HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); |
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| 515 | HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); |
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| 516 | HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); |
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| 517 | |||
| 518 | /******* Non-Blocking mode: DMA */ |
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| 519 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
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| 520 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
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| 521 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
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| 522 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
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| 523 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
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| 524 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
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| 525 | |||
| 526 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
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| 527 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
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| 528 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
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| 529 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 530 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
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| 531 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
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| 532 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
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| 533 | void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); |
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| 534 | void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); |
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| 535 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
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| 536 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
||
| 537 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
||
| 538 | void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); |
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| 539 | /** |
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| 540 | * @} |
||
| 541 | */ |
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| 542 | |||
| 543 | /** @addtogroup I2C_Exported_Functions_Group3 |
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| 544 | * @{ |
||
| 545 | */ |
||
| 546 | /* Peripheral State, Mode and Errors functions *********************************/ |
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| 547 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
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| 548 | HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); |
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| 549 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
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| 550 | |||
| 551 | /** |
||
| 552 | * @} |
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| 553 | */ |
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| 554 | |||
| 555 | /** |
||
| 556 | * @} |
||
| 557 | */ |
||
| 558 | /* Private types -------------------------------------------------------------*/ |
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| 559 | /* Private variables ---------------------------------------------------------*/ |
||
| 560 | /* Private constants ---------------------------------------------------------*/ |
||
| 561 | /** @defgroup I2C_Private_Constants I2C Private Constants |
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| 562 | * @{ |
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| 563 | */ |
||
| 564 | #define I2C_FLAG_MASK 0x0000FFFFU |
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| 565 | #define I2C_MIN_PCLK_FREQ_STANDARD 2000000U /*!< 2 MHz */ |
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| 566 | #define I2C_MIN_PCLK_FREQ_FAST 4000000U /*!< 4 MHz */ |
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| 567 | /** |
||
| 568 | * @} |
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| 569 | */ |
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| 570 | |||
| 571 | /* Private macros ------------------------------------------------------------*/ |
||
| 572 | /** @defgroup I2C_Private_Macros I2C Private Macros |
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| 573 | * @{ |
||
| 574 | */ |
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| 575 | |||
| 576 | #define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST)) |
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| 577 | #define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR) |
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| 578 | #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U) |
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| 579 | #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U)) |
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| 580 | #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U)) |
||
| 581 | #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9)) |
||
| 582 | #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \ |
||
| 583 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \ |
||
| 584 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) |
||
| 585 | |||
| 586 | #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0))) |
||
| 587 | #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) |
||
| 588 | |||
| 589 | #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) |
||
| 590 | #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0x00F0U)))) |
||
| 591 | #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0x00F1U)))) |
||
| 592 | |||
| 593 | #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) |
||
| 594 | #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) |
||
| 595 | |||
| 596 | /** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters |
||
| 597 | * @{ |
||
| 598 | */ |
||
| 599 | #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \ |
||
| 600 | ((CYCLE) == I2C_DUTYCYCLE_16_9)) |
||
| 601 | #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \ |
||
| 602 | ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT)) |
||
| 603 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ |
||
| 604 | ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) |
||
| 605 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ |
||
| 606 | ((CALL) == I2C_GENERALCALL_ENABLE)) |
||
| 607 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ |
||
| 608 | ((STRETCH) == I2C_NOSTRETCH_ENABLE)) |
||
| 609 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
||
| 610 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
||
| 611 | #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0) && ((SPEED) <= 400000U)) |
||
| 612 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (uint32_t)(0xFFFFFC00U)) == 0U) |
||
| 613 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (uint32_t)(0xFFFFFF01U)) == 0U) |
||
| 614 | #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ |
||
| 615 | ((REQUEST) == I2C_NEXT_FRAME) || \ |
||
| 616 | ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ |
||
| 617 | ((REQUEST) == I2C_LAST_FRAME)) |
||
| 618 | /** |
||
| 619 | * @} |
||
| 620 | */ |
||
| 621 | |||
| 622 | /** |
||
| 623 | * @} |
||
| 624 | */ |
||
| 625 | |||
| 626 | /* Private functions ---------------------------------------------------------*/ |
||
| 627 | /** @defgroup I2C_Private_Functions I2C Private Functions |
||
| 628 | * @{ |
||
| 629 | */ |
||
| 630 | |||
| 631 | /** |
||
| 632 | * @} |
||
| 633 | */ |
||
| 634 | |||
| 635 | /** |
||
| 636 | * @} |
||
| 637 | */ |
||
| 638 | |||
| 639 | /** |
||
| 640 | * @} |
||
| 641 | */ |
||
| 642 | |||
| 643 | #ifdef __cplusplus |
||
| 644 | } |
||
| 645 | #endif |
||
| 646 | |||
| 647 | |||
| 648 | #endif /* __STM32F1xx_HAL_I2C_H */ |
||
| 649 | |||
| 650 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |