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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_i2c.h |
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4 | * @author MCD Application Team |
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5 | * @version V1.0.1 |
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6 | * @date 31-July-2015 |
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7 | * @brief Header file of I2C HAL module. |
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8 | ****************************************************************************** |
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9 | * @attention |
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10 | * |
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11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
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12 | * |
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13 | * Redistribution and use in source and binary forms, with or without modification, |
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14 | * are permitted provided that the following conditions are met: |
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15 | * 1. Redistributions of source code must retain the above copyright notice, |
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16 | * this list of conditions and the following disclaimer. |
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17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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18 | * this list of conditions and the following disclaimer in the documentation |
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19 | * and/or other materials provided with the distribution. |
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20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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21 | * may be used to endorse or promote products derived from this software |
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22 | * without specific prior written permission. |
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23 | * |
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24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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34 | * |
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35 | ****************************************************************************** |
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36 | */ |
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37 | |||
38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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39 | #ifndef __STM32F1xx_HAL_I2C_H |
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40 | #define __STM32F1xx_HAL_I2C_H |
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41 | |||
42 | #ifdef __cplusplus |
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43 | extern "C" { |
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44 | #endif |
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45 | |||
46 | /* Includes ------------------------------------------------------------------*/ |
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47 | #include "stm32f1xx_hal_def.h" |
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48 | |||
49 | /** @addtogroup STM32F1xx_HAL_Driver |
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50 | * @{ |
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51 | */ |
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52 | |||
53 | /** @addtogroup I2C |
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54 | * @{ |
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55 | */ |
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56 | |||
57 | /* Exported types ------------------------------------------------------------*/ |
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58 | /** @defgroup I2C_Exported_Types I2C Exported Types |
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59 | * @{ |
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60 | */ |
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61 | |||
62 | /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition |
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63 | * @brief I2C Configuration Structure definition |
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64 | * @{ |
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65 | */ |
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66 | typedef struct |
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67 | { |
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68 | uint32_t ClockSpeed; /*!< Specifies the clock frequency. |
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69 | This parameter must be set to a value lower than 400kHz */ |
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70 | |||
71 | uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle. |
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72 | This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ |
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73 | |||
74 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
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75 | This parameter can be a 7-bit or 10-bit address. */ |
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76 | |||
77 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
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78 | This parameter can be a value of @ref I2C_addressing_mode */ |
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79 | |||
80 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
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81 | This parameter can be a value of @ref I2C_dual_addressing_mode */ |
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82 | |||
83 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
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84 | This parameter can be a 7-bit address. */ |
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85 | |||
86 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
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87 | This parameter can be a value of @ref I2C_general_call_addressing_mode */ |
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88 | |||
89 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
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90 | This parameter can be a value of @ref I2C_nostretch_mode */ |
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91 | |||
92 | }I2C_InitTypeDef; |
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93 | |||
94 | /** |
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95 | * @} |
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96 | */ |
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97 | |||
98 | /** @defgroup HAL_state_structure_definition HAL state structure definition |
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99 | * @brief HAL State structure definition |
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100 | * @{ |
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101 | */ |
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102 | |||
103 | typedef enum |
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104 | { |
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105 | HAL_I2C_STATE_RESET = 0x00, /*!< I2C not yet initialized or disabled */ |
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106 | HAL_I2C_STATE_READY = 0x01, /*!< I2C initialized and ready for use */ |
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107 | HAL_I2C_STATE_BUSY = 0x02, /*!< I2C internal process is ongoing */ |
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108 | HAL_I2C_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
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109 | HAL_I2C_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
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110 | HAL_I2C_STATE_MEM_BUSY_TX = 0x32, /*!< Memory Data Transmission process is ongoing */ |
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111 | HAL_I2C_STATE_MEM_BUSY_RX = 0x42, /*!< Memory Data Reception process is ongoing */ |
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112 | HAL_I2C_STATE_TIMEOUT = 0x03, /*!< I2C timeout state */ |
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113 | HAL_I2C_STATE_ERROR = 0x04 /*!< I2C error state */ |
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114 | |||
115 | }HAL_I2C_StateTypeDef; |
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116 | |||
117 | /** |
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118 | * @} |
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119 | */ |
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120 | |||
121 | /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition |
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122 | * @brief I2C handle Structure definition |
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123 | * @{ |
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124 | */ |
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125 | typedef struct |
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126 | { |
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127 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
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128 | |||
129 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
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130 | |||
131 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
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132 | |||
133 | uint16_t XferSize; /*!< I2C transfer size */ |
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134 | |||
135 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
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136 | |||
137 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
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138 | |||
139 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
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140 | |||
141 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
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142 | |||
143 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
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144 | |||
145 | __IO uint32_t ErrorCode; /* I2C Error code */ |
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146 | |||
147 | }I2C_HandleTypeDef; |
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148 | /** |
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149 | * @} |
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150 | */ |
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151 | |||
152 | /** |
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153 | * @} |
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154 | */ |
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155 | /* Exported constants --------------------------------------------------------*/ |
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156 | |||
157 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
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158 | * @{ |
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159 | */ |
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160 | |||
161 | /** @defgroup I2C_Error_Codes I2C Error Codes |
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162 | * @{ |
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163 | */ |
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164 | |||
165 | #define HAL_I2C_ERROR_NONE ((uint32_t)0x00) /*!< No error */ |
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166 | #define HAL_I2C_ERROR_BERR ((uint32_t)0x01) /*!< BERR error */ |
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167 | #define HAL_I2C_ERROR_ARLO ((uint32_t)0x02) /*!< ARLO error */ |
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168 | #define HAL_I2C_ERROR_AF ((uint32_t)0x04) /*!< AF error */ |
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169 | #define HAL_I2C_ERROR_OVR ((uint32_t)0x08) /*!< OVR error */ |
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170 | #define HAL_I2C_ERROR_DMA ((uint32_t)0x10) /*!< DMA transfer error */ |
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171 | #define HAL_I2C_ERROR_TIMEOUT ((uint32_t)0x20) /*!< Timeout error */ |
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172 | |||
173 | /** |
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174 | * @} |
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175 | */ |
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176 | |||
177 | |||
178 | |||
179 | /** @defgroup I2C_duty_cycle_in_fast_mode I2C Duty Cycle |
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180 | * @{ |
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181 | */ |
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182 | #define I2C_DUTYCYCLE_2 ((uint32_t)0x00000000) |
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183 | #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY |
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184 | /** |
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185 | * @} |
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186 | */ |
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187 | |||
188 | /** @defgroup I2C_addressing_mode I2C addressing mode |
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189 | * @{ |
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190 | */ |
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191 | #define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00004000) |
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192 | #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | ((uint32_t)0x00004000)) |
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193 | /** |
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194 | * @} |
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195 | */ |
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196 | |||
197 | /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode |
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198 | * @{ |
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199 | */ |
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200 | #define I2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000) |
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201 | #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL |
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202 | /** |
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203 | * @} |
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204 | */ |
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205 | |||
206 | /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode |
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207 | * @{ |
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208 | */ |
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209 | #define I2C_GENERALCALL_DISABLE ((uint32_t)0x00000000) |
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210 | #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC |
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211 | /** |
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212 | * @} |
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213 | */ |
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214 | |||
215 | /** @defgroup I2C_nostretch_mode I2C nostretch mode |
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216 | * @{ |
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217 | */ |
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218 | #define I2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000) |
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219 | #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
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220 | /** |
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221 | * @} |
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222 | */ |
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223 | |||
224 | /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size |
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225 | * @{ |
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226 | */ |
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227 | #define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001) |
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228 | #define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000010) |
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229 | /** |
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230 | * @} |
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231 | */ |
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232 | |||
233 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
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234 | * @{ |
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235 | */ |
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236 | #define I2C_IT_BUF I2C_CR2_ITBUFEN |
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237 | #define I2C_IT_EVT I2C_CR2_ITEVTEN |
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238 | #define I2C_IT_ERR I2C_CR2_ITERREN |
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239 | /** |
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240 | * @} |
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241 | */ |
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242 | |||
243 | /** @defgroup I2C_Flag_definition I2C Flag definition |
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244 | * @brief I2C Interrupt definition |
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245 | * - 0001XXXX : Flag control mask for SR1 Register |
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246 | * - 0010XXXX : Flag control mask for SR2 Register |
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247 | * @{ |
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248 | */ |
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249 | #define I2C_FLAG_SMBALERT ((uint32_t)0x00018000) |
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250 | #define I2C_FLAG_TIMEOUT ((uint32_t)0x00014000) |
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251 | #define I2C_FLAG_PECERR ((uint32_t)0x00011000) |
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252 | #define I2C_FLAG_OVR ((uint32_t)0x00010800) |
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253 | #define I2C_FLAG_AF ((uint32_t)0x00010400) |
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254 | #define I2C_FLAG_ARLO ((uint32_t)0x00010200) |
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255 | #define I2C_FLAG_BERR ((uint32_t)0x00010100) |
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256 | #define I2C_FLAG_TXE ((uint32_t)0x00010080) |
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257 | #define I2C_FLAG_RXNE ((uint32_t)0x00010040) |
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258 | #define I2C_FLAG_STOPF ((uint32_t)0x00010010) |
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259 | #define I2C_FLAG_ADD10 ((uint32_t)0x00010008) |
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260 | #define I2C_FLAG_BTF ((uint32_t)0x00010004) |
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261 | #define I2C_FLAG_ADDR ((uint32_t)0x00010002) |
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262 | #define I2C_FLAG_SB ((uint32_t)0x00010001) |
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263 | #define I2C_FLAG_DUALF ((uint32_t)0x00100080) |
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264 | #define I2C_FLAG_SMBHOST ((uint32_t)0x00100040) |
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265 | #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00100020) |
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266 | #define I2C_FLAG_GENCALL ((uint32_t)0x00100010) |
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267 | #define I2C_FLAG_TRA ((uint32_t)0x00100004) |
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268 | #define I2C_FLAG_BUSY ((uint32_t)0x00100002) |
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269 | #define I2C_FLAG_MSL ((uint32_t)0x00100001) |
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270 | #define I2C_FLAG_MASK ((uint32_t)0x0000FFFF) |
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271 | /** |
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272 | * @} |
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273 | */ |
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274 | |||
275 | /** |
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276 | * @} |
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277 | */ |
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278 | |||
279 | /* Exported macros -----------------------------------------------------------*/ |
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280 | |||
281 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
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282 | * @{ |
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283 | */ |
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284 | |||
285 | /** @brief Reset I2C handle state |
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286 | * @param __HANDLE__: specifies the I2C Handle. |
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287 | * @retval None |
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288 | */ |
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289 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
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290 | |||
291 | /** @brief Enable the specified I2C interrupts. |
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292 | * @param __HANDLE__: specifies the I2C Handle. |
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293 | * @param __INTERRUPT__: specifies the interrupt source to enable. |
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294 | * This parameter can be one of the following values: |
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295 | * @arg I2C_IT_BUF: Buffer interrupt enable |
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296 | * @arg I2C_IT_EVT: Event interrupt enable |
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297 | * @arg I2C_IT_ERR: Error interrupt enable |
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298 | * @retval None |
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299 | */ |
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300 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))) |
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301 | |||
302 | /** @brief Disable the specified I2C interrupts. |
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303 | * @param __HANDLE__: specifies the I2C Handle. |
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304 | * @param __INTERRUPT__: specifies the interrupt source to disable. |
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305 | * This parameter can be one of the following values: |
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306 | * @arg I2C_IT_BUF: Buffer interrupt enable |
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307 | * @arg I2C_IT_EVT: Event interrupt enable |
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308 | * @arg I2C_IT_ERR: Error interrupt enable |
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309 | * @retval None |
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310 | */ |
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311 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))) |
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312 | |||
313 | /** @brief Checks if the specified I2C interrupt source is enabled or disabled. |
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314 | * @param __HANDLE__: specifies the I2C Handle. |
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315 | * @param __INTERRUPT__: specifies the I2C interrupt source to check. |
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316 | * This parameter can be one of the following values: |
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317 | * @arg I2C_IT_BUF: Buffer interrupt enable |
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318 | * @arg I2C_IT_EVT: Event interrupt enable |
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319 | * @arg I2C_IT_ERR: Error interrupt enable |
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320 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
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321 | */ |
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322 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
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323 | |||
324 | /** @brief Checks whether the specified I2C flag is set or not. |
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325 | * @param __HANDLE__: specifies the I2C Handle. |
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326 | * @param __FLAG__: specifies the flag to check. |
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327 | * This parameter can be one of the following values: |
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328 | * @arg I2C_FLAG_SMBALERT: SMBus Alert flag |
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329 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag |
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330 | * @arg I2C_FLAG_PECERR: PEC error in reception flag |
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331 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag |
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332 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
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333 | * @arg I2C_FLAG_ARLO: Arbitration lost flag |
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334 | * @arg I2C_FLAG_BERR: Bus error flag |
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335 | * @arg I2C_FLAG_TXE: Data register empty flag |
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336 | * @arg I2C_FLAG_RXNE: Data register not empty flag |
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337 | * @arg I2C_FLAG_STOPF: Stop detection flag |
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338 | * @arg I2C_FLAG_ADD10: 10-bit header sent flag |
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339 | * @arg I2C_FLAG_BTF: Byte transfer finished flag |
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340 | * @arg I2C_FLAG_ADDR: Address sent flag |
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341 | * Address matched flag |
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342 | * @arg I2C_FLAG_SB: Start bit flag |
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343 | * @arg I2C_FLAG_DUALF: Dual flag |
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344 | * @arg I2C_FLAG_SMBHOST: SMBus host header |
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345 | * @arg I2C_FLAG_SMBDEFAULT: SMBus default header |
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346 | * @arg I2C_FLAG_GENCALL: General call header flag |
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347 | * @arg I2C_FLAG_TRA: Transmitter/Receiver flag |
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348 | * @arg I2C_FLAG_BUSY: Bus busy flag |
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349 | * @arg I2C_FLAG_MSL: Master/Slave flag |
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350 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
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351 | */ |
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352 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16)) == 0x01)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)): \ |
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353 | ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK))) |
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354 | |||
355 | /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit. |
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356 | * @param __HANDLE__: specifies the I2C Handle. |
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357 | * @param __FLAG__: specifies the flag to clear. |
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358 | * This parameter can be any combination of the following values: |
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359 | * @arg I2C_FLAG_SMBALERT: SMBus Alert flag |
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360 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag |
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361 | * @arg I2C_FLAG_PECERR: PEC error in reception flag |
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362 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) |
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363 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
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364 | * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) |
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365 | * @arg I2C_FLAG_BERR: Bus error flag |
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366 | * @retval None |
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367 | */ |
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368 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (__HANDLE__)->Instance->SR1 = (((__HANDLE__)->Instance->SR1) & (~((__FLAG__) & I2C_FLAG_MASK))) |
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369 | |||
370 | /** @brief Clears the I2C ADDR pending flag. |
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371 | * @param __HANDLE__: specifies the I2C Handle. |
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372 | * @retval None |
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373 | */ |
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374 | #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \ |
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375 | do{ \ |
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376 | __IO uint32_t tmpreg; \ |
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377 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
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378 | tmpreg = (__HANDLE__)->Instance->SR2; \ |
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379 | UNUSED(tmpreg); \ |
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380 | }while(0) |
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381 | |||
382 | /** @brief Clears the I2C STOPF pending flag. |
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383 | * @param __HANDLE__: specifies the I2C Handle. |
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384 | * @retval None |
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385 | */ |
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386 | #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \ |
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387 | do{ \ |
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388 | __IO uint32_t tmpreg; \ |
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389 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
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390 | tmpreg = (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE; \ |
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391 | UNUSED(tmpreg); \ |
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392 | }while(0) |
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393 | |||
394 | /** @brief Enable the specified I2C peripheral. |
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395 | * @param __HANDLE__: specifies the I2C Handle. |
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396 | * @retval None |
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397 | */ |
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398 | #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
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399 | |||
400 | /** @brief Disable the specified I2C peripheral. |
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401 | * @param __HANDLE__: specifies the I2C Handle. |
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402 | * @retval None |
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403 | */ |
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404 | #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
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405 | |||
406 | /** |
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407 | * @} |
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408 | */ |
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409 | |||
410 | /* Exported functions --------------------------------------------------------*/ |
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411 | /** @addtogroup I2C_Exported_Functions |
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412 | * @{ |
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413 | */ |
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414 | |||
415 | /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
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416 | * @{ |
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417 | */ |
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418 | |||
419 | /* Initialization/de-initialization functions ********************************/ |
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420 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
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421 | HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c); |
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422 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
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423 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
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424 | |||
425 | /** |
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426 | * @} |
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427 | */ |
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428 | |||
429 | /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions |
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430 | * @{ |
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431 | */ |
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432 | |||
433 | /* IO operation functions ****************************************************/ |
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434 | |||
435 | /******* Blocking mode: Polling */ |
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436 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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437 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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438 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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439 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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440 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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441 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
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442 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
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443 | |||
444 | /******* Non-Blocking mode: Interrupt */ |
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445 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
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446 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
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447 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
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448 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
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449 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
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450 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
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451 | |||
452 | /******* Non-Blocking mode: DMA */ |
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453 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
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454 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
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455 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
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456 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
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457 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
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458 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
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459 | /** |
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460 | * @} |
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461 | */ |
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462 | |||
463 | /** @addtogroup I2C_Exported_Functions_Group4 IRQ Handler and Callbacks |
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464 | * @{ |
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465 | */ |
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466 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
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467 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
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468 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
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469 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
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470 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
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471 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
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472 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
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473 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
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474 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
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475 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
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476 | |||
477 | /** |
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478 | * @} |
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479 | */ |
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480 | |||
481 | |||
482 | /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions |
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483 | * @{ |
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484 | */ |
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485 | |||
486 | /* Peripheral State and Errors functions *************************************/ |
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487 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
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488 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
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489 | |||
490 | /** |
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491 | * @} |
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492 | */ |
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493 | |||
494 | /** |
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495 | * @} |
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496 | */ |
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497 | |||
498 | /* Private constants ---------------------------------------------------------*/ |
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499 | /** @defgroup I2C_Private_Constants I2C Private Constants |
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500 | * @{ |
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501 | */ |
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502 | #define I2C_STANDARD_MODE_MAX_CLK ((uint32_t)100000) /* Standard Clock Up to 100kHz */ |
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503 | #define I2C_FAST_MODE_MAX_CLK ((uint32_t)400000) /* Fast Clock up to 400kHz */ |
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504 | /** |
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505 | * @} |
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506 | */ |
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507 | |||
508 | /* Private macros ------------------------------------------------------------*/ |
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509 | /** @defgroup I2C_Private_Macro I2C Private Macros |
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510 | * @{ |
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511 | */ |
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512 | #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \ |
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513 | ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT)) |
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514 | |||
515 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ |
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516 | ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) |
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517 | |||
518 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ |
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519 | ((CALL) == I2C_GENERALCALL_ENABLE)) |
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520 | |||
521 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
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522 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
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523 | |||
524 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ |
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525 | ((STRETCH) == I2C_NOSTRETCH_ENABLE)) |
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526 | |||
527 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (uint32_t)(0xFFFFFC00)) == 0) |
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528 | |||
529 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (uint32_t)(0xFFFFFF01)) == 0) |
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530 | |||
531 | #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0) && ((SPEED) <= I2C_FAST_MODE_MAX_CLK)) |
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532 | |||
533 | #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \ |
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534 | ((CYCLE) == I2C_DUTYCYCLE_16_9)) |
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535 | |||
536 | #define I2C_FREQ_RANGE(__PCLK__) ((__PCLK__)/1000000) |
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537 | #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= I2C_STANDARD_MODE_MAX_CLK) ? ((__FREQRANGE__) + 1) : ((((__FREQRANGE__) * 300) / 1000) + 1)) |
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538 | |||
539 | #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1)) & I2C_CCR_CCR) < 4)? 4:((__PCLK__) / ((__SPEED__) << 1))) |
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540 | #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3)) : (((__PCLK__) / ((__SPEED__) * 25)) | I2C_DUTYCYCLE_16_9)) |
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541 | #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \ |
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542 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0)? 1 : \ |
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543 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) |
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544 | |||
545 | #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8))) |
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546 | #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF)))) |
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547 | |||
548 | #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0))) |
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549 | #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) |
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550 | |||
551 | #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF)))) |
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552 | #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF0)))) |
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553 | #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF1)))) |
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554 | /** |
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555 | * @} |
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556 | */ |
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557 | |||
558 | /* Private Fonctions ---------------------------------------------------------*/ |
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559 | /** @defgroup I2C_Private_Functions I2C Private Functions |
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560 | * @{ |
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561 | */ |
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562 | /* Private functions are defined in stm32f1xx_hal_i2c.c file */ |
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563 | /** |
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564 | * @} |
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565 | */ |
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566 | |||
567 | /** |
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568 | * @} |
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569 | */ |
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570 | |||
571 | /** |
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572 | * @} |
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573 | */ |
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574 | |||
575 | #ifdef __cplusplus |
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576 | } |
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577 | #endif |
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578 | |||
579 | |||
580 | #endif /* __STM32F1xx_HAL_I2C_H */ |
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581 | |||
582 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |