Go to most recent revision | Details | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
||
| 3 | * @file stm32f1xx_hal_flash_ex.h |
||
| 4 | * @author MCD Application Team |
||
| 5 | * @brief Header file of Flash HAL Extended module. |
||
| 6 | ****************************************************************************** |
||
| 7 | * @attention |
||
| 8 | * |
||
| 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||
| 10 | * |
||
| 11 | * Redistribution and use in source and binary forms, with or without modification, |
||
| 12 | * are permitted provided that the following conditions are met: |
||
| 13 | * 1. Redistributions of source code must retain the above copyright notice, |
||
| 14 | * this list of conditions and the following disclaimer. |
||
| 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
||
| 16 | * this list of conditions and the following disclaimer in the documentation |
||
| 17 | * and/or other materials provided with the distribution. |
||
| 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
||
| 19 | * may be used to endorse or promote products derived from this software |
||
| 20 | * without specific prior written permission. |
||
| 21 | * |
||
| 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||
| 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||
| 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||
| 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||
| 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||
| 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||
| 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||
| 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||
| 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||
| 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||
| 32 | * |
||
| 33 | ****************************************************************************** |
||
| 34 | */ |
||
| 35 | |||
| 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
||
| 37 | #ifndef __STM32F1xx_HAL_FLASH_EX_H |
||
| 38 | #define __STM32F1xx_HAL_FLASH_EX_H |
||
| 39 | |||
| 40 | #ifdef __cplusplus |
||
| 41 | extern "C" { |
||
| 42 | #endif |
||
| 43 | |||
| 44 | /* Includes ------------------------------------------------------------------*/ |
||
| 45 | #include "stm32f1xx_hal_def.h" |
||
| 46 | |||
| 47 | /** @addtogroup STM32F1xx_HAL_Driver |
||
| 48 | * @{ |
||
| 49 | */ |
||
| 50 | |||
| 51 | /** @addtogroup FLASHEx |
||
| 52 | * @{ |
||
| 53 | */ |
||
| 54 | |||
| 55 | /** @addtogroup FLASHEx_Private_Constants |
||
| 56 | * @{ |
||
| 57 | */ |
||
| 58 | |||
| 59 | #define FLASH_SIZE_DATA_REGISTER 0x1FFFF7E0U |
||
| 60 | #define OBR_REG_INDEX 1U |
||
| 61 | #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP)) |
||
| 62 | |||
| 63 | /** |
||
| 64 | * @} |
||
| 65 | */ |
||
| 66 | |||
| 67 | /** @addtogroup FLASHEx_Private_Macros |
||
| 68 | * @{ |
||
| 69 | */ |
||
| 70 | |||
| 71 | #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
||
| 72 | |||
| 73 | #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))) |
||
| 74 | |||
| 75 | #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE)) |
||
| 76 | |||
| 77 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1)) |
||
| 78 | |||
| 79 | #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) |
||
| 80 | |||
| 81 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
||
| 82 | |||
| 83 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
||
| 84 | |||
| 85 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
||
| 86 | |||
| 87 | #if defined(FLASH_BANK2_END) |
||
| 88 | #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) |
||
| 89 | #endif /* FLASH_BANK2_END */ |
||
| 90 | |||
| 91 | /* Low Density */ |
||
| 92 | #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) |
||
| 93 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08007FFFU) : \ |
||
| 94 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08003FFFU)) |
||
| 95 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
||
| 96 | |||
| 97 | /* Medium Density */ |
||
| 98 | #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) |
||
| 99 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \ |
||
| 100 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU) : \ |
||
| 101 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFFU) : \ |
||
| 102 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFFU)))) |
||
| 103 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
||
| 104 | |||
| 105 | /* High Density */ |
||
| 106 | #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) |
||
| 107 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFFU) : \ |
||
| 108 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFFU) : \ |
||
| 109 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU))) |
||
| 110 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
||
| 111 | |||
| 112 | /* XL Density */ |
||
| 113 | #if defined(FLASH_BANK2_END) |
||
| 114 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFFU) : \ |
||
| 115 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFFU)) |
||
| 116 | #endif /* FLASH_BANK2_END */ |
||
| 117 | |||
| 118 | /* Connectivity Line */ |
||
| 119 | #if (defined(STM32F105xC) || defined(STM32F107xC)) |
||
| 120 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU) : \ |
||
| 121 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \ |
||
| 122 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU))) |
||
| 123 | #endif /* STM32F105xC || STM32F107xC */ |
||
| 124 | |||
| 125 | #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U)) |
||
| 126 | |||
| 127 | #if defined(FLASH_BANK2_END) |
||
| 128 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ |
||
| 129 | ((BANK) == FLASH_BANK_2) || \ |
||
| 130 | ((BANK) == FLASH_BANK_BOTH)) |
||
| 131 | #else |
||
| 132 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) |
||
| 133 | #endif /* FLASH_BANK2_END */ |
||
| 134 | |||
| 135 | /* Low Density */ |
||
| 136 | #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) |
||
| 137 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \ |
||
| 138 | ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFFU))) |
||
| 139 | |||
| 140 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
||
| 141 | |||
| 142 | /* Medium Density */ |
||
| 143 | #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) |
||
| 144 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \ |
||
| 145 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? \ |
||
| 146 | ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \ |
||
| 147 | ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFFU))))) |
||
| 148 | |||
| 149 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
||
| 150 | |||
| 151 | /* High Density */ |
||
| 152 | #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) |
||
| 153 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? \ |
||
| 154 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? \ |
||
| 155 | ((ADDRESS) <= 0x0805FFFFU) : ((ADDRESS) <= 0x0803FFFFU)))) |
||
| 156 | |||
| 157 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
||
| 158 | |||
| 159 | /* XL Density */ |
||
| 160 | #if defined(FLASH_BANK2_END) |
||
| 161 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? \ |
||
| 162 | ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFFU))) |
||
| 163 | |||
| 164 | #endif /* FLASH_BANK2_END */ |
||
| 165 | |||
| 166 | /* Connectivity Line */ |
||
| 167 | #if (defined(STM32F105xC) || defined(STM32F107xC)) |
||
| 168 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? \ |
||
| 169 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \ |
||
| 170 | ((ADDRESS) <= 0x0801FFFFU) : ((ADDRESS) <= 0x0800FFFFU)))) |
||
| 171 | |||
| 172 | #endif /* STM32F105xC || STM32F107xC */ |
||
| 173 | |||
| 174 | /** |
||
| 175 | * @} |
||
| 176 | */ |
||
| 177 | |||
| 178 | /* Exported types ------------------------------------------------------------*/ |
||
| 179 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
||
| 180 | * @{ |
||
| 181 | */ |
||
| 182 | |||
| 183 | /** |
||
| 184 | * @brief FLASH Erase structure definition |
||
| 185 | */ |
||
| 186 | typedef struct |
||
| 187 | { |
||
| 188 | uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. |
||
| 189 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
||
| 190 | |||
| 191 | uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. |
||
| 192 | This parameter must be a value of @ref FLASHEx_Banks */ |
||
| 193 | |||
| 194 | uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled |
||
| 195 | This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END |
||
| 196 | (x = 1 or 2 depending on devices)*/ |
||
| 197 | |||
| 198 | uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. |
||
| 199 | This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ |
||
| 200 | |||
| 201 | } FLASH_EraseInitTypeDef; |
||
| 202 | |||
| 203 | /** |
||
| 204 | * @brief FLASH Options bytes program structure definition |
||
| 205 | */ |
||
| 206 | typedef struct |
||
| 207 | { |
||
| 208 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
||
| 209 | This parameter can be a value of @ref FLASHEx_OB_Type */ |
||
| 210 | |||
| 211 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
||
| 212 | This parameter can be a value of @ref FLASHEx_OB_WRP_State */ |
||
| 213 | |||
| 214 | uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected |
||
| 215 | This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ |
||
| 216 | |||
| 217 | uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. |
||
| 218 | This parameter must be a value of @ref FLASHEx_Banks */ |
||
| 219 | |||
| 220 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. |
||
| 221 | This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ |
||
| 222 | |||
| 223 | #if defined(FLASH_BANK2_END) |
||
| 224 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
||
| 225 | IWDG / STOP / STDBY / BOOT1 |
||
| 226 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
||
| 227 | @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */ |
||
| 228 | #else |
||
| 229 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
||
| 230 | IWDG / STOP / STDBY |
||
| 231 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
||
| 232 | @ref FLASHEx_OB_nRST_STDBY */ |
||
| 233 | #endif /* FLASH_BANK2_END */ |
||
| 234 | |||
| 235 | uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed |
||
| 236 | This parameter can be a value of @ref FLASHEx_OB_Data_Address */ |
||
| 237 | |||
| 238 | uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA |
||
| 239 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
||
| 240 | } FLASH_OBProgramInitTypeDef; |
||
| 241 | |||
| 242 | /** |
||
| 243 | * @} |
||
| 244 | */ |
||
| 245 | |||
| 246 | /* Exported constants --------------------------------------------------------*/ |
||
| 247 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
||
| 248 | * @{ |
||
| 249 | */ |
||
| 250 | |||
| 251 | /** @defgroup FLASHEx_Constants FLASH Constants |
||
| 252 | * @{ |
||
| 253 | */ |
||
| 254 | |||
| 255 | /** @defgroup FLASHEx_Page_Size Page Size |
||
| 256 | * @{ |
||
| 257 | */ |
||
| 258 | #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) |
||
| 259 | #define FLASH_PAGE_SIZE 0x400U |
||
| 260 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
||
| 261 | /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
||
| 262 | |||
| 263 | #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)) |
||
| 264 | #define FLASH_PAGE_SIZE 0x800U |
||
| 265 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
||
| 266 | /* STM32F101xG || STM32F103xG */ |
||
| 267 | /* STM32F105xC || STM32F107xC */ |
||
| 268 | |||
| 269 | /** |
||
| 270 | * @} |
||
| 271 | */ |
||
| 272 | |||
| 273 | /** @defgroup FLASHEx_Type_Erase Type Erase |
||
| 274 | * @{ |
||
| 275 | */ |
||
| 276 | #define FLASH_TYPEERASE_PAGES 0x00U /*!<Pages erase only*/ |
||
| 277 | #define FLASH_TYPEERASE_MASSERASE 0x02U /*!<Flash mass erase activation*/ |
||
| 278 | |||
| 279 | /** |
||
| 280 | * @} |
||
| 281 | */ |
||
| 282 | |||
| 283 | /** @defgroup FLASHEx_Banks Banks |
||
| 284 | * @{ |
||
| 285 | */ |
||
| 286 | #if defined(FLASH_BANK2_END) |
||
| 287 | #define FLASH_BANK_1 1U /*!< Bank 1 */ |
||
| 288 | #define FLASH_BANK_2 2U /*!< Bank 2 */ |
||
| 289 | #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ |
||
| 290 | |||
| 291 | #else |
||
| 292 | #define FLASH_BANK_1 1U /*!< Bank 1 */ |
||
| 293 | #endif |
||
| 294 | /** |
||
| 295 | * @} |
||
| 296 | */ |
||
| 297 | |||
| 298 | /** |
||
| 299 | * @} |
||
| 300 | */ |
||
| 301 | |||
| 302 | /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants |
||
| 303 | * @{ |
||
| 304 | */ |
||
| 305 | |||
| 306 | /** @defgroup FLASHEx_OB_Type Option Bytes Type |
||
| 307 | * @{ |
||
| 308 | */ |
||
| 309 | #define OPTIONBYTE_WRP 0x01U /*!<WRP option byte configuration*/ |
||
| 310 | #define OPTIONBYTE_RDP 0x02U /*!<RDP option byte configuration*/ |
||
| 311 | #define OPTIONBYTE_USER 0x04U /*!<USER option byte configuration*/ |
||
| 312 | #define OPTIONBYTE_DATA 0x08U /*!<DATA option byte configuration*/ |
||
| 313 | |||
| 314 | /** |
||
| 315 | * @} |
||
| 316 | */ |
||
| 317 | |||
| 318 | /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State |
||
| 319 | * @{ |
||
| 320 | */ |
||
| 321 | #define OB_WRPSTATE_DISABLE 0x00U /*!<Disable the write protection of the desired pages*/ |
||
| 322 | #define OB_WRPSTATE_ENABLE 0x01U /*!<Enable the write protection of the desired pagess*/ |
||
| 323 | |||
| 324 | /** |
||
| 325 | * @} |
||
| 326 | */ |
||
| 327 | |||
| 328 | /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection |
||
| 329 | * @{ |
||
| 330 | */ |
||
| 331 | /* STM32 Low and Medium density devices */ |
||
| 332 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \ |
||
| 333 | || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \ |
||
| 334 | || defined(STM32F103xB) |
||
| 335 | #define OB_WRP_PAGES0TO3 0x00000001U /*!< Write protection of page 0 to 3 */ |
||
| 336 | #define OB_WRP_PAGES4TO7 0x00000002U /*!< Write protection of page 4 to 7 */ |
||
| 337 | #define OB_WRP_PAGES8TO11 0x00000004U /*!< Write protection of page 8 to 11 */ |
||
| 338 | #define OB_WRP_PAGES12TO15 0x00000008U /*!< Write protection of page 12 to 15 */ |
||
| 339 | #define OB_WRP_PAGES16TO19 0x00000010U /*!< Write protection of page 16 to 19 */ |
||
| 340 | #define OB_WRP_PAGES20TO23 0x00000020U /*!< Write protection of page 20 to 23 */ |
||
| 341 | #define OB_WRP_PAGES24TO27 0x00000040U /*!< Write protection of page 24 to 27 */ |
||
| 342 | #define OB_WRP_PAGES28TO31 0x00000080U /*!< Write protection of page 28 to 31 */ |
||
| 343 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
||
| 344 | /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
||
| 345 | |||
| 346 | /* STM32 Medium-density devices */ |
||
| 347 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
||
| 348 | #define OB_WRP_PAGES32TO35 0x00000100U /*!< Write protection of page 32 to 35 */ |
||
| 349 | #define OB_WRP_PAGES36TO39 0x00000200U /*!< Write protection of page 36 to 39 */ |
||
| 350 | #define OB_WRP_PAGES40TO43 0x00000400U /*!< Write protection of page 40 to 43 */ |
||
| 351 | #define OB_WRP_PAGES44TO47 0x00000800U /*!< Write protection of page 44 to 47 */ |
||
| 352 | #define OB_WRP_PAGES48TO51 0x00001000U /*!< Write protection of page 48 to 51 */ |
||
| 353 | #define OB_WRP_PAGES52TO55 0x00002000U /*!< Write protection of page 52 to 55 */ |
||
| 354 | #define OB_WRP_PAGES56TO59 0x00004000U /*!< Write protection of page 56 to 59 */ |
||
| 355 | #define OB_WRP_PAGES60TO63 0x00008000U /*!< Write protection of page 60 to 63 */ |
||
| 356 | #define OB_WRP_PAGES64TO67 0x00010000U /*!< Write protection of page 64 to 67 */ |
||
| 357 | #define OB_WRP_PAGES68TO71 0x00020000U /*!< Write protection of page 68 to 71 */ |
||
| 358 | #define OB_WRP_PAGES72TO75 0x00040000U /*!< Write protection of page 72 to 75 */ |
||
| 359 | #define OB_WRP_PAGES76TO79 0x00080000U /*!< Write protection of page 76 to 79 */ |
||
| 360 | #define OB_WRP_PAGES80TO83 0x00100000U /*!< Write protection of page 80 to 83 */ |
||
| 361 | #define OB_WRP_PAGES84TO87 0x00200000U /*!< Write protection of page 84 to 87 */ |
||
| 362 | #define OB_WRP_PAGES88TO91 0x00400000U /*!< Write protection of page 88 to 91 */ |
||
| 363 | #define OB_WRP_PAGES92TO95 0x00800000U /*!< Write protection of page 92 to 95 */ |
||
| 364 | #define OB_WRP_PAGES96TO99 0x01000000U /*!< Write protection of page 96 to 99 */ |
||
| 365 | #define OB_WRP_PAGES100TO103 0x02000000U /*!< Write protection of page 100 to 103 */ |
||
| 366 | #define OB_WRP_PAGES104TO107 0x04000000U /*!< Write protection of page 104 to 107 */ |
||
| 367 | #define OB_WRP_PAGES108TO111 0x08000000U /*!< Write protection of page 108 to 111 */ |
||
| 368 | #define OB_WRP_PAGES112TO115 0x10000000U /*!< Write protection of page 112 to 115 */ |
||
| 369 | #define OB_WRP_PAGES116TO119 0x20000000U /*!< Write protection of page 115 to 119 */ |
||
| 370 | #define OB_WRP_PAGES120TO123 0x40000000U /*!< Write protection of page 120 to 123 */ |
||
| 371 | #define OB_WRP_PAGES124TO127 0x80000000U /*!< Write protection of page 124 to 127 */ |
||
| 372 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
||
| 373 | |||
| 374 | |||
| 375 | /* STM32 High-density, XL-density and Connectivity line devices */ |
||
| 376 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \ |
||
| 377 | || defined(STM32F101xG) || defined(STM32F103xG) \ |
||
| 378 | || defined(STM32F105xC) || defined(STM32F107xC) |
||
| 379 | #define OB_WRP_PAGES0TO1 0x00000001U /*!< Write protection of page 0 TO 1 */ |
||
| 380 | #define OB_WRP_PAGES2TO3 0x00000002U /*!< Write protection of page 2 TO 3 */ |
||
| 381 | #define OB_WRP_PAGES4TO5 0x00000004U /*!< Write protection of page 4 TO 5 */ |
||
| 382 | #define OB_WRP_PAGES6TO7 0x00000008U /*!< Write protection of page 6 TO 7 */ |
||
| 383 | #define OB_WRP_PAGES8TO9 0x00000010U /*!< Write protection of page 8 TO 9 */ |
||
| 384 | #define OB_WRP_PAGES10TO11 0x00000020U /*!< Write protection of page 10 TO 11 */ |
||
| 385 | #define OB_WRP_PAGES12TO13 0x00000040U /*!< Write protection of page 12 TO 13 */ |
||
| 386 | #define OB_WRP_PAGES14TO15 0x00000080U /*!< Write protection of page 14 TO 15 */ |
||
| 387 | #define OB_WRP_PAGES16TO17 0x00000100U /*!< Write protection of page 16 TO 17 */ |
||
| 388 | #define OB_WRP_PAGES18TO19 0x00000200U /*!< Write protection of page 18 TO 19 */ |
||
| 389 | #define OB_WRP_PAGES20TO21 0x00000400U /*!< Write protection of page 20 TO 21 */ |
||
| 390 | #define OB_WRP_PAGES22TO23 0x00000800U /*!< Write protection of page 22 TO 23 */ |
||
| 391 | #define OB_WRP_PAGES24TO25 0x00001000U /*!< Write protection of page 24 TO 25 */ |
||
| 392 | #define OB_WRP_PAGES26TO27 0x00002000U /*!< Write protection of page 26 TO 27 */ |
||
| 393 | #define OB_WRP_PAGES28TO29 0x00004000U /*!< Write protection of page 28 TO 29 */ |
||
| 394 | #define OB_WRP_PAGES30TO31 0x00008000U /*!< Write protection of page 30 TO 31 */ |
||
| 395 | #define OB_WRP_PAGES32TO33 0x00010000U /*!< Write protection of page 32 TO 33 */ |
||
| 396 | #define OB_WRP_PAGES34TO35 0x00020000U /*!< Write protection of page 34 TO 35 */ |
||
| 397 | #define OB_WRP_PAGES36TO37 0x00040000U /*!< Write protection of page 36 TO 37 */ |
||
| 398 | #define OB_WRP_PAGES38TO39 0x00080000U /*!< Write protection of page 38 TO 39 */ |
||
| 399 | #define OB_WRP_PAGES40TO41 0x00100000U /*!< Write protection of page 40 TO 41 */ |
||
| 400 | #define OB_WRP_PAGES42TO43 0x00200000U /*!< Write protection of page 42 TO 43 */ |
||
| 401 | #define OB_WRP_PAGES44TO45 0x00400000U /*!< Write protection of page 44 TO 45 */ |
||
| 402 | #define OB_WRP_PAGES46TO47 0x00800000U /*!< Write protection of page 46 TO 47 */ |
||
| 403 | #define OB_WRP_PAGES48TO49 0x01000000U /*!< Write protection of page 48 TO 49 */ |
||
| 404 | #define OB_WRP_PAGES50TO51 0x02000000U /*!< Write protection of page 50 TO 51 */ |
||
| 405 | #define OB_WRP_PAGES52TO53 0x04000000U /*!< Write protection of page 52 TO 53 */ |
||
| 406 | #define OB_WRP_PAGES54TO55 0x08000000U /*!< Write protection of page 54 TO 55 */ |
||
| 407 | #define OB_WRP_PAGES56TO57 0x10000000U /*!< Write protection of page 56 TO 57 */ |
||
| 408 | #define OB_WRP_PAGES58TO59 0x20000000U /*!< Write protection of page 58 TO 59 */ |
||
| 409 | #define OB_WRP_PAGES60TO61 0x40000000U /*!< Write protection of page 60 TO 61 */ |
||
| 410 | #define OB_WRP_PAGES62TO127 0x80000000U /*!< Write protection of page 62 TO 127 */ |
||
| 411 | #define OB_WRP_PAGES62TO255 0x80000000U /*!< Write protection of page 62 TO 255 */ |
||
| 412 | #define OB_WRP_PAGES62TO511 0x80000000U /*!< Write protection of page 62 TO 511 */ |
||
| 413 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
||
| 414 | /* STM32F101xG || STM32F103xG */ |
||
| 415 | /* STM32F105xC || STM32F107xC */ |
||
| 416 | |||
| 417 | #define OB_WRP_ALLPAGES 0xFFFFFFFFU /*!< Write protection of all Pages */ |
||
| 418 | |||
| 419 | /* Low Density */ |
||
| 420 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) |
||
| 421 | #define OB_WRP_PAGES0TO31MASK 0x000000FFU |
||
| 422 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
||
| 423 | |||
| 424 | /* Medium Density */ |
||
| 425 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
||
| 426 | #define OB_WRP_PAGES0TO31MASK 0x000000FFU |
||
| 427 | #define OB_WRP_PAGES32TO63MASK 0x0000FF00U |
||
| 428 | #define OB_WRP_PAGES64TO95MASK 0x00FF0000U |
||
| 429 | #define OB_WRP_PAGES96TO127MASK 0xFF000000U |
||
| 430 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
||
| 431 | |||
| 432 | /* High Density */ |
||
| 433 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) |
||
| 434 | #define OB_WRP_PAGES0TO15MASK 0x000000FFU |
||
| 435 | #define OB_WRP_PAGES16TO31MASK 0x0000FF00U |
||
| 436 | #define OB_WRP_PAGES32TO47MASK 0x00FF0000U |
||
| 437 | #define OB_WRP_PAGES48TO255MASK 0xFF000000U |
||
| 438 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
||
| 439 | |||
| 440 | /* XL Density */ |
||
| 441 | #if defined(STM32F101xG) || defined(STM32F103xG) |
||
| 442 | #define OB_WRP_PAGES0TO15MASK 0x000000FFU |
||
| 443 | #define OB_WRP_PAGES16TO31MASK 0x0000FF00U |
||
| 444 | #define OB_WRP_PAGES32TO47MASK 0x00FF0000U |
||
| 445 | #define OB_WRP_PAGES48TO511MASK 0xFF000000U |
||
| 446 | #endif /* STM32F101xG || STM32F103xG */ |
||
| 447 | |||
| 448 | /* Connectivity line devices */ |
||
| 449 | #if defined(STM32F105xC) || defined(STM32F107xC) |
||
| 450 | #define OB_WRP_PAGES0TO15MASK 0x000000FFU |
||
| 451 | #define OB_WRP_PAGES16TO31MASK 0x0000FF00U |
||
| 452 | #define OB_WRP_PAGES32TO47MASK 0x00FF0000U |
||
| 453 | #define OB_WRP_PAGES48TO127MASK 0xFF000000U |
||
| 454 | #endif /* STM32F105xC || STM32F107xC */ |
||
| 455 | |||
| 456 | /** |
||
| 457 | * @} |
||
| 458 | */ |
||
| 459 | |||
| 460 | /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection |
||
| 461 | * @{ |
||
| 462 | */ |
||
| 463 | #define OB_RDP_LEVEL_0 ((uint8_t)0xA5) |
||
| 464 | #define OB_RDP_LEVEL_1 ((uint8_t)0x00) |
||
| 465 | /** |
||
| 466 | * @} |
||
| 467 | */ |
||
| 468 | |||
| 469 | /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog |
||
| 470 | * @{ |
||
| 471 | */ |
||
| 472 | #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ |
||
| 473 | #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ |
||
| 474 | /** |
||
| 475 | * @} |
||
| 476 | */ |
||
| 477 | |||
| 478 | /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP |
||
| 479 | * @{ |
||
| 480 | */ |
||
| 481 | #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ |
||
| 482 | #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ |
||
| 483 | /** |
||
| 484 | * @} |
||
| 485 | */ |
||
| 486 | |||
| 487 | /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY |
||
| 488 | * @{ |
||
| 489 | */ |
||
| 490 | #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ |
||
| 491 | #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ |
||
| 492 | /** |
||
| 493 | * @} |
||
| 494 | */ |
||
| 495 | |||
| 496 | #if defined(FLASH_BANK2_END) |
||
| 497 | /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 |
||
| 498 | * @{ |
||
| 499 | */ |
||
| 500 | #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */ |
||
| 501 | #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */ |
||
| 502 | /** |
||
| 503 | * @} |
||
| 504 | */ |
||
| 505 | #endif /* FLASH_BANK2_END */ |
||
| 506 | |||
| 507 | /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address |
||
| 508 | * @{ |
||
| 509 | */ |
||
| 510 | #define OB_DATA_ADDRESS_DATA0 0x1FFFF804U |
||
| 511 | #define OB_DATA_ADDRESS_DATA1 0x1FFFF806U |
||
| 512 | /** |
||
| 513 | * @} |
||
| 514 | */ |
||
| 515 | |||
| 516 | /** |
||
| 517 | * @} |
||
| 518 | */ |
||
| 519 | |||
| 520 | /** @addtogroup FLASHEx_Constants |
||
| 521 | * @{ |
||
| 522 | */ |
||
| 523 | |||
| 524 | /** @defgroup FLASH_Flag_definition Flag definition |
||
| 525 | * @brief Flag definition |
||
| 526 | * @{ |
||
| 527 | */ |
||
| 528 | #if defined(FLASH_BANK2_END) |
||
| 529 | #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */ |
||
| 530 | #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */ |
||
| 531 | #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */ |
||
| 532 | #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */ |
||
| 533 | |||
| 534 | #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */ |
||
| 535 | #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */ |
||
| 536 | #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */ |
||
| 537 | #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */ |
||
| 538 | |||
| 539 | #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16U) /*!< FLASH Bank2 Busy flag */ |
||
| 540 | #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16U) /*!< FLASH Bank2 Programming error flag */ |
||
| 541 | #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16U) /*!< FLASH Bank2 Write protected error flag */ |
||
| 542 | #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16U) /*!< FLASH Bank2 End of Operation flag */ |
||
| 543 | |||
| 544 | #else |
||
| 545 | |||
| 546 | #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ |
||
| 547 | #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */ |
||
| 548 | #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */ |
||
| 549 | #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */ |
||
| 550 | |||
| 551 | #endif |
||
| 552 | #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8U | FLASH_OBR_OPTERR)) /*!< Option Byte Error */ |
||
| 553 | /** |
||
| 554 | * @} |
||
| 555 | */ |
||
| 556 | |||
| 557 | /** @defgroup FLASH_Interrupt_definition Interrupt definition |
||
| 558 | * @brief FLASH Interrupt definition |
||
| 559 | * @{ |
||
| 560 | */ |
||
| 561 | #if defined(FLASH_BANK2_END) |
||
| 562 | #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */ |
||
| 563 | #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */ |
||
| 564 | |||
| 565 | #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */ |
||
| 566 | #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */ |
||
| 567 | |||
| 568 | #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16U) /*!< End of FLASH Operation Interrupt source Bank2 */ |
||
| 569 | #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16U) /*!< Error Interrupt source Bank2 */ |
||
| 570 | |||
| 571 | #else |
||
| 572 | |||
| 573 | #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ |
||
| 574 | #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */ |
||
| 575 | |||
| 576 | #endif |
||
| 577 | /** |
||
| 578 | * @} |
||
| 579 | */ |
||
| 580 | |||
| 581 | /** |
||
| 582 | * @} |
||
| 583 | */ |
||
| 584 | |||
| 585 | |||
| 586 | /** |
||
| 587 | * @} |
||
| 588 | */ |
||
| 589 | |||
| 590 | /* Exported macro ------------------------------------------------------------*/ |
||
| 591 | /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros |
||
| 592 | * @{ |
||
| 593 | */ |
||
| 594 | |||
| 595 | /** @defgroup FLASH_Interrupt Interrupt |
||
| 596 | * @brief macros to handle FLASH interrupts |
||
| 597 | * @{ |
||
| 598 | */ |
||
| 599 | |||
| 600 | #if defined(FLASH_BANK2_END) |
||
| 601 | /** |
||
| 602 | * @brief Enable the specified FLASH interrupt. |
||
| 603 | * @param __INTERRUPT__ FLASH interrupt |
||
| 604 | * This parameter can be any combination of the following values: |
||
| 605 | * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 |
||
| 606 | * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 |
||
| 607 | * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 |
||
| 608 | * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 |
||
| 609 | * @retval none |
||
| 610 | */ |
||
| 611 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \ |
||
| 612 | /* Enable Bank1 IT */ \ |
||
| 613 | SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \ |
||
| 614 | /* Enable Bank2 IT */ \ |
||
| 615 | SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \ |
||
| 616 | } while(0U) |
||
| 617 | |||
| 618 | /** |
||
| 619 | * @brief Disable the specified FLASH interrupt. |
||
| 620 | * @param __INTERRUPT__ FLASH interrupt |
||
| 621 | * This parameter can be any combination of the following values: |
||
| 622 | * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 |
||
| 623 | * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 |
||
| 624 | * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 |
||
| 625 | * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 |
||
| 626 | * @retval none |
||
| 627 | */ |
||
| 628 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \ |
||
| 629 | /* Disable Bank1 IT */ \ |
||
| 630 | CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \ |
||
| 631 | /* Disable Bank2 IT */ \ |
||
| 632 | CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \ |
||
| 633 | } while(0U) |
||
| 634 | |||
| 635 | /** |
||
| 636 | * @brief Get the specified FLASH flag status. |
||
| 637 | * @param __FLAG__ specifies the FLASH flag to check. |
||
| 638 | * This parameter can be one of the following values: |
||
| 639 | * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 |
||
| 640 | * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 |
||
| 641 | * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 |
||
| 642 | * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 |
||
| 643 | * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 |
||
| 644 | * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 |
||
| 645 | * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 |
||
| 646 | * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 |
||
| 647 | * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match |
||
| 648 | * @retval The new state of __FLAG__ (SET or RESET). |
||
| 649 | */ |
||
| 650 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ |
||
| 651 | (FLASH->OBR & FLASH_OBR_OPTERR) : \ |
||
| 652 | ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \ |
||
| 653 | (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \ |
||
| 654 | (FLASH->SR2 & ((__FLAG__) >> 16U)))) |
||
| 655 | |||
| 656 | /** |
||
| 657 | * @brief Clear the specified FLASH flag. |
||
| 658 | * @param __FLAG__ specifies the FLASH flags to clear. |
||
| 659 | * This parameter can be any combination of the following values: |
||
| 660 | * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 |
||
| 661 | * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 |
||
| 662 | * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 |
||
| 663 | * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 |
||
| 664 | * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 |
||
| 665 | * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 |
||
| 666 | * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 |
||
| 667 | * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 |
||
| 668 | * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match |
||
| 669 | * @retval none |
||
| 670 | */ |
||
| 671 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ |
||
| 672 | /* Clear FLASH_FLAG_OPTVERR flag */ \ |
||
| 673 | if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ |
||
| 674 | { \ |
||
| 675 | CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ |
||
| 676 | } \ |
||
| 677 | else { \ |
||
| 678 | /* Clear Flag in Bank1 */ \ |
||
| 679 | if (((__FLAG__) & SR_FLAG_MASK) != RESET) \ |
||
| 680 | { \ |
||
| 681 | FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \ |
||
| 682 | } \ |
||
| 683 | /* Clear Flag in Bank2 */ \ |
||
| 684 | if (((__FLAG__) >> 16U) != RESET) \ |
||
| 685 | { \ |
||
| 686 | FLASH->SR2 = ((__FLAG__) >> 16U); \ |
||
| 687 | } \ |
||
| 688 | } \ |
||
| 689 | } while(0U) |
||
| 690 | #else |
||
| 691 | /** |
||
| 692 | * @brief Enable the specified FLASH interrupt. |
||
| 693 | * @param __INTERRUPT__ FLASH interrupt |
||
| 694 | * This parameter can be any combination of the following values: |
||
| 695 | * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt |
||
| 696 | * @arg @ref FLASH_IT_ERR Error Interrupt |
||
| 697 | * @retval none |
||
| 698 | */ |
||
| 699 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) |
||
| 700 | |||
| 701 | /** |
||
| 702 | * @brief Disable the specified FLASH interrupt. |
||
| 703 | * @param __INTERRUPT__ FLASH interrupt |
||
| 704 | * This parameter can be any combination of the following values: |
||
| 705 | * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt |
||
| 706 | * @arg @ref FLASH_IT_ERR Error Interrupt |
||
| 707 | * @retval none |
||
| 708 | */ |
||
| 709 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__)) |
||
| 710 | |||
| 711 | /** |
||
| 712 | * @brief Get the specified FLASH flag status. |
||
| 713 | * @param __FLAG__ specifies the FLASH flag to check. |
||
| 714 | * This parameter can be one of the following values: |
||
| 715 | * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag |
||
| 716 | * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag |
||
| 717 | * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag |
||
| 718 | * @arg @ref FLASH_FLAG_BSY FLASH Busy flag |
||
| 719 | * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match |
||
| 720 | * @retval The new state of __FLAG__ (SET or RESET). |
||
| 721 | */ |
||
| 722 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ |
||
| 723 | (FLASH->OBR & FLASH_OBR_OPTERR) : \ |
||
| 724 | (FLASH->SR & (__FLAG__))) |
||
| 725 | /** |
||
| 726 | * @brief Clear the specified FLASH flag. |
||
| 727 | * @param __FLAG__ specifies the FLASH flags to clear. |
||
| 728 | * This parameter can be any combination of the following values: |
||
| 729 | * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag |
||
| 730 | * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag |
||
| 731 | * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag |
||
| 732 | * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match |
||
| 733 | * @retval none |
||
| 734 | */ |
||
| 735 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ |
||
| 736 | /* Clear FLASH_FLAG_OPTVERR flag */ \ |
||
| 737 | if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ |
||
| 738 | { \ |
||
| 739 | CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ |
||
| 740 | } \ |
||
| 741 | else { \ |
||
| 742 | /* Clear Flag in Bank1 */ \ |
||
| 743 | FLASH->SR = (__FLAG__); \ |
||
| 744 | } \ |
||
| 745 | } while(0U) |
||
| 746 | |||
| 747 | #endif |
||
| 748 | |||
| 749 | /** |
||
| 750 | * @} |
||
| 751 | */ |
||
| 752 | |||
| 753 | /** |
||
| 754 | * @} |
||
| 755 | */ |
||
| 756 | |||
| 757 | /* Exported functions --------------------------------------------------------*/ |
||
| 758 | /** @addtogroup FLASHEx_Exported_Functions |
||
| 759 | * @{ |
||
| 760 | */ |
||
| 761 | |||
| 762 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
||
| 763 | * @{ |
||
| 764 | */ |
||
| 765 | /* IO operation functions *****************************************************/ |
||
| 766 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
||
| 767 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
||
| 768 | |||
| 769 | /** |
||
| 770 | * @} |
||
| 771 | */ |
||
| 772 | |||
| 773 | /** @addtogroup FLASHEx_Exported_Functions_Group2 |
||
| 774 | * @{ |
||
| 775 | */ |
||
| 776 | /* Peripheral Control functions ***********************************************/ |
||
| 777 | HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); |
||
| 778 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
||
| 779 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
||
| 780 | uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress); |
||
| 781 | /** |
||
| 782 | * @} |
||
| 783 | */ |
||
| 784 | |||
| 785 | /** |
||
| 786 | * @} |
||
| 787 | */ |
||
| 788 | |||
| 789 | /** |
||
| 790 | * @} |
||
| 791 | */ |
||
| 792 | |||
| 793 | /** |
||
| 794 | * @} |
||
| 795 | */ |
||
| 796 | #ifdef __cplusplus |
||
| 797 | } |
||
| 798 | #endif |
||
| 799 | |||
| 800 | #endif /* __STM32F1xx_HAL_FLASH_EX_H */ |
||
| 801 | |||
| 802 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |