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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_flash_ex.h |
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4 | * @author MCD Application Team |
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5 | * @version V1.0.1 |
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6 | * @date 31-July-2015 |
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7 | * @brief Header file of Flash HAL Extended module. |
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8 | ****************************************************************************** |
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9 | * @attention |
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10 | * |
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11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
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12 | * |
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13 | * Redistribution and use in source and binary forms, with or without modification, |
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14 | * are permitted provided that the following conditions are met: |
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15 | * 1. Redistributions of source code must retain the above copyright notice, |
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16 | * this list of conditions and the following disclaimer. |
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17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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18 | * this list of conditions and the following disclaimer in the documentation |
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19 | * and/or other materials provided with the distribution. |
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20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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21 | * may be used to endorse or promote products derived from this software |
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22 | * without specific prior written permission. |
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23 | * |
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24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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34 | * |
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35 | ****************************************************************************** |
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36 | */ |
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37 | |||
38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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39 | #ifndef __STM32F1xx_HAL_FLASH_EX_H |
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40 | #define __STM32F1xx_HAL_FLASH_EX_H |
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41 | |||
42 | #ifdef __cplusplus |
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43 | extern "C" { |
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44 | #endif |
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45 | |||
46 | /* Includes ------------------------------------------------------------------*/ |
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47 | #include "stm32f1xx_hal_def.h" |
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48 | |||
49 | /** @addtogroup STM32F1xx_HAL_Driver |
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50 | * @{ |
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51 | */ |
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52 | |||
53 | /** @addtogroup FLASHEx |
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54 | * @{ |
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55 | */ |
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56 | |||
57 | /** @addtogroup FLASHEx_Private_Constants |
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58 | * @{ |
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59 | */ |
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60 | |||
61 | #define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFFF7E0) |
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62 | #define OBR_REG_INDEX ((uint32_t)1) |
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63 | #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP)) |
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64 | |||
65 | /** |
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66 | * @} |
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67 | */ |
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68 | |||
69 | /** @addtogroup FLASHEx_Private_Macros |
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70 | * @{ |
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71 | */ |
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72 | |||
73 | #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
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74 | |||
75 | #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))) |
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76 | |||
77 | #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE)) |
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78 | |||
79 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1)) |
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80 | |||
81 | #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) |
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82 | |||
83 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
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84 | |||
85 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
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86 | |||
87 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
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88 | |||
89 | #if defined(FLASH_BANK2_END) |
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90 | #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) |
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91 | #endif /* FLASH_BANK2_END */ |
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92 | |||
93 | /* Low Density */ |
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94 | #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) |
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95 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \ |
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96 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF)) |
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97 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
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98 | |||
99 | /* Medium Density */ |
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100 | #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) |
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101 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \ |
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102 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF) : \ |
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103 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \ |
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104 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF)))) |
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105 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
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106 | |||
107 | /* High Density */ |
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108 | #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) |
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109 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFF) : \ |
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110 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFF) : \ |
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111 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF))) |
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112 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
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113 | |||
114 | /* XL Density */ |
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115 | #if defined(FLASH_BANK2_END) |
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116 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFF) : \ |
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117 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFF)) |
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118 | #endif /* FLASH_BANK2_END */ |
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119 | |||
120 | /* Connectivity Line */ |
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121 | #if (defined(STM32F105xC) || defined(STM32F107xC)) |
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122 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF) : \ |
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123 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \ |
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124 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF))) |
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125 | #endif /* STM32F105xC || STM32F107xC */ |
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126 | |||
127 | #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000)) |
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128 | |||
129 | #if defined(FLASH_BANK2_END) |
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130 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ |
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131 | ((BANK) == FLASH_BANK_2) || \ |
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132 | ((BANK) == FLASH_BANK_BOTH)) |
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133 | #else |
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134 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) |
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135 | #endif /* FLASH_BANK2_END */ |
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136 | |||
137 | /* Low Density */ |
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138 | #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) |
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139 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \ |
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140 | ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFF))) |
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141 | |||
142 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
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143 | |||
144 | /* Medium Density */ |
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145 | #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) |
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146 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \ |
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147 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? \ |
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148 | ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \ |
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149 | ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFF))))) |
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150 | |||
151 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
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152 | |||
153 | /* High Density */ |
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154 | #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) |
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155 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? \ |
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156 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? \ |
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157 | ((ADDRESS) <= 0x0805FFFF) : ((ADDRESS) <= 0x0803FFFF)))) |
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158 | |||
159 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
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160 | |||
161 | /* XL Density */ |
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162 | #if defined(FLASH_BANK2_END) |
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163 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? \ |
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164 | ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFF))) |
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165 | |||
166 | #endif /* FLASH_BANK2_END */ |
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167 | |||
168 | /* Connectivity Line */ |
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169 | #if (defined(STM32F105xC) || defined(STM32F107xC)) |
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170 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? \ |
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171 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \ |
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172 | ((ADDRESS) <= 0x0801FFFF) : ((ADDRESS) <= 0x0800FFFF)))) |
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173 | |||
174 | #endif /* STM32F105xC || STM32F107xC */ |
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175 | |||
176 | /** |
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177 | * @} |
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178 | */ |
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179 | |||
180 | /* Exported types ------------------------------------------------------------*/ |
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181 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
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182 | * @{ |
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183 | */ |
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184 | |||
185 | /** |
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186 | * @brief FLASH Erase structure definition |
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187 | */ |
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188 | typedef struct |
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189 | { |
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190 | uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. |
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191 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
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192 | |||
193 | uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. |
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194 | This parameter must be a value of @ref FLASHEx_Banks */ |
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195 | |||
196 | uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled |
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197 | This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END |
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198 | (x = 1 or 2 depending on devices)*/ |
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199 | |||
200 | uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. |
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201 | This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ |
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202 | |||
203 | } FLASH_EraseInitTypeDef; |
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204 | |||
205 | /** |
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206 | * @brief FLASH Options bytes program structure definition |
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207 | */ |
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208 | typedef struct |
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209 | { |
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210 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
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211 | This parameter can be a value of @ref FLASHEx_OB_Type */ |
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212 | |||
213 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
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214 | This parameter can be a value of @ref FLASHEx_OB_WRP_State */ |
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215 | |||
216 | uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected |
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217 | This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ |
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218 | |||
219 | uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. |
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220 | This parameter must be a value of @ref FLASHEx_Banks */ |
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221 | |||
222 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. |
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223 | This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ |
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224 | |||
225 | #if defined(FLASH_BANK2_END) |
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226 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
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227 | IWDG / STOP / STDBY / BOOT1 |
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228 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
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229 | @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */ |
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230 | #else |
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231 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
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232 | IWDG / STOP / STDBY |
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233 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
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234 | @ref FLASHEx_OB_nRST_STDBY */ |
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235 | #endif /* FLASH_BANK2_END */ |
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236 | |||
237 | uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be prgrammed |
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238 | This parameter can be a value of @ref FLASHEx_OB_Data_Address */ |
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239 | |||
240 | uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA |
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241 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
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242 | |||
243 | } FLASH_OBProgramInitTypeDef; |
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244 | |||
245 | /** |
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246 | * @} |
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247 | */ |
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248 | |||
249 | /* Exported constants --------------------------------------------------------*/ |
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250 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
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251 | * @{ |
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252 | */ |
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253 | |||
254 | /** @defgroup FLASHEx_Constants FLASH Constants |
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255 | * @{ |
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256 | */ |
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257 | |||
258 | /** @defgroup FLASHEx_Page_Size Page Size |
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259 | * @{ |
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260 | */ |
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261 | #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) |
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262 | #define FLASH_PAGE_SIZE ((uint32_t)0x400) |
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263 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
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264 | /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
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265 | |||
266 | #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)) |
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267 | #define FLASH_PAGE_SIZE ((uint32_t)0x800) |
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268 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
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269 | /* STM32F101xG || STM32F103xG */ |
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270 | /* STM32F105xC || STM32F107xC */ |
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271 | |||
272 | /** |
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273 | * @} |
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274 | */ |
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275 | |||
276 | /** @defgroup FLASHEx_Type_Erase Type Erase |
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277 | * @{ |
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278 | */ |
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279 | #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/ |
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280 | #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x02) /*!<Flash mass erase activation*/ |
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281 | |||
282 | /** |
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283 | * @} |
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284 | */ |
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285 | |||
286 | /** @defgroup FLASHEx_Banks Banks |
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287 | * @{ |
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288 | */ |
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289 | #if defined(FLASH_BANK2_END) |
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290 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
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291 | #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */ |
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292 | #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ |
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293 | |||
294 | #else |
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295 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
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296 | #endif |
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297 | /** |
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298 | * @} |
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299 | */ |
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300 | |||
301 | /** |
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302 | * @} |
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303 | */ |
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304 | |||
305 | /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants |
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306 | * @{ |
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307 | */ |
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308 | |||
309 | /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State |
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310 | * @{ |
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311 | */ |
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312 | #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/ |
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313 | #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/ |
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314 | |||
315 | /** |
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316 | * @} |
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317 | */ |
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318 | |||
319 | /** @defgroup FLASHEx_OB_Type Option Bytes Type |
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320 | * @{ |
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321 | */ |
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322 | #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/ |
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323 | #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/ |
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324 | #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/ |
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325 | #define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/ |
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326 | |||
327 | /** |
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328 | * @} |
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329 | */ |
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330 | |||
331 | |||
332 | /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection |
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333 | * @{ |
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334 | */ |
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335 | #define OB_RDP_LEVEL_0 ((uint8_t)0xA5) |
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336 | #define OB_RDP_LEVEL_1 ((uint8_t)0x00) |
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337 | /** |
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338 | * @} |
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339 | */ |
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340 | |||
341 | /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP |
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342 | * @{ |
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343 | */ |
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344 | #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ |
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345 | #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ |
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346 | /** |
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347 | * @} |
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348 | */ |
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349 | |||
350 | /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY |
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351 | * @{ |
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352 | */ |
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353 | #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ |
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354 | #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ |
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355 | /** |
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356 | * @} |
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357 | */ |
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358 | |||
359 | /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog |
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360 | * @{ |
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361 | */ |
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362 | #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ |
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363 | #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ |
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364 | /** |
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365 | * @} |
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366 | */ |
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367 | |||
368 | #if defined(FLASH_BANK2_END) |
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369 | /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 |
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370 | * @{ |
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371 | */ |
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372 | #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */ |
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373 | #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */ |
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374 | /** |
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375 | * @} |
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376 | */ |
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377 | #endif /* FLASH_BANK2_END */ |
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378 | |||
379 | /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address |
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380 | * @{ |
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381 | */ |
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382 | #define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804) |
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383 | #define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806) |
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384 | /** |
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385 | * @} |
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386 | */ |
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387 | |||
388 | /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection |
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389 | * @{ |
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390 | */ |
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391 | /* STM32 Low and Medium density devices */ |
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392 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \ |
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393 | || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \ |
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394 | || defined(STM32F103xB) |
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395 | #define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /*!< Write protection of page 0 to 3 */ |
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396 | #define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /*!< Write protection of page 4 to 7 */ |
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397 | #define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /*!< Write protection of page 8 to 11 */ |
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398 | #define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /*!< Write protection of page 12 to 15 */ |
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399 | #define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /*!< Write protection of page 16 to 19 */ |
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400 | #define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /*!< Write protection of page 20 to 23 */ |
||
401 | #define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /*!< Write protection of page 24 to 27 */ |
||
402 | #define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /*!< Write protection of page 28 to 31 */ |
||
403 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
||
404 | /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
||
405 | |||
406 | /* STM32 Medium-density devices */ |
||
407 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
||
408 | #define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /*!< Write protection of page 32 to 35 */ |
||
409 | #define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /*!< Write protection of page 36 to 39 */ |
||
410 | #define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /*!< Write protection of page 40 to 43 */ |
||
411 | #define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /*!< Write protection of page 44 to 47 */ |
||
412 | #define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /*!< Write protection of page 48 to 51 */ |
||
413 | #define OB_WRP_PAGES52TO55 ((uint32_t)0x00002000) /*!< Write protection of page 52 to 55 */ |
||
414 | #define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /*!< Write protection of page 56 to 59 */ |
||
415 | #define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /*!< Write protection of page 60 to 63 */ |
||
416 | #define OB_WRP_PAGES64TO67 ((uint32_t)0x00010000) /*!< Write protection of page 64 to 67 */ |
||
417 | #define OB_WRP_PAGES68TO71 ((uint32_t)0x00020000) /*!< Write protection of page 68 to 71 */ |
||
418 | #define OB_WRP_PAGES72TO75 ((uint32_t)0x00040000) /*!< Write protection of page 72 to 75 */ |
||
419 | #define OB_WRP_PAGES76TO79 ((uint32_t)0x00080000) /*!< Write protection of page 76 to 79 */ |
||
420 | #define OB_WRP_PAGES80TO83 ((uint32_t)0x00100000) /*!< Write protection of page 80 to 83 */ |
||
421 | #define OB_WRP_PAGES84TO87 ((uint32_t)0x00200000) /*!< Write protection of page 84 to 87 */ |
||
422 | #define OB_WRP_PAGES88TO91 ((uint32_t)0x00400000) /*!< Write protection of page 88 to 91 */ |
||
423 | #define OB_WRP_PAGES92TO95 ((uint32_t)0x00800000) /*!< Write protection of page 92 to 95 */ |
||
424 | #define OB_WRP_PAGES96TO99 ((uint32_t)0x01000000) /*!< Write protection of page 96 to 99 */ |
||
425 | #define OB_WRP_PAGES100TO103 ((uint32_t)0x02000000) /*!< Write protection of page 100 to 103 */ |
||
426 | #define OB_WRP_PAGES104TO107 ((uint32_t)0x04000000) /*!< Write protection of page 104 to 107 */ |
||
427 | #define OB_WRP_PAGES108TO111 ((uint32_t)0x08000000) /*!< Write protection of page 108 to 111 */ |
||
428 | #define OB_WRP_PAGES112TO115 ((uint32_t)0x10000000) /*!< Write protection of page 112 to 115 */ |
||
429 | #define OB_WRP_PAGES116TO119 ((uint32_t)0x20000000) /*!< Write protection of page 115 to 119 */ |
||
430 | #define OB_WRP_PAGES120TO123 ((uint32_t)0x40000000) /*!< Write protection of page 120 to 123 */ |
||
431 | #define OB_WRP_PAGES124TO127 ((uint32_t)0x80000000) /*!< Write protection of page 124 to 127 */ |
||
432 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
||
433 | |||
434 | |||
435 | /* STM32 High-density, XL-density and Connectivity line devices */ |
||
436 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \ |
||
437 | || defined(STM32F101xG) || defined(STM32F103xG) \ |
||
438 | || defined(STM32F105xC) || defined(STM32F107xC) |
||
439 | #define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /*!< Write protection of page 0 TO 1 */ |
||
440 | #define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /*!< Write protection of page 2 TO 3 */ |
||
441 | #define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /*!< Write protection of page 4 TO 5 */ |
||
442 | #define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /*!< Write protection of page 6 TO 7 */ |
||
443 | #define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /*!< Write protection of page 8 TO 9 */ |
||
444 | #define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /*!< Write protection of page 10 TO 11 */ |
||
445 | #define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /*!< Write protection of page 12 TO 13 */ |
||
446 | #define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /*!< Write protection of page 14 TO 15 */ |
||
447 | #define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /*!< Write protection of page 16 TO 17 */ |
||
448 | #define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /*!< Write protection of page 18 TO 19 */ |
||
449 | #define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /*!< Write protection of page 20 TO 21 */ |
||
450 | #define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /*!< Write protection of page 22 TO 23 */ |
||
451 | #define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /*!< Write protection of page 24 TO 25 */ |
||
452 | #define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /*!< Write protection of page 26 TO 27 */ |
||
453 | #define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /*!< Write protection of page 28 TO 29 */ |
||
454 | #define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /*!< Write protection of page 30 TO 31 */ |
||
455 | #define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /*!< Write protection of page 32 TO 33 */ |
||
456 | #define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /*!< Write protection of page 34 TO 35 */ |
||
457 | #define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /*!< Write protection of page 36 TO 37 */ |
||
458 | #define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /*!< Write protection of page 38 TO 39 */ |
||
459 | #define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /*!< Write protection of page 40 TO 41 */ |
||
460 | #define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /*!< Write protection of page 42 TO 43 */ |
||
461 | #define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /*!< Write protection of page 44 TO 45 */ |
||
462 | #define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /*!< Write protection of page 46 TO 47 */ |
||
463 | #define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /*!< Write protection of page 48 TO 49 */ |
||
464 | #define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /*!< Write protection of page 50 TO 51 */ |
||
465 | #define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /*!< Write protection of page 52 TO 53 */ |
||
466 | #define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /*!< Write protection of page 54 TO 55 */ |
||
467 | #define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /*!< Write protection of page 56 TO 57 */ |
||
468 | #define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /*!< Write protection of page 58 TO 59 */ |
||
469 | #define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /*!< Write protection of page 60 TO 61 */ |
||
470 | #define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 127 */ |
||
471 | #define OB_WRP_PAGES62TO255 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 255 */ |
||
472 | #define OB_WRP_PAGES62TO511 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 511 */ |
||
473 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
||
474 | /* STM32F101xG || STM32F103xG */ |
||
475 | /* STM32F105xC || STM32F107xC */ |
||
476 | |||
477 | #define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */ |
||
478 | |||
479 | /* Low Density */ |
||
480 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) |
||
481 | #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF) |
||
482 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
||
483 | |||
484 | /* Medium Density */ |
||
485 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
||
486 | #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF) |
||
487 | #define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00) |
||
488 | #define OB_WRP_PAGES64TO95MASK ((uint32_t)0x00FF0000) |
||
489 | #define OB_WRP_PAGES96TO127MASK ((uint32_t)0xFF000000) |
||
490 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
||
491 | |||
492 | /* High Density */ |
||
493 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) |
||
494 | #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) |
||
495 | #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) |
||
496 | #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) |
||
497 | #define OB_WRP_PAGES48TO255MASK ((uint32_t)0xFF000000) |
||
498 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
||
499 | |||
500 | /* XL Density */ |
||
501 | #if defined(STM32F101xG) || defined(STM32F103xG) |
||
502 | #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) |
||
503 | #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) |
||
504 | #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) |
||
505 | #define OB_WRP_PAGES48TO511MASK ((uint32_t)0xFF000000) |
||
506 | #endif /* STM32F101xG || STM32F103xG */ |
||
507 | |||
508 | /* Connectivity line devices */ |
||
509 | #if defined(STM32F105xC) || defined(STM32F107xC) |
||
510 | #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) |
||
511 | #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) |
||
512 | #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) |
||
513 | #define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000) |
||
514 | #endif /* STM32F105xC || STM32F107xC */ |
||
515 | |||
516 | /** |
||
517 | * @} |
||
518 | */ |
||
519 | |||
520 | /** |
||
521 | * @} |
||
522 | */ |
||
523 | |||
524 | /** @addtogroup FLASHEx_Constants |
||
525 | * @{ |
||
526 | */ |
||
527 | |||
528 | /** @defgroup FLASH_Flag_definition Flag definition |
||
529 | * @brief Flag definition |
||
530 | * @{ |
||
531 | */ |
||
532 | #if defined(FLASH_BANK2_END) |
||
533 | #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */ |
||
534 | #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */ |
||
535 | #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */ |
||
536 | #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */ |
||
537 | |||
538 | #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */ |
||
539 | #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */ |
||
540 | #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */ |
||
541 | #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */ |
||
542 | |||
543 | #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16) /*!< FLASH Bank2 Busy flag */ |
||
544 | #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16) /*!< FLASH Bank2 Programming error flag */ |
||
545 | #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16) /*!< FLASH Bank2 Write protected error flag */ |
||
546 | #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16) /*!< FLASH Bank2 End of Operation flag */ |
||
547 | |||
548 | #else |
||
549 | |||
550 | #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ |
||
551 | #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */ |
||
552 | #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */ |
||
553 | #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */ |
||
554 | |||
555 | #endif |
||
556 | #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8 | FLASH_OBR_OPTERR)) /*!< Option Byte Error */ |
||
557 | /** |
||
558 | * @} |
||
559 | */ |
||
560 | |||
561 | /** @defgroup FLASH_Interrupt_definition Interrupt definition |
||
562 | * @brief FLASH Interrupt definition |
||
563 | * @{ |
||
564 | */ |
||
565 | #if defined(FLASH_BANK2_END) |
||
566 | #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */ |
||
567 | #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */ |
||
568 | |||
569 | #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */ |
||
570 | #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */ |
||
571 | |||
572 | #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16) /*!< End of FLASH Operation Interrupt source Bank2 */ |
||
573 | #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16) /*!< Error Interrupt source Bank2 */ |
||
574 | |||
575 | #else |
||
576 | |||
577 | #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ |
||
578 | #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */ |
||
579 | |||
580 | #endif |
||
581 | /** |
||
582 | * @} |
||
583 | */ |
||
584 | |||
585 | /** |
||
586 | * @} |
||
587 | */ |
||
588 | |||
589 | |||
590 | /** |
||
591 | * @} |
||
592 | */ |
||
593 | |||
594 | |||
595 | /* Exported macro ------------------------------------------------------------*/ |
||
596 | /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros |
||
597 | * @{ |
||
598 | */ |
||
599 | |||
600 | /** @defgroup FLASH_Interrupt Interrupt |
||
601 | * @brief macros to handle FLASH interrupts |
||
602 | * @{ |
||
603 | */ |
||
604 | |||
605 | #if defined(FLASH_BANK2_END) |
||
606 | /** |
||
607 | * @brief Enable the specified FLASH interrupt. |
||
608 | * @param __INTERRUPT__ : FLASH interrupt |
||
609 | * This parameter can be any combination of the following values: |
||
610 | * @arg FLASH_IT_EOP_BANK1: End of FLASH Operation Interrupt on bank1 |
||
611 | * @arg FLASH_IT_ERR_BANK1: Error Interrupt on bank1 |
||
612 | * @arg FLASH_IT_EOP_BANK2: End of FLASH Operation Interrupt on bank2 |
||
613 | * @arg FLASH_IT_ERR_BANK2: Error Interrupt on bank2 |
||
614 | * @retval none |
||
615 | */ |
||
616 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \ |
||
617 | /* Enable Bank1 IT */ \ |
||
618 | SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \ |
||
619 | /* Enable Bank2 IT */ \ |
||
620 | SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \ |
||
621 | } while(0) |
||
622 | |||
623 | /** |
||
624 | * @brief Disable the specified FLASH interrupt. |
||
625 | * @param __INTERRUPT__ : FLASH interrupt |
||
626 | * This parameter can be any combination of the following values: |
||
627 | * @arg FLASH_IT_EOP_BANK1: End of FLASH Operation Interrupt on bank1 |
||
628 | * @arg FLASH_IT_ERR_BANK1: Error Interrupt on bank1 |
||
629 | * @arg FLASH_IT_EOP_BANK2: End of FLASH Operation Interrupt on bank2 |
||
630 | * @arg FLASH_IT_ERR_BANK2: Error Interrupt on bank2 |
||
631 | * @retval none |
||
632 | */ |
||
633 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \ |
||
634 | /* Disable Bank1 IT */ \ |
||
635 | CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \ |
||
636 | /* Disable Bank2 IT */ \ |
||
637 | CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \ |
||
638 | } while(0) |
||
639 | |||
640 | /** |
||
641 | * @brief Get the specified FLASH flag status. |
||
642 | * @param __FLAG__: specifies the FLASH flag to check. |
||
643 | * This parameter can be one of the following values: |
||
644 | * @arg FLASH_FLAG_EOP_BANK1 : FLASH End of Operation flag on bank1 |
||
645 | * @arg FLASH_FLAG_WRPERR_BANK1: FLASH Write protected error flag on bank1 |
||
646 | * @arg FLASH_FLAG_PGERR_BANK1 : FLASH Programming error flag on bank1 |
||
647 | * @arg FLASH_FLAG_BSY_BANK1 : FLASH Busy flag on bank1 |
||
648 | * @arg FLASH_FLAG_EOP_BANK2 : FLASH End of Operation flag on bank2 |
||
649 | * @arg FLASH_FLAG_WRPERR_BANK2: FLASH Write protected error flag on bank2 |
||
650 | * @arg FLASH_FLAG_PGERR_BANK2 : FLASH Programming error flag on bank2 |
||
651 | * @arg FLASH_FLAG_BSY_BANK2 : FLASH Busy flag on bank2 |
||
652 | * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match |
||
653 | * @retval The new state of __FLAG__ (SET or RESET). |
||
654 | */ |
||
655 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ |
||
656 | (FLASH->OBR & FLASH_OBR_OPTERR) : \ |
||
657 | ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \ |
||
658 | (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \ |
||
659 | (FLASH->SR2 & ((__FLAG__) >> 16)))) |
||
660 | |||
661 | /** |
||
662 | * @brief Clear the specified FLASH flag. |
||
663 | * @param __FLAG__: specifies the FLASH flags to clear. |
||
664 | * This parameter can be any combination of the following values: |
||
665 | * @arg FLASH_FLAG_EOP_BANK1 : FLASH End of Operation flag on bank1 |
||
666 | * @arg FLASH_FLAG_WRPERR_BANK1: FLASH Write protected error flag on bank1 |
||
667 | * @arg FLASH_FLAG_PGERR_BANK1 : FLASH Programming error flag on bank1 |
||
668 | * @arg FLASH_FLAG_BSY_BANK1 : FLASH Busy flag on bank1 |
||
669 | * @arg FLASH_FLAG_EOP_BANK2 : FLASH End of Operation flag on bank2 |
||
670 | * @arg FLASH_FLAG_WRPERR_BANK2: FLASH Write protected error flag on bank2 |
||
671 | * @arg FLASH_FLAG_PGERR_BANK2 : FLASH Programming error flag on bank2 |
||
672 | * @arg FLASH_FLAG_BSY_BANK2 : FLASH Busy flag on bank2 |
||
673 | * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match |
||
674 | * @retval none |
||
675 | */ |
||
676 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ |
||
677 | /* Clear FLASH_FLAG_OPTVERR flag */ \ |
||
678 | if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ |
||
679 | { \ |
||
680 | CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ |
||
681 | } \ |
||
682 | else { \ |
||
683 | /* Clear Flag in Bank1 */ \ |
||
684 | if (((__FLAG__) & SR_FLAG_MASK) != RESET) \ |
||
685 | { \ |
||
686 | FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \ |
||
687 | } \ |
||
688 | /* Clear Flag in Bank2 */ \ |
||
689 | if (((__FLAG__) >> 16) != RESET) \ |
||
690 | { \ |
||
691 | FLASH->SR2 = ((__FLAG__) >> 16); \ |
||
692 | } \ |
||
693 | } \ |
||
694 | } while(0) |
||
695 | #else |
||
696 | /** |
||
697 | * @brief Enable the specified FLASH interrupt. |
||
698 | * @param __INTERRUPT__ : FLASH interrupt |
||
699 | * This parameter can be any combination of the following values: |
||
700 | * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt |
||
701 | * @arg FLASH_IT_ERR: Error Interrupt |
||
702 | * @retval none |
||
703 | */ |
||
704 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) |
||
705 | |||
706 | /** |
||
707 | * @brief Disable the specified FLASH interrupt. |
||
708 | * @param __INTERRUPT__ : FLASH interrupt |
||
709 | * This parameter can be any combination of the following values: |
||
710 | * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt |
||
711 | * @arg FLASH_IT_ERR: Error Interrupt |
||
712 | * @retval none |
||
713 | */ |
||
714 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__)) |
||
715 | |||
716 | /** |
||
717 | * @brief Get the specified FLASH flag status. |
||
718 | * @param __FLAG__: specifies the FLASH flag to check. |
||
719 | * This parameter can be one of the following values: |
||
720 | * @arg FLASH_FLAG_EOP : FLASH End of Operation flag |
||
721 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag |
||
722 | * @arg FLASH_FLAG_PGERR : FLASH Programming error flag |
||
723 | * @arg FLASH_FLAG_BSY : FLASH Busy flag |
||
724 | * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match |
||
725 | * @retval The new state of __FLAG__ (SET or RESET). |
||
726 | */ |
||
727 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ |
||
728 | (FLASH->OBR & FLASH_OBR_OPTERR) : \ |
||
729 | (FLASH->SR & (__FLAG__))) |
||
730 | /** |
||
731 | * @brief Clear the specified FLASH flag. |
||
732 | * @param __FLAG__: specifies the FLASH flags to clear. |
||
733 | * This parameter can be any combination of the following values: |
||
734 | * @arg FLASH_FLAG_EOP : FLASH End of Operation flag |
||
735 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag |
||
736 | * @arg FLASH_FLAG_PGERR : FLASH Programming error flag |
||
737 | * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match |
||
738 | * @retval none |
||
739 | */ |
||
740 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ |
||
741 | /* Clear FLASH_FLAG_OPTVERR flag */ \ |
||
742 | if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ |
||
743 | { \ |
||
744 | CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ |
||
745 | } \ |
||
746 | else { \ |
||
747 | /* Clear Flag in Bank1 */ \ |
||
748 | FLASH->SR = (__FLAG__); \ |
||
749 | } \ |
||
750 | } while(0) |
||
751 | |||
752 | #endif |
||
753 | |||
754 | /** |
||
755 | * @} |
||
756 | */ |
||
757 | |||
758 | /** |
||
759 | * @} |
||
760 | */ |
||
761 | |||
762 | /* Exported functions --------------------------------------------------------*/ |
||
763 | /** @addtogroup FLASHEx_Exported_Functions |
||
764 | * @{ |
||
765 | */ |
||
766 | |||
767 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
||
768 | * @{ |
||
769 | */ |
||
770 | /* IO operation functions *****************************************************/ |
||
771 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
||
772 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
||
773 | |||
774 | /** |
||
775 | * @} |
||
776 | */ |
||
777 | |||
778 | /** @addtogroup FLASHEx_Exported_Functions_Group2 |
||
779 | * @{ |
||
780 | */ |
||
781 | /* Peripheral Control functions ***********************************************/ |
||
782 | HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); |
||
783 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
||
784 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
||
785 | /** |
||
786 | * @} |
||
787 | */ |
||
788 | |||
789 | /** |
||
790 | * @} |
||
791 | */ |
||
792 | |||
793 | /** |
||
794 | * @} |
||
795 | */ |
||
796 | |||
797 | /** |
||
798 | * @} |
||
799 | */ |
||
800 | #ifdef __cplusplus |
||
801 | } |
||
802 | #endif |
||
803 | |||
804 | #endif /* __STM32F1xx_HAL_FLASH_EX_H */ |
||
805 | |||
806 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |