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2 mjames 1 
/**
2 
  ******************************************************************************
3 
  * @file    stm32f1xx_hal_dma_ex.h
4 
  * @author  MCD Application Team
5 
  * @brief   Header file of DMA HAL extension module.
6 
  ******************************************************************************
7 
  * @attention
8 
  *
9 
  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 
  *
11 
  * Redistribution and use in source and binary forms, with or without modification,
12 
  * are permitted provided that the following conditions are met:
13 
  *   1. Redistributions of source code must retain the above copyright notice,
14 
  *      this list of conditions and the following disclaimer.
15 
  *   2. Redistributions in binary form must reproduce the above copyright notice,
16 
  *      this list of conditions and the following disclaimer in the documentation
17 
  *      and/or other materials provided with the distribution.
18 
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
19 
  *      may be used to endorse or promote products derived from this software
20 
  *      without specific prior written permission.
21 
  *
22 
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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  *
33 
  ******************************************************************************
34 
  */
35 
 
36 
/* Define to prevent recursive inclusion -------------------------------------*/
37 
#ifndef __STM32F1xx_HAL_DMA_EX_H
38 
#define __STM32F1xx_HAL_DMA_EX_H
39 
 
40 
#ifdef __cplusplus
41 
 extern "C" {
42 
#endif
43 
 
44 
/* Includes ------------------------------------------------------------------*/
45 
#include "stm32f1xx_hal_def.h"
46 
 
47 
/** @addtogroup STM32F1xx_HAL_Driver
48 
  * @{
49 
  */
50 
 
51 
/** @defgroup DMAEx DMAEx
52 
  * @{
53 
  */
54 
 
55 
/* Exported types ------------------------------------------------------------*/
56 
/* Exported constants --------------------------------------------------------*/
57 
/* Exported macro ------------------------------------------------------------*/
58 
/** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
59 
  * @{
60 
  */
61 
/* Interrupt & Flag management */
62 
#if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
63 
    defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
64 
/** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
65 
  * @{
66 
  */
67 
 
68 
/**
69 
  * @brief  Returns the current DMA Channel transfer complete flag.
70 
  * @param  __HANDLE__: DMA handle
71 
  * @retval The specified transfer complete flag index.
72 
  */
73 
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
74 
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
75 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
76 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
77 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
78 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
79 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
80 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
81 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
82 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
83 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
84 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
85 
   DMA_FLAG_TC5)
86 
 
87 
/**
88 
  * @brief  Returns the current DMA Channel half transfer complete flag.
89 
  * @param  __HANDLE__: DMA handle
90 
  * @retval The specified half transfer complete flag index.
91 
  */      
92 
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
93 
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
94 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
95 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
96 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
97 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
98 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
99 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
100 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
101 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
102 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
103 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
104 
   DMA_FLAG_HT5)
105 
 
106 
/**
107 
  * @brief  Returns the current DMA Channel transfer error flag.
108 
  * @param  __HANDLE__: DMA handle
109 
  * @retval The specified transfer error flag index.
110 
  */
111 
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
112 
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
113 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
114 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
115 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
116 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
117 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
118 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
119 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
120 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
121 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
122 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
123 
   DMA_FLAG_TE5)
124 
 
125 
/**
126 
  * @brief  Return the current DMA Channel Global interrupt flag.
127 
  * @param  __HANDLE__: DMA handle
128 
  * @retval The specified transfer error flag index.
129 
  */
130 
#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
131 
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
132 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
133 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
134 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
135 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
136 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
137 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\
138 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\
139 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\
140 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\
141 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\
142 
   DMA_FLAG_GL5)
143 
 
144 
/**
145 
  * @brief  Get the DMA Channel pending flags.
146 
  * @param  __HANDLE__: DMA handle
147 
  * @param  __FLAG__: Get the specified flag.
148 
  *          This parameter can be any combination of the following values:
149 
  *            @arg DMA_FLAG_TCx:  Transfer complete flag
150 
  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
151 
  *            @arg DMA_FLAG_TEx:  Transfer error flag
152 
  *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.  
153 
  * @retval The state of FLAG (SET or RESET).
154 
  */
155 
#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
156 
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
157 
  (DMA1->ISR & (__FLAG__)))
158 
 
159 
/**
160 
  * @brief  Clears the DMA Channel pending flags.
161 
  * @param  __HANDLE__: DMA handle
162 
  * @param  __FLAG__: specifies the flag to clear.
163 
  *          This parameter can be any combination of the following values:
164 
  *            @arg DMA_FLAG_TCx:  Transfer complete flag
165 
  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
166 
  *            @arg DMA_FLAG_TEx:  Transfer error flag
167 
  *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.  
168 
  * @retval None
169 
  */
170 
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
171 
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
172 
  (DMA1->IFCR = (__FLAG__)))
173 
 
174 
/**
175 
  * @}
176 
  */
177 
 
178 
#else
179 
/** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
180 
  * @{
181 
  */
182 
 
183 
/**
184 
  * @brief  Returns the current DMA Channel transfer complete flag.
185 
  * @param  __HANDLE__: DMA handle
186 
  * @retval The specified transfer complete flag index.
187 
  */
188 
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
189 
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
190 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
191 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
192 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
193 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
194 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
195 
   DMA_FLAG_TC7)
196 
 
197 
/**
198 
  * @brief  Return the current DMA Channel half transfer complete flag.
199 
  * @param  __HANDLE__: DMA handle
200 
  * @retval The specified half transfer complete flag index.
201 
  */
202 
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
203 
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
204 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
205 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
206 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
207 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
208 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
209 
   DMA_FLAG_HT7)
210 
 
211 
/**
212 
  * @brief  Return the current DMA Channel transfer error flag.
213 
  * @param  __HANDLE__: DMA handle
214 
  * @retval The specified transfer error flag index.
215 
  */
216 
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
217 
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
218 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
219 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
220 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
221 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
222 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
223 
   DMA_FLAG_TE7)
224 
 
225 
/**
226 
  * @brief  Return the current DMA Channel Global interrupt flag.
227 
  * @param  __HANDLE__: DMA handle
228 
  * @retval The specified transfer error flag index.
229 
  */
230 
#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
231 
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
232 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
233 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
234 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
235 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
236 
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
237 
   DMA_FLAG_GL7)
238 
 
239 
/**
240 
  * @brief  Get the DMA Channel pending flags.
241 
  * @param  __HANDLE__: DMA handle
242 
  * @param  __FLAG__: Get the specified flag.
243 
  *          This parameter can be any combination of the following values:
244 
  *            @arg DMA_FLAG_TCx:  Transfer complete flag
245 
  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
246 
  *            @arg DMA_FLAG_TEx:  Transfer error flag
247 
  *            @arg DMA_FLAG_GLx:  Global interrupt flag
248 
  *         Where x can be 1_7 to select the DMA Channel flag.  
249 
  * @retval The state of FLAG (SET or RESET).
250 
  */
251 
 
252 
#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)   (DMA1->ISR & (__FLAG__))
253 
 
254 
/**
255 
  * @brief  Clear the DMA Channel pending flags.
256 
  * @param  __HANDLE__: DMA handle
257 
  * @param  __FLAG__: specifies the flag to clear.
258 
  *          This parameter can be any combination of the following values:
259 
  *            @arg DMA_FLAG_TCx:  Transfer complete flag
260 
  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
261 
  *            @arg DMA_FLAG_TEx:  Transfer error flag
262 
  *            @arg DMA_FLAG_GLx:  Global interrupt flag
263 
  *         Where x can be 1_7 to select the DMA Channel flag.  
264 
  * @retval None
265 
  */
266 
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
267 
 
268 
/**
269 
  * @}
270 
  */
271 
 
272 
#endif
273 
 
274 
/**
275 
  * @}
276 
  */
277 
 
278 
/**
279 
  * @}
280 
  */
281 
 
282 
/**
283 
  * @}
284 
  */
285 
 
286 
#ifdef __cplusplus
287 
}
288 
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
289 
       /* STM32F103xG || STM32F105xC || STM32F107xC */
290 
 
291 
#endif /* __STM32F1xx_HAL_DMA_H */
292 
 
293 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/