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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_dac.h |
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4 | * @author MCD Application Team |
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5 | * @brief Header file of DAC HAL module. |
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6 | ****************************************************************************** |
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7 | * @attention |
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8 | * |
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9 | mjames | 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
10 | * All rights reserved.</center></h2> |
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2 | mjames | 11 | * |
9 | mjames | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
13 | * the "License"; You may not use this file except in compliance with the |
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14 | * License. You may obtain a copy of the License at: |
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15 | * opensource.org/licenses/BSD-3-Clause |
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2 | mjames | 16 | * |
17 | ****************************************************************************** |
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18 | */ |
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19 | |||
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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9 | mjames | 21 | #ifndef STM32F1xx_HAL_DAC_H |
22 | #define STM32F1xx_HAL_DAC_H |
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2 | mjames | 23 | |
24 | #ifdef __cplusplus |
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9 | mjames | 25 | extern "C" { |
2 | mjames | 26 | #endif |
27 | |||
28 | /** @addtogroup STM32F1xx_HAL_Driver |
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29 | * @{ |
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30 | */ |
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31 | |||
9 | mjames | 32 | /* Includes ------------------------------------------------------------------*/ |
33 | #include "stm32f1xx_hal_def.h" |
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34 | |||
35 | #if defined(DAC) |
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36 | |||
2 | mjames | 37 | /** @addtogroup DAC |
38 | * @{ |
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39 | */ |
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40 | |||
41 | /* Exported types ------------------------------------------------------------*/ |
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42 | |||
43 | /** @defgroup DAC_Exported_Types DAC Exported Types |
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44 | * @{ |
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45 | */ |
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46 | |||
9 | mjames | 47 | /** |
48 | * @brief HAL State structures definition |
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49 | */ |
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2 | mjames | 50 | typedef enum |
51 | { |
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52 | HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ |
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53 | HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ |
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54 | HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ |
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55 | HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ |
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56 | HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ |
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9 | mjames | 57 | |
58 | } HAL_DAC_StateTypeDef; |
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59 | |||
60 | /** |
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61 | * @brief DAC handle Structure definition |
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62 | */ |
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63 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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64 | typedef struct __DAC_HandleTypeDef |
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65 | #else |
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2 | mjames | 66 | typedef struct |
9 | mjames | 67 | #endif |
2 | mjames | 68 | { |
69 | DAC_TypeDef *Instance; /*!< Register base address */ |
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9 | mjames | 70 | |
2 | mjames | 71 | __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
72 | |||
73 | HAL_LockTypeDef Lock; /*!< DAC locking object */ |
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9 | mjames | 74 | |
2 | mjames | 75 | DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ |
9 | mjames | 76 | |
77 | DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ |
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78 | |||
2 | mjames | 79 | __IO uint32_t ErrorCode; /*!< DAC Error code */ |
80 | |||
9 | mjames | 81 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
82 | void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); |
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83 | void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); |
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84 | void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac); |
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85 | void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac); |
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86 | void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); |
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87 | void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); |
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88 | void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac); |
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89 | void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac); |
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90 | |||
91 | void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac); |
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92 | void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef *hdac); |
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93 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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94 | |||
95 | } DAC_HandleTypeDef; |
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96 | |||
97 | |||
98 | /** |
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99 | * @brief DAC Configuration regular Channel structure definition |
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100 | */ |
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2 | mjames | 101 | typedef struct |
102 | { |
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9 | mjames | 103 | uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. |
104 | This parameter can be a value of @ref DAC_trigger_selection */ |
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2 | mjames | 105 | |
9 | mjames | 106 | uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. |
107 | This parameter can be a value of @ref DAC_output_buffer */ |
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108 | |||
109 | } DAC_ChannelConfTypeDef; |
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110 | |||
111 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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2 | mjames | 112 | /** |
9 | mjames | 113 | * @brief HAL DAC Callback ID enumeration definition |
114 | */ |
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115 | typedef enum |
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116 | { |
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117 | HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ |
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118 | HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ |
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119 | HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ |
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120 | HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ |
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121 | HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ |
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122 | HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ |
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123 | HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ |
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124 | HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ |
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125 | HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ |
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126 | HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ |
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127 | HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ |
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128 | } HAL_DAC_CallbackIDTypeDef; |
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129 | |||
130 | /** |
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131 | * @brief HAL DAC Callback pointer definition |
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132 | */ |
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133 | typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); |
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134 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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135 | |||
136 | /** |
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2 | mjames | 137 | * @} |
138 | */ |
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139 | |||
140 | /* Exported constants --------------------------------------------------------*/ |
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141 | |||
142 | /** @defgroup DAC_Exported_Constants DAC Exported Constants |
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143 | * @{ |
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144 | */ |
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145 | |||
146 | /** @defgroup DAC_Error_Code DAC Error Code |
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147 | * @{ |
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148 | */ |
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9 | mjames | 149 | #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ |
150 | #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ |
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151 | #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ |
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152 | #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ |
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153 | #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ |
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154 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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155 | #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ |
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156 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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157 | |||
2 | mjames | 158 | /** |
159 | * @} |
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160 | */ |
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9 | mjames | 161 | |
2 | mjames | 162 | /** @defgroup DAC_output_buffer DAC output buffer |
163 | * @{ |
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164 | */ |
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165 | #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U |
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9 | mjames | 166 | #define DAC_OUTPUTBUFFER_DISABLE (DAC_CR_BOFF1) |
2 | mjames | 167 | |
168 | /** |
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169 | * @} |
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170 | */ |
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171 | |||
172 | /** @defgroup DAC_Channel_selection DAC Channel selection |
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173 | * @{ |
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174 | */ |
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175 | #define DAC_CHANNEL_1 0x00000000U |
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176 | #define DAC_CHANNEL_2 0x00000010U |
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177 | /** |
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178 | * @} |
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179 | */ |
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180 | |||
9 | mjames | 181 | /** @defgroup DAC_data_alignment DAC data alignment |
2 | mjames | 182 | * @{ |
183 | */ |
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184 | #define DAC_ALIGN_12B_R 0x00000000U |
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185 | #define DAC_ALIGN_12B_L 0x00000004U |
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186 | #define DAC_ALIGN_8B_R 0x00000008U |
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187 | |||
188 | /** |
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189 | * @} |
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190 | */ |
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191 | |||
9 | mjames | 192 | /** @defgroup DAC_flags_definition DAC flags definition |
193 | * @{ |
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194 | */ |
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195 | #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) |
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196 | #define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) |
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197 | |||
2 | mjames | 198 | /** |
199 | * @} |
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200 | */ |
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201 | |||
9 | mjames | 202 | /** @defgroup DAC_IT_definition DAC IT definition |
203 | * @{ |
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204 | */ |
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205 | #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1) |
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206 | #define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2) |
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207 | |||
208 | /** |
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209 | * @} |
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210 | */ |
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211 | |||
212 | /** |
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213 | * @} |
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214 | */ |
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215 | |||
2 | mjames | 216 | /* Exported macro ------------------------------------------------------------*/ |
217 | |||
218 | /** @defgroup DAC_Exported_Macros DAC Exported Macros |
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219 | * @{ |
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220 | */ |
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221 | |||
9 | mjames | 222 | /** @brief Reset DAC handle state. |
223 | * @param __HANDLE__ specifies the DAC handle. |
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2 | mjames | 224 | * @retval None |
225 | */ |
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9 | mjames | 226 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
227 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ |
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228 | (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ |
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229 | (__HANDLE__)->MspInitCallback = NULL; \ |
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230 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
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231 | } while(0) |
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232 | #else |
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2 | mjames | 233 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) |
9 | mjames | 234 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
2 | mjames | 235 | |
9 | mjames | 236 | /** @brief Enable the DAC channel. |
237 | * @param __HANDLE__ specifies the DAC handle. |
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238 | * @param __DAC_Channel__ specifies the DAC channel |
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2 | mjames | 239 | * @retval None |
240 | */ |
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241 | #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ |
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9 | mjames | 242 | ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) |
2 | mjames | 243 | |
9 | mjames | 244 | /** @brief Disable the DAC channel. |
245 | * @param __HANDLE__ specifies the DAC handle |
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246 | * @param __DAC_Channel__ specifies the DAC channel. |
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2 | mjames | 247 | * @retval None |
248 | */ |
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249 | #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ |
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9 | mjames | 250 | ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) |
2 | mjames | 251 | |
9 | mjames | 252 | /** @brief Set DHR12R1 alignment. |
253 | * @param __ALIGNMENT__ specifies the DAC alignment |
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254 | * @retval None |
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255 | */ |
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256 | #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__)) |
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257 | |||
258 | /** @brief Set DHR12R2 alignment. |
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259 | * @param __ALIGNMENT__ specifies the DAC alignment |
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260 | * @retval None |
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261 | */ |
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262 | #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014U + (__ALIGNMENT__)) |
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263 | |||
264 | /** @brief Set DHR12RD alignment. |
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265 | * @param __ALIGNMENT__ specifies the DAC alignment |
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266 | * @retval None |
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267 | */ |
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268 | #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__)) |
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269 | |||
270 | /** @brief Enable the DAC interrupt. |
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271 | * @param __HANDLE__ specifies the DAC handle |
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272 | * @param __INTERRUPT__ specifies the DAC interrupt. |
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273 | * This parameter can be any combination of the following values: |
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274 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
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275 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
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276 | * @retval None |
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277 | */ |
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278 | #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) |
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279 | |||
280 | /** @brief Disable the DAC interrupt. |
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281 | * @param __HANDLE__ specifies the DAC handle |
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282 | * @param __INTERRUPT__ specifies the DAC interrupt. |
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283 | * This parameter can be any combination of the following values: |
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284 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
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285 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
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286 | * @retval None |
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287 | */ |
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288 | #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) |
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289 | |||
290 | /** @brief Check whether the specified DAC interrupt source is enabled or not. |
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291 | * @param __HANDLE__ DAC handle |
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292 | * @param __INTERRUPT__ DAC interrupt source to check |
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293 | * This parameter can be any combination of the following values: |
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294 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
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295 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
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296 | * @retval State of interruption (SET or RESET) |
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297 | */ |
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298 | #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) |
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299 | |||
300 | /** @brief Get the selected DAC's flag status. |
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301 | * @param __HANDLE__ specifies the DAC handle. |
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302 | * @param __FLAG__ specifies the DAC flag to get. |
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303 | * This parameter can be any combination of the following values: |
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304 | * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag |
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305 | * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag |
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306 | * @retval None |
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307 | */ |
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308 | #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
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309 | |||
310 | /** @brief Clear the DAC's flag. |
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311 | * @param __HANDLE__ specifies the DAC handle. |
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312 | * @param __FLAG__ specifies the DAC flag to clear. |
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313 | * This parameter can be any combination of the following values: |
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314 | * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag |
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315 | * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag |
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316 | * @retval None |
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317 | */ |
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318 | #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) |
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319 | |||
2 | mjames | 320 | /** |
321 | * @} |
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9 | mjames | 322 | */ |
2 | mjames | 323 | |
324 | /* Private macro -------------------------------------------------------------*/ |
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325 | |||
326 | /** @defgroup DAC_Private_Macros DAC Private Macros |
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327 | * @{ |
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328 | */ |
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329 | #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
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330 | ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
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331 | |||
332 | #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ |
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333 | ((CHANNEL) == DAC_CHANNEL_2)) |
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334 | |||
335 | #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
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336 | ((ALIGN) == DAC_ALIGN_12B_L) || \ |
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337 | ((ALIGN) == DAC_ALIGN_8B_R)) |
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338 | |||
339 | #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) |
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340 | |||
341 | /** |
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342 | * @} |
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343 | */ |
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344 | |||
9 | mjames | 345 | /* Include DAC HAL Extended module */ |
2 | mjames | 346 | #include "stm32f1xx_hal_dac_ex.h" |
347 | |||
348 | /* Exported functions --------------------------------------------------------*/ |
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349 | |||
350 | /** @addtogroup DAC_Exported_Functions |
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351 | * @{ |
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352 | */ |
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353 | |||
354 | /** @addtogroup DAC_Exported_Functions_Group1 |
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355 | * @{ |
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356 | */ |
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9 | mjames | 357 | /* Initialization and de-initialization functions *****************************/ |
358 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); |
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359 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); |
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360 | void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); |
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361 | void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); |
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2 | mjames | 362 | |
363 | /** |
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364 | * @} |
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365 | */ |
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366 | |||
367 | /** @addtogroup DAC_Exported_Functions_Group2 |
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368 | * @{ |
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369 | */ |
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370 | /* IO operation functions *****************************************************/ |
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9 | mjames | 371 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); |
372 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); |
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373 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, |
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374 | uint32_t Alignment); |
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375 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); |
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2 | mjames | 376 | |
9 | mjames | 377 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); |
378 | |||
379 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
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380 | |||
381 | void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); |
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382 | void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); |
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383 | void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
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384 | void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
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385 | |||
386 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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387 | /* DAC callback registering/unregistering */ |
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388 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, |
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389 | pDAC_CallbackTypeDef pCallback); |
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390 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); |
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391 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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392 | |||
2 | mjames | 393 | /** |
394 | * @} |
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395 | */ |
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396 | |||
397 | /** @addtogroup DAC_Exported_Functions_Group3 |
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398 | * @{ |
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399 | */ |
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400 | /* Peripheral Control functions ***********************************************/ |
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9 | mjames | 401 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel); |
2 | mjames | 402 | |
9 | mjames | 403 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); |
2 | mjames | 404 | /** |
405 | * @} |
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406 | */ |
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407 | |||
408 | /** @addtogroup DAC_Exported_Functions_Group4 |
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409 | * @{ |
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410 | */ |
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9 | mjames | 411 | /* Peripheral State and Error functions ***************************************/ |
412 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac); |
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2 | mjames | 413 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
414 | |||
415 | /** |
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416 | * @} |
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417 | */ |
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418 | |||
419 | /** |
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420 | * @} |
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421 | */ |
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422 | |||
9 | mjames | 423 | /** @defgroup DAC_Private_Functions DAC Private Functions |
2 | mjames | 424 | * @{ |
9 | mjames | 425 | */ |
2 | mjames | 426 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); |
427 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); |
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9 | mjames | 428 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); |
2 | mjames | 429 | /** |
430 | * @} |
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431 | */ |
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432 | |||
433 | /** |
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434 | * @} |
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435 | */ |
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436 | |||
9 | mjames | 437 | #endif /* DAC */ |
438 | |||
2 | mjames | 439 | /** |
440 | * @} |
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441 | */ |
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442 | |||
443 | #ifdef __cplusplus |
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444 | } |
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445 | #endif |
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446 | |||
447 | |||
9 | mjames | 448 | #endif /*STM32F1xx_HAL_DAC_H */ |
2 | mjames | 449 | |
450 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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451 |