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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_can.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of CAN HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 10 | * All rights reserved.</center></h2> |
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| 11 | * |
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| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | |||
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 21 | #ifndef STM32F1xx_HAL_CAN_H |
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| 22 | #define STM32F1xx_HAL_CAN_H |
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| 23 | |||
| 24 | #ifdef __cplusplus |
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| 25 | extern "C" { |
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| 26 | #endif |
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| 27 | |||
| 28 | /* Includes ------------------------------------------------------------------*/ |
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| 29 | #include "stm32f1xx_hal_def.h" |
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| 30 | |||
| 31 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 32 | * @{ |
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| 33 | */ |
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| 34 | |||
| 35 | #if defined (CAN1) |
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| 36 | /** @addtogroup CAN |
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| 37 | * @{ |
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| 38 | */ |
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| 39 | |||
| 40 | /* Exported types ------------------------------------------------------------*/ |
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| 41 | /** @defgroup CAN_Exported_Types CAN Exported Types |
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| 42 | * @{ |
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| 43 | */ |
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| 44 | /** |
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| 45 | * @brief HAL State structures definition |
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| 46 | */ |
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| 47 | typedef enum |
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| 48 | { |
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| 49 | HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */ |
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| 50 | HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */ |
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| 51 | HAL_CAN_STATE_LISTENING = 0x02U, /*!< CAN receive process is ongoing */ |
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| 52 | HAL_CAN_STATE_SLEEP_PENDING = 0x03U, /*!< CAN sleep request is pending */ |
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| 53 | HAL_CAN_STATE_SLEEP_ACTIVE = 0x04U, /*!< CAN sleep mode is active */ |
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| 54 | HAL_CAN_STATE_ERROR = 0x05U /*!< CAN error state */ |
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| 55 | |||
| 56 | } HAL_CAN_StateTypeDef; |
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| 57 | |||
| 58 | /** |
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| 59 | * @brief CAN init structure definition |
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| 60 | */ |
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| 61 | typedef struct |
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| 62 | { |
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| 63 | uint32_t Prescaler; /*!< Specifies the length of a time quantum. |
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| 64 | This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */ |
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| 65 | |||
| 66 | uint32_t Mode; /*!< Specifies the CAN operating mode. |
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| 67 | This parameter can be a value of @ref CAN_operating_mode */ |
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| 68 | |||
| 69 | uint32_t SyncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware |
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| 70 | is allowed to lengthen or shorten a bit to perform resynchronization. |
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| 71 | This parameter can be a value of @ref CAN_synchronisation_jump_width */ |
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| 72 | |||
| 73 | uint32_t TimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1. |
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| 74 | This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ |
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| 75 | |||
| 76 | uint32_t TimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2. |
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| 77 | This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ |
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| 78 | |||
| 79 | FunctionalState TimeTriggeredMode; /*!< Enable or disable the time triggered communication mode. |
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| 80 | This parameter can be set to ENABLE or DISABLE. */ |
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| 81 | |||
| 82 | FunctionalState AutoBusOff; /*!< Enable or disable the automatic bus-off management. |
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| 83 | This parameter can be set to ENABLE or DISABLE. */ |
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| 84 | |||
| 85 | FunctionalState AutoWakeUp; /*!< Enable or disable the automatic wake-up mode. |
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| 86 | This parameter can be set to ENABLE or DISABLE. */ |
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| 87 | |||
| 88 | FunctionalState AutoRetransmission; /*!< Enable or disable the non-automatic retransmission mode. |
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| 89 | This parameter can be set to ENABLE or DISABLE. */ |
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| 90 | |||
| 91 | FunctionalState ReceiveFifoLocked; /*!< Enable or disable the Receive FIFO Locked mode. |
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| 92 | This parameter can be set to ENABLE or DISABLE. */ |
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| 93 | |||
| 94 | FunctionalState TransmitFifoPriority;/*!< Enable or disable the transmit FIFO priority. |
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| 95 | This parameter can be set to ENABLE or DISABLE. */ |
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| 96 | |||
| 97 | } CAN_InitTypeDef; |
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| 98 | |||
| 99 | /** |
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| 100 | * @brief CAN filter configuration structure definition |
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| 101 | */ |
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| 102 | typedef struct |
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| 103 | { |
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| 104 | uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit |
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| 105 | configuration, first one for a 16-bit configuration). |
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| 106 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
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| 107 | |||
| 108 | uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit |
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| 109 | configuration, second one for a 16-bit configuration). |
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| 110 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
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| 111 | |||
| 112 | uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, |
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| 113 | according to the mode (MSBs for a 32-bit configuration, |
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| 114 | first one for a 16-bit configuration). |
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| 115 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
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| 116 | |||
| 117 | uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, |
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| 118 | according to the mode (LSBs for a 32-bit configuration, |
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| 119 | second one for a 16-bit configuration). |
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| 120 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
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| 121 | |||
| 122 | uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter. |
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| 123 | This parameter can be a value of @ref CAN_filter_FIFO */ |
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| 124 | |||
| 125 | uint32_t FilterBank; /*!< Specifies the filter bank which will be initialized. |
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| 126 | For single CAN instance(14 dedicated filter banks), |
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| 127 | this parameter must be a number between Min_Data = 0 and Max_Data = 13. |
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| 128 | For dual CAN instances(28 filter banks shared), |
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| 129 | this parameter must be a number between Min_Data = 0 and Max_Data = 27. */ |
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| 130 | |||
| 131 | uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. |
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| 132 | This parameter can be a value of @ref CAN_filter_mode */ |
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| 133 | |||
| 134 | uint32_t FilterScale; /*!< Specifies the filter scale. |
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| 135 | This parameter can be a value of @ref CAN_filter_scale */ |
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| 136 | |||
| 137 | uint32_t FilterActivation; /*!< Enable or disable the filter. |
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| 138 | This parameter can be a value of @ref CAN_filter_activation */ |
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| 139 | |||
| 140 | uint32_t SlaveStartFilterBank; /*!< Select the start filter bank for the slave CAN instance. |
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| 141 | For single CAN instances, this parameter is meaningless. |
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| 142 | For dual CAN instances, all filter banks with lower index are assigned to master |
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| 143 | CAN instance, whereas all filter banks with greater index are assigned to slave |
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| 144 | CAN instance. |
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| 145 | This parameter must be a number between Min_Data = 0 and Max_Data = 27. */ |
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| 146 | |||
| 147 | } CAN_FilterTypeDef; |
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| 148 | |||
| 149 | /** |
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| 150 | * @brief CAN Tx message header structure definition |
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| 151 | */ |
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| 152 | typedef struct |
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| 153 | { |
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| 154 | uint32_t StdId; /*!< Specifies the standard identifier. |
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| 155 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ |
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| 156 | |||
| 157 | uint32_t ExtId; /*!< Specifies the extended identifier. |
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| 158 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ |
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| 159 | |||
| 160 | uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. |
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| 161 | This parameter can be a value of @ref CAN_identifier_type */ |
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| 162 | |||
| 163 | uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. |
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| 164 | This parameter can be a value of @ref CAN_remote_transmission_request */ |
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| 165 | |||
| 166 | uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. |
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| 167 | This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ |
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| 168 | |||
| 169 | FunctionalState TransmitGlobalTime; /*!< Specifies whether the timestamp counter value captured on start |
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| 170 | of frame transmission, is sent in DATA6 and DATA7 replacing pData[6] and pData[7]. |
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| 171 | @note: Time Triggered Communication Mode must be enabled. |
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| 172 | @note: DLC must be programmed as 8 bytes, in order these 2 bytes are sent. |
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| 173 | This parameter can be set to ENABLE or DISABLE. */ |
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| 174 | |||
| 175 | } CAN_TxHeaderTypeDef; |
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| 176 | |||
| 177 | /** |
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| 178 | * @brief CAN Rx message header structure definition |
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| 179 | */ |
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| 180 | typedef struct |
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| 181 | { |
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| 182 | uint32_t StdId; /*!< Specifies the standard identifier. |
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| 183 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ |
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| 184 | |||
| 185 | uint32_t ExtId; /*!< Specifies the extended identifier. |
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| 186 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ |
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| 187 | |||
| 188 | uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. |
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| 189 | This parameter can be a value of @ref CAN_identifier_type */ |
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| 190 | |||
| 191 | uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. |
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| 192 | This parameter can be a value of @ref CAN_remote_transmission_request */ |
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| 193 | |||
| 194 | uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. |
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| 195 | This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ |
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| 196 | |||
| 197 | uint32_t Timestamp; /*!< Specifies the timestamp counter value captured on start of frame reception. |
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| 198 | @note: Time Triggered Communication Mode must be enabled. |
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| 199 | This parameter must be a number between Min_Data = 0 and Max_Data = 0xFFFF. */ |
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| 200 | |||
| 201 | uint32_t FilterMatchIndex; /*!< Specifies the index of matching acceptance filter element. |
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| 202 | This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */ |
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| 203 | |||
| 204 | } CAN_RxHeaderTypeDef; |
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| 205 | |||
| 206 | /** |
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| 207 | * @brief CAN handle Structure definition |
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| 208 | */ |
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| 209 | typedef struct __CAN_HandleTypeDef |
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| 210 | { |
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| 211 | CAN_TypeDef *Instance; /*!< Register base address */ |
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| 212 | |||
| 213 | CAN_InitTypeDef Init; /*!< CAN required parameters */ |
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| 214 | |||
| 215 | __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ |
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| 216 | |||
| 217 | __IO uint32_t ErrorCode; /*!< CAN Error code. |
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| 218 | This parameter can be a value of @ref CAN_Error_Code */ |
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| 219 | |||
| 220 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
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| 221 | void (* TxMailbox0CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 0 complete callback */ |
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| 222 | void (* TxMailbox1CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 1 complete callback */ |
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| 223 | void (* TxMailbox2CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 2 complete callback */ |
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| 224 | void (* TxMailbox0AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 0 abort callback */ |
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| 225 | void (* TxMailbox1AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 1 abort callback */ |
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| 226 | void (* TxMailbox2AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 2 abort callback */ |
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| 227 | void (* RxFifo0MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 msg pending callback */ |
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| 228 | void (* RxFifo0FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 full callback */ |
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| 229 | void (* RxFifo1MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 msg pending callback */ |
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| 230 | void (* RxFifo1FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 full callback */ |
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| 231 | void (* SleepCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Sleep callback */ |
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| 232 | void (* WakeUpFromRxMsgCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Wake Up from Rx msg callback */ |
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| 233 | void (* ErrorCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Error callback */ |
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| 234 | |||
| 235 | void (* MspInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp Init callback */ |
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| 236 | void (* MspDeInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp DeInit callback */ |
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| 237 | |||
| 238 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
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| 239 | } CAN_HandleTypeDef; |
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| 240 | |||
| 241 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
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| 242 | /** |
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| 243 | * @brief HAL CAN common Callback ID enumeration definition |
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| 244 | */ |
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| 245 | typedef enum |
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| 246 | { |
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| 247 | HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID = 0x00U, /*!< CAN Tx Mailbox 0 complete callback ID */ |
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| 248 | HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID = 0x01U, /*!< CAN Tx Mailbox 1 complete callback ID */ |
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| 249 | HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID = 0x02U, /*!< CAN Tx Mailbox 2 complete callback ID */ |
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| 250 | HAL_CAN_TX_MAILBOX0_ABORT_CB_ID = 0x03U, /*!< CAN Tx Mailbox 0 abort callback ID */ |
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| 251 | HAL_CAN_TX_MAILBOX1_ABORT_CB_ID = 0x04U, /*!< CAN Tx Mailbox 1 abort callback ID */ |
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| 252 | HAL_CAN_TX_MAILBOX2_ABORT_CB_ID = 0x05U, /*!< CAN Tx Mailbox 2 abort callback ID */ |
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| 253 | HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /*!< CAN Rx FIFO 0 message pending callback ID */ |
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| 254 | HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /*!< CAN Rx FIFO 0 full callback ID */ |
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| 255 | HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /*!< CAN Rx FIFO 1 message pending callback ID */ |
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| 256 | HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /*!< CAN Rx FIFO 1 full callback ID */ |
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| 257 | HAL_CAN_SLEEP_CB_ID = 0x0AU, /*!< CAN Sleep callback ID */ |
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| 258 | HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /*!< CAN Wake Up from Rx msg callback ID */ |
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| 259 | HAL_CAN_ERROR_CB_ID = 0x0CU, /*!< CAN Error callback ID */ |
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| 260 | |||
| 261 | HAL_CAN_MSPINIT_CB_ID = 0x0DU, /*!< CAN MspInit callback ID */ |
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| 262 | HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /*!< CAN MspDeInit callback ID */ |
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| 263 | |||
| 264 | } HAL_CAN_CallbackIDTypeDef; |
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| 265 | |||
| 266 | /** |
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| 267 | * @brief HAL CAN Callback pointer definition |
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| 268 | */ |
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| 269 | typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to a CAN callback function */ |
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| 270 | |||
| 271 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
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| 272 | /** |
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| 273 | * @} |
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| 274 | */ |
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| 275 | |||
| 276 | /* Exported constants --------------------------------------------------------*/ |
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| 277 | |||
| 278 | /** @defgroup CAN_Exported_Constants CAN Exported Constants |
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| 279 | * @{ |
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| 280 | */ |
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| 281 | |||
| 282 | /** @defgroup CAN_Error_Code CAN Error Code |
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| 283 | * @{ |
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| 284 | */ |
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| 285 | #define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */ |
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| 286 | #define HAL_CAN_ERROR_EWG (0x00000001U) /*!< Protocol Error Warning */ |
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| 287 | #define HAL_CAN_ERROR_EPV (0x00000002U) /*!< Error Passive */ |
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| 288 | #define HAL_CAN_ERROR_BOF (0x00000004U) /*!< Bus-off error */ |
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| 289 | #define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */ |
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| 290 | #define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */ |
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| 291 | #define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */ |
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| 292 | #define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive error */ |
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| 293 | #define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */ |
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| 294 | #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */ |
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| 295 | #define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */ |
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| 296 | #define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */ |
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| 297 | #define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ |
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| 298 | #define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 0 transmit failure due to transmit error */ |
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| 299 | #define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 1 transmit failure due to arbitration lost */ |
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| 300 | #define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to transmit error */ |
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| 301 | #define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 2 transmit failure due to arbitration lost */ |
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| 302 | #define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 2 transmit failure due to transmit error */ |
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| 303 | #define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */ |
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| 304 | #define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */ |
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| 305 | #define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */ |
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| 306 | #define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */ |
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| 307 | #define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */ |
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| 308 | |||
| 309 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
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| 310 | #define HAL_CAN_ERROR_INVALID_CALLBACK (0x00400000U) /*!< Invalid Callback error */ |
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| 311 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
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| 312 | #define HAL_CAN_ERROR_INTERNAL (0x00800000U) /*!< Internal error */ |
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| 313 | |||
| 314 | /** |
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| 315 | * @} |
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| 316 | */ |
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| 317 | |||
| 318 | /** @defgroup CAN_InitStatus CAN InitStatus |
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| 319 | * @{ |
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| 320 | */ |
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| 321 | #define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */ |
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| 322 | #define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */ |
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| 323 | /** |
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| 324 | * @} |
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| 325 | */ |
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| 326 | |||
| 327 | /** @defgroup CAN_operating_mode CAN Operating Mode |
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| 328 | * @{ |
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| 329 | */ |
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| 330 | #define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */ |
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| 331 | #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ |
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| 332 | #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ |
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| 333 | #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */ |
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| 334 | /** |
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| 335 | * @} |
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| 336 | */ |
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| 337 | |||
| 338 | |||
| 339 | /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width |
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| 340 | * @{ |
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| 341 | */ |
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| 342 | #define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */ |
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| 343 | #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ |
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| 344 | #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ |
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| 345 | #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ |
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| 346 | /** |
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| 347 | * @} |
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| 348 | */ |
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| 349 | |||
| 350 | /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1 |
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| 351 | * @{ |
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| 352 | */ |
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| 353 | #define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */ |
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| 354 | #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ |
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| 355 | #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ |
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| 356 | #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ |
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| 357 | #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ |
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| 358 | #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ |
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| 359 | #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ |
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| 360 | #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ |
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| 361 | #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ |
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| 362 | #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ |
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| 363 | #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ |
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| 364 | #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ |
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| 365 | #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ |
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| 366 | #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ |
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| 367 | #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ |
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| 368 | #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ |
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| 369 | /** |
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| 370 | * @} |
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| 371 | */ |
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| 372 | |||
| 373 | /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2 |
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| 374 | * @{ |
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| 375 | */ |
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| 376 | #define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */ |
||
| 377 | #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ |
||
| 378 | #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ |
||
| 379 | #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ |
||
| 380 | #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ |
||
| 381 | #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ |
||
| 382 | #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ |
||
| 383 | #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ |
||
| 384 | /** |
||
| 385 | * @} |
||
| 386 | */ |
||
| 387 | |||
| 388 | /** @defgroup CAN_filter_mode CAN Filter Mode |
||
| 389 | * @{ |
||
| 390 | */ |
||
| 391 | #define CAN_FILTERMODE_IDMASK (0x00000000U) /*!< Identifier mask mode */ |
||
| 392 | #define CAN_FILTERMODE_IDLIST (0x00000001U) /*!< Identifier list mode */ |
||
| 393 | /** |
||
| 394 | * @} |
||
| 395 | */ |
||
| 396 | |||
| 397 | /** @defgroup CAN_filter_scale CAN Filter Scale |
||
| 398 | * @{ |
||
| 399 | */ |
||
| 400 | #define CAN_FILTERSCALE_16BIT (0x00000000U) /*!< Two 16-bit filters */ |
||
| 401 | #define CAN_FILTERSCALE_32BIT (0x00000001U) /*!< One 32-bit filter */ |
||
| 402 | /** |
||
| 403 | * @} |
||
| 404 | */ |
||
| 405 | |||
| 406 | /** @defgroup CAN_filter_activation CAN Filter Activation |
||
| 407 | * @{ |
||
| 408 | */ |
||
| 409 | #define CAN_FILTER_DISABLE (0x00000000U) /*!< Disable filter */ |
||
| 410 | #define CAN_FILTER_ENABLE (0x00000001U) /*!< Enable filter */ |
||
| 411 | /** |
||
| 412 | * @} |
||
| 413 | */ |
||
| 414 | |||
| 415 | /** @defgroup CAN_filter_FIFO CAN Filter FIFO |
||
| 416 | * @{ |
||
| 417 | */ |
||
| 418 | #define CAN_FILTER_FIFO0 (0x00000000U) /*!< Filter FIFO 0 assignment for filter x */ |
||
| 419 | #define CAN_FILTER_FIFO1 (0x00000001U) /*!< Filter FIFO 1 assignment for filter x */ |
||
| 420 | /** |
||
| 421 | * @} |
||
| 422 | */ |
||
| 423 | |||
| 424 | /** @defgroup CAN_identifier_type CAN Identifier Type |
||
| 425 | * @{ |
||
| 426 | */ |
||
| 427 | #define CAN_ID_STD (0x00000000U) /*!< Standard Id */ |
||
| 428 | #define CAN_ID_EXT (0x00000004U) /*!< Extended Id */ |
||
| 429 | /** |
||
| 430 | * @} |
||
| 431 | */ |
||
| 432 | |||
| 433 | /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request |
||
| 434 | * @{ |
||
| 435 | */ |
||
| 436 | #define CAN_RTR_DATA (0x00000000U) /*!< Data frame */ |
||
| 437 | #define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */ |
||
| 438 | /** |
||
| 439 | * @} |
||
| 440 | */ |
||
| 441 | |||
| 442 | /** @defgroup CAN_receive_FIFO_number CAN Receive FIFO Number |
||
| 443 | * @{ |
||
| 444 | */ |
||
| 445 | #define CAN_RX_FIFO0 (0x00000000U) /*!< CAN receive FIFO 0 */ |
||
| 446 | #define CAN_RX_FIFO1 (0x00000001U) /*!< CAN receive FIFO 1 */ |
||
| 447 | /** |
||
| 448 | * @} |
||
| 449 | */ |
||
| 450 | |||
| 451 | /** @defgroup CAN_Tx_Mailboxes CAN Tx Mailboxes |
||
| 452 | * @{ |
||
| 453 | */ |
||
| 454 | #define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */ |
||
| 455 | #define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */ |
||
| 456 | #define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */ |
||
| 457 | /** |
||
| 458 | * @} |
||
| 459 | */ |
||
| 460 | |||
| 461 | /** @defgroup CAN_flags CAN Flags |
||
| 462 | * @{ |
||
| 463 | */ |
||
| 464 | /* Transmit Flags */ |
||
| 465 | #define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request complete MailBox 0 flag */ |
||
| 466 | #define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox 0 flag */ |
||
| 467 | #define CAN_FLAG_ALST0 (0x00000502U) /*!< Arbitration Lost MailBox 0 flag */ |
||
| 468 | #define CAN_FLAG_TERR0 (0x00000503U) /*!< Transmission error MailBox 0 flag */ |
||
| 469 | #define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request complete MailBox1 flag */ |
||
| 470 | #define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox 1 flag */ |
||
| 471 | #define CAN_FLAG_ALST1 (0x0000050AU) /*!< Arbitration Lost MailBox 1 flag */ |
||
| 472 | #define CAN_FLAG_TERR1 (0x0000050BU) /*!< Transmission error MailBox 1 flag */ |
||
| 473 | #define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request complete MailBox2 flag */ |
||
| 474 | #define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox 2 flag */ |
||
| 475 | #define CAN_FLAG_ALST2 (0x00000512U) /*!< Arbitration Lost MailBox 2 flag */ |
||
| 476 | #define CAN_FLAG_TERR2 (0x00000513U) /*!< Transmission error MailBox 2 flag */ |
||
| 477 | #define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */ |
||
| 478 | #define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 1 empty flag */ |
||
| 479 | #define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 2 empty flag */ |
||
| 480 | #define CAN_FLAG_LOW0 (0x0000051DU) /*!< Lowest priority mailbox 0 flag */ |
||
| 481 | #define CAN_FLAG_LOW1 (0x0000051EU) /*!< Lowest priority mailbox 1 flag */ |
||
| 482 | #define CAN_FLAG_LOW2 (0x0000051FU) /*!< Lowest priority mailbox 2 flag */ |
||
| 483 | |||
| 484 | /* Receive Flags */ |
||
| 485 | #define CAN_FLAG_FF0 (0x00000203U) /*!< RX FIFO 0 Full flag */ |
||
| 486 | #define CAN_FLAG_FOV0 (0x00000204U) /*!< RX FIFO 0 Overrun flag */ |
||
| 487 | #define CAN_FLAG_FF1 (0x00000403U) /*!< RX FIFO 1 Full flag */ |
||
| 488 | #define CAN_FLAG_FOV1 (0x00000404U) /*!< RX FIFO 1 Overrun flag */ |
||
| 489 | |||
| 490 | /* Operating Mode Flags */ |
||
| 491 | #define CAN_FLAG_INAK (0x00000100U) /*!< Initialization acknowledge flag */ |
||
| 492 | #define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */ |
||
| 493 | #define CAN_FLAG_ERRI (0x00000102U) /*!< Error flag */ |
||
| 494 | #define CAN_FLAG_WKU (0x00000103U) /*!< Wake up interrupt flag */ |
||
| 495 | #define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge interrupt flag */ |
||
| 496 | |||
| 497 | /* Error Flags */ |
||
| 498 | #define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */ |
||
| 499 | #define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */ |
||
| 500 | #define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */ |
||
| 501 | /** |
||
| 502 | * @} |
||
| 503 | */ |
||
| 504 | |||
| 505 | |||
| 506 | /** @defgroup CAN_Interrupts CAN Interrupts |
||
| 507 | * @{ |
||
| 508 | */ |
||
| 509 | /* Transmit Interrupt */ |
||
| 510 | #define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ |
||
| 511 | |||
| 512 | /* Receive Interrupts */ |
||
| 513 | #define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ |
||
| 514 | #define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ |
||
| 515 | #define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ |
||
| 516 | #define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ |
||
| 517 | #define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ |
||
| 518 | #define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ |
||
| 519 | |||
| 520 | /* Operating Mode Interrupts */ |
||
| 521 | #define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ |
||
| 522 | #define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ |
||
| 523 | |||
| 524 | /* Error Interrupts */ |
||
| 525 | #define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ |
||
| 526 | #define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ |
||
| 527 | #define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ |
||
| 528 | #define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ |
||
| 529 | #define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ |
||
| 530 | /** |
||
| 531 | * @} |
||
| 532 | */ |
||
| 533 | |||
| 534 | /** |
||
| 535 | * @} |
||
| 536 | */ |
||
| 537 | |||
| 538 | /* Exported macros -----------------------------------------------------------*/ |
||
| 539 | /** @defgroup CAN_Exported_Macros CAN Exported Macros |
||
| 540 | * @{ |
||
| 541 | */ |
||
| 542 | |||
| 543 | /** @brief Reset CAN handle state |
||
| 544 | * @param __HANDLE__ CAN handle. |
||
| 545 | * @retval None |
||
| 546 | */ |
||
| 547 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
||
| 548 | #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
||
| 549 | (__HANDLE__)->State = HAL_CAN_STATE_RESET; \ |
||
| 550 | (__HANDLE__)->MspInitCallback = NULL; \ |
||
| 551 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
||
| 552 | } while(0) |
||
| 553 | #else |
||
| 554 | #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) |
||
| 555 | #endif /*USE_HAL_CAN_REGISTER_CALLBACKS */ |
||
| 556 | |||
| 557 | /** |
||
| 558 | * @brief Enable the specified CAN interrupts. |
||
| 559 | * @param __HANDLE__ CAN handle. |
||
| 560 | * @param __INTERRUPT__ CAN Interrupt sources to enable. |
||
| 561 | * This parameter can be any combination of @arg CAN_Interrupts |
||
| 562 | * @retval None |
||
| 563 | */ |
||
| 564 | #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) |
||
| 565 | |||
| 566 | /** |
||
| 567 | * @brief Disable the specified CAN interrupts. |
||
| 568 | * @param __HANDLE__ CAN handle. |
||
| 569 | * @param __INTERRUPT__ CAN Interrupt sources to disable. |
||
| 570 | * This parameter can be any combination of @arg CAN_Interrupts |
||
| 571 | * @retval None |
||
| 572 | */ |
||
| 573 | #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) |
||
| 574 | |||
| 575 | /** @brief Check if the specified CAN interrupt source is enabled or disabled. |
||
| 576 | * @param __HANDLE__ specifies the CAN Handle. |
||
| 577 | * @param __INTERRUPT__ specifies the CAN interrupt source to check. |
||
| 578 | * This parameter can be a value of @arg CAN_Interrupts |
||
| 579 | * @retval The state of __IT__ (TRUE or FALSE). |
||
| 580 | */ |
||
| 581 | #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__)) |
||
| 582 | |||
| 583 | /** @brief Check whether the specified CAN flag is set or not. |
||
| 584 | * @param __HANDLE__ specifies the CAN Handle. |
||
| 585 | * @param __FLAG__ specifies the flag to check. |
||
| 586 | * This parameter can be one of @arg CAN_flags |
||
| 587 | * @retval The state of __FLAG__ (TRUE or FALSE). |
||
| 588 | */ |
||
| 589 | #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ |
||
| 590 | ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
||
| 591 | (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
||
| 592 | (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
||
| 593 | (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
||
| 594 | (((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) |
||
| 595 | |||
| 596 | /** @brief Clear the specified CAN pending flag. |
||
| 597 | * @param __HANDLE__ specifies the CAN Handle. |
||
| 598 | * @param __FLAG__ specifies the flag to check. |
||
| 599 | * This parameter can be one of the following values: |
||
| 600 | * @arg CAN_FLAG_RQCP0: Request complete MailBox 0 Flag |
||
| 601 | * @arg CAN_FLAG_TXOK0: Transmission OK MailBox 0 Flag |
||
| 602 | * @arg CAN_FLAG_ALST0: Arbitration Lost MailBox 0 Flag |
||
| 603 | * @arg CAN_FLAG_TERR0: Transmission error MailBox 0 Flag |
||
| 604 | * @arg CAN_FLAG_RQCP1: Request complete MailBox 1 Flag |
||
| 605 | * @arg CAN_FLAG_TXOK1: Transmission OK MailBox 1 Flag |
||
| 606 | * @arg CAN_FLAG_ALST1: Arbitration Lost MailBox 1 Flag |
||
| 607 | * @arg CAN_FLAG_TERR1: Transmission error MailBox 1 Flag |
||
| 608 | * @arg CAN_FLAG_RQCP2: Request complete MailBox 2 Flag |
||
| 609 | * @arg CAN_FLAG_TXOK2: Transmission OK MailBox 2 Flag |
||
| 610 | * @arg CAN_FLAG_ALST2: Arbitration Lost MailBox 2 Flag |
||
| 611 | * @arg CAN_FLAG_TERR2: Transmission error MailBox 2 Flag |
||
| 612 | * @arg CAN_FLAG_FF0: RX FIFO 0 Full Flag |
||
| 613 | * @arg CAN_FLAG_FOV0: RX FIFO 0 Overrun Flag |
||
| 614 | * @arg CAN_FLAG_FF1: RX FIFO 1 Full Flag |
||
| 615 | * @arg CAN_FLAG_FOV1: RX FIFO 1 Overrun Flag |
||
| 616 | * @arg CAN_FLAG_WKUI: Wake up Interrupt Flag |
||
| 617 | * @arg CAN_FLAG_SLAKI: Sleep acknowledge Interrupt Flag |
||
| 618 | * @retval None |
||
| 619 | */ |
||
| 620 | #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
||
| 621 | ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
||
| 622 | (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
||
| 623 | (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
||
| 624 | (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) |
||
| 625 | |||
| 626 | /** |
||
| 627 | * @} |
||
| 628 | */ |
||
| 629 | |||
| 630 | /* Exported functions --------------------------------------------------------*/ |
||
| 631 | /** @addtogroup CAN_Exported_Functions CAN Exported Functions |
||
| 632 | * @{ |
||
| 633 | */ |
||
| 634 | |||
| 635 | /** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions |
||
| 636 | * @brief Initialization and Configuration functions |
||
| 637 | * @{ |
||
| 638 | */ |
||
| 639 | |||
| 640 | /* Initialization and de-initialization functions *****************************/ |
||
| 641 | HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan); |
||
| 642 | HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan); |
||
| 643 | void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan); |
||
| 644 | void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan); |
||
| 645 | |||
| 646 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
||
| 647 | /* Callbacks Register/UnRegister functions ***********************************/ |
||
| 648 | HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan)); |
||
| 649 | HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID); |
||
| 650 | |||
| 651 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
||
| 652 | /** |
||
| 653 | * @} |
||
| 654 | */ |
||
| 655 | |||
| 656 | /** @addtogroup CAN_Exported_Functions_Group2 Configuration functions |
||
| 657 | * @brief Configuration functions |
||
| 658 | * @{ |
||
| 659 | */ |
||
| 660 | |||
| 661 | /* Configuration functions ****************************************************/ |
||
| 662 | HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig); |
||
| 663 | |||
| 664 | /** |
||
| 665 | * @} |
||
| 666 | */ |
||
| 667 | |||
| 668 | /** @addtogroup CAN_Exported_Functions_Group3 Control functions |
||
| 669 | * @brief Control functions |
||
| 670 | * @{ |
||
| 671 | */ |
||
| 672 | |||
| 673 | /* Control functions **********************************************************/ |
||
| 674 | HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan); |
||
| 675 | HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan); |
||
| 676 | HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan); |
||
| 677 | HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); |
||
| 678 | uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan); |
||
| 679 | HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox); |
||
| 680 | HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); |
||
| 681 | uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan); |
||
| 682 | uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); |
||
| 683 | uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox); |
||
| 684 | HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]); |
||
| 685 | uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo); |
||
| 686 | |||
| 687 | /** |
||
| 688 | * @} |
||
| 689 | */ |
||
| 690 | |||
| 691 | /** @addtogroup CAN_Exported_Functions_Group4 Interrupts management |
||
| 692 | * @brief Interrupts management |
||
| 693 | * @{ |
||
| 694 | */ |
||
| 695 | /* Interrupts management ******************************************************/ |
||
| 696 | HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs); |
||
| 697 | HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs); |
||
| 698 | void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan); |
||
| 699 | |||
| 700 | /** |
||
| 701 | * @} |
||
| 702 | */ |
||
| 703 | |||
| 704 | /** @addtogroup CAN_Exported_Functions_Group5 Callback functions |
||
| 705 | * @brief Callback functions |
||
| 706 | * @{ |
||
| 707 | */ |
||
| 708 | /* Callbacks functions ********************************************************/ |
||
| 709 | |||
| 710 | void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan); |
||
| 711 | void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan); |
||
| 712 | void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan); |
||
| 713 | void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan); |
||
| 714 | void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan); |
||
| 715 | void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan); |
||
| 716 | void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan); |
||
| 717 | void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan); |
||
| 718 | void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan); |
||
| 719 | void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan); |
||
| 720 | void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan); |
||
| 721 | void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan); |
||
| 722 | void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); |
||
| 723 | |||
| 724 | /** |
||
| 725 | * @} |
||
| 726 | */ |
||
| 727 | |||
| 728 | /** @addtogroup CAN_Exported_Functions_Group6 Peripheral State and Error functions |
||
| 729 | * @brief CAN Peripheral State functions |
||
| 730 | * @{ |
||
| 731 | */ |
||
| 732 | /* Peripheral State and Error functions ***************************************/ |
||
| 733 | HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan); |
||
| 734 | uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan); |
||
| 735 | HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan); |
||
| 736 | |||
| 737 | /** |
||
| 738 | * @} |
||
| 739 | */ |
||
| 740 | |||
| 741 | /** |
||
| 742 | * @} |
||
| 743 | */ |
||
| 744 | |||
| 745 | /* Private types -------------------------------------------------------------*/ |
||
| 746 | /** @defgroup CAN_Private_Types CAN Private Types |
||
| 747 | * @{ |
||
| 748 | */ |
||
| 749 | |||
| 750 | /** |
||
| 751 | * @} |
||
| 752 | */ |
||
| 753 | |||
| 754 | /* Private variables ---------------------------------------------------------*/ |
||
| 755 | /** @defgroup CAN_Private_Variables CAN Private Variables |
||
| 756 | * @{ |
||
| 757 | */ |
||
| 758 | |||
| 759 | /** |
||
| 760 | * @} |
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| 761 | */ |
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| 762 | |||
| 763 | /* Private constants ---------------------------------------------------------*/ |
||
| 764 | /** @defgroup CAN_Private_Constants CAN Private Constants |
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| 765 | * @{ |
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| 766 | */ |
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| 767 | #define CAN_FLAG_MASK (0x000000FFU) |
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| 768 | /** |
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| 769 | * @} |
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| 770 | */ |
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| 771 | |||
| 772 | /* Private Macros -----------------------------------------------------------*/ |
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| 773 | /** @defgroup CAN_Private_Macros CAN Private Macros |
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| 774 | * @{ |
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| 775 | */ |
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| 776 | |||
| 777 | #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ |
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| 778 | ((MODE) == CAN_MODE_LOOPBACK)|| \ |
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| 779 | ((MODE) == CAN_MODE_SILENT) || \ |
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| 780 | ((MODE) == CAN_MODE_SILENT_LOOPBACK)) |
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| 781 | #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ) || \ |
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| 782 | ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) |
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| 783 | #define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) || ((BS1) == CAN_BS1_2TQ) || \ |
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| 784 | ((BS1) == CAN_BS1_3TQ) || ((BS1) == CAN_BS1_4TQ) || \ |
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| 785 | ((BS1) == CAN_BS1_5TQ) || ((BS1) == CAN_BS1_6TQ) || \ |
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| 786 | ((BS1) == CAN_BS1_7TQ) || ((BS1) == CAN_BS1_8TQ) || \ |
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| 787 | ((BS1) == CAN_BS1_9TQ) || ((BS1) == CAN_BS1_10TQ)|| \ |
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| 788 | ((BS1) == CAN_BS1_11TQ)|| ((BS1) == CAN_BS1_12TQ)|| \ |
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| 789 | ((BS1) == CAN_BS1_13TQ)|| ((BS1) == CAN_BS1_14TQ)|| \ |
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| 790 | ((BS1) == CAN_BS1_15TQ)|| ((BS1) == CAN_BS1_16TQ)) |
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| 791 | #define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) || ((BS2) == CAN_BS2_2TQ) || \ |
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| 792 | ((BS2) == CAN_BS2_3TQ) || ((BS2) == CAN_BS2_4TQ) || \ |
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| 793 | ((BS2) == CAN_BS2_5TQ) || ((BS2) == CAN_BS2_6TQ) || \ |
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| 794 | ((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ)) |
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| 795 | #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U)) |
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| 796 | #define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU) |
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| 797 | #if defined(CAN2) |
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| 798 | #define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U) |
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| 799 | #endif |
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| 800 | #define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U) |
||
| 801 | #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ |
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| 802 | ((MODE) == CAN_FILTERMODE_IDLIST)) |
||
| 803 | #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ |
||
| 804 | ((SCALE) == CAN_FILTERSCALE_32BIT)) |
||
| 805 | #define IS_CAN_FILTER_ACTIVATION(ACTIVATION) (((ACTIVATION) == CAN_FILTER_DISABLE) || \ |
||
| 806 | ((ACTIVATION) == CAN_FILTER_ENABLE)) |
||
| 807 | #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ |
||
| 808 | ((FIFO) == CAN_FILTER_FIFO1)) |
||
| 809 | #define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \ |
||
| 810 | ((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \ |
||
| 811 | ((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 )) |
||
| 812 | #define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2)) |
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| 813 | #define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU) |
||
| 814 | #define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU) |
||
| 815 | #define IS_CAN_DLC(DLC) ((DLC) <= 8U) |
||
| 816 | #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ |
||
| 817 | ((IDTYPE) == CAN_ID_EXT)) |
||
| 818 | #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) |
||
| 819 | #define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) || ((FIFO) == CAN_RX_FIFO1)) |
||
| 820 | #define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | \ |
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| 821 | CAN_IT_RX_FIFO0_FULL | CAN_IT_RX_FIFO0_OVERRUN | \ |
||
| 822 | CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_RX_FIFO1_FULL | \ |
||
| 823 | CAN_IT_RX_FIFO1_OVERRUN | CAN_IT_WAKEUP | \ |
||
| 824 | CAN_IT_SLEEP_ACK | CAN_IT_ERROR_WARNING | \ |
||
| 825 | CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF | \ |
||
| 826 | CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR)) |
||
| 827 | |||
| 828 | /** |
||
| 829 | * @} |
||
| 830 | */ |
||
| 831 | /* End of private macros -----------------------------------------------------*/ |
||
| 832 | |||
| 833 | /** |
||
| 834 | * @} |
||
| 835 | */ |
||
| 836 | |||
| 837 | |||
| 838 | #endif /* CAN1 */ |
||
| 839 | /** |
||
| 840 | * @} |
||
| 841 | */ |
||
| 842 | |||
| 843 | #ifdef __cplusplus |
||
| 844 | } |
||
| 845 | #endif |
||
| 846 | |||
| 847 | #endif /* STM32F1xx_HAL_CAN_H */ |
||
| 848 | |||
| 849 | |||
| 850 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |