Rev 2 | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
||
| 3 | * @file stm32f1xx_hal_adc_ex.h |
||
| 4 | * @author MCD Application Team |
||
| 5 | mjames | 5 | * @version V1.0.4 |
| 6 | * @date 29-April-2016 |
||
| 2 | mjames | 7 | * @brief Header file of ADC HAL extension module. |
| 8 | ****************************************************************************** |
||
| 9 | * @attention |
||
| 10 | * |
||
| 5 | mjames | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| 2 | mjames | 12 | * |
| 13 | * Redistribution and use in source and binary forms, with or without modification, |
||
| 14 | * are permitted provided that the following conditions are met: |
||
| 15 | * 1. Redistributions of source code must retain the above copyright notice, |
||
| 16 | * this list of conditions and the following disclaimer. |
||
| 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
||
| 18 | * this list of conditions and the following disclaimer in the documentation |
||
| 19 | * and/or other materials provided with the distribution. |
||
| 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
||
| 21 | * may be used to endorse or promote products derived from this software |
||
| 22 | * without specific prior written permission. |
||
| 23 | * |
||
| 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||
| 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||
| 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||
| 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||
| 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||
| 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||
| 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||
| 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||
| 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||
| 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||
| 34 | * |
||
| 35 | ****************************************************************************** |
||
| 36 | */ |
||
| 37 | |||
| 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
||
| 39 | #ifndef __STM32F1xx_HAL_ADC_EX_H |
||
| 40 | #define __STM32F1xx_HAL_ADC_EX_H |
||
| 41 | |||
| 42 | #ifdef __cplusplus |
||
| 43 | extern "C" { |
||
| 44 | #endif |
||
| 45 | |||
| 46 | /* Includes ------------------------------------------------------------------*/ |
||
| 47 | #include "stm32f1xx_hal_def.h" |
||
| 48 | |||
| 49 | /** @addtogroup STM32F1xx_HAL_Driver |
||
| 50 | * @{ |
||
| 51 | */ |
||
| 52 | |||
| 53 | /** @addtogroup ADCEx |
||
| 54 | * @{ |
||
| 55 | */ |
||
| 56 | |||
| 57 | /* Exported types ------------------------------------------------------------*/ |
||
| 58 | /** @defgroup ADCEx_Exported_Types ADCEx Exported Types |
||
| 59 | * @{ |
||
| 60 | */ |
||
| 61 | |||
| 62 | /** |
||
| 63 | * @brief ADC Configuration injected Channel structure definition |
||
| 64 | * @note Parameters of this structure are shared within 2 scopes: |
||
| 65 | * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset |
||
| 66 | * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, |
||
| 67 | * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv. |
||
| 68 | * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. |
||
| 69 | * ADC state can be either: |
||
| 70 | * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv') |
||
| 71 | * - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group. |
||
| 72 | */ |
||
| 73 | typedef struct |
||
| 74 | { |
||
| 75 | uint32_t InjectedChannel; /*!< Selection of ADC channel to configure |
||
| 76 | This parameter can be a value of @ref ADC_channels |
||
| 77 | Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. |
||
| 78 | Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor) |
||
| 79 | Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger. |
||
| 80 | It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel. |
||
| 81 | Refer to errata sheet of these devices for more details. */ |
||
| 82 | uint32_t InjectedRank; /*!< Rank in the injected group sequencer |
||
| 83 | This parameter must be a value of @ref ADCEx_injected_rank |
||
| 84 | Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */ |
||
| 85 | uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. |
||
| 86 | Unit: ADC clock cycles |
||
| 87 | Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits). |
||
| 88 | This parameter can be a value of @ref ADC_sampling_times |
||
| 89 | Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups. |
||
| 90 | If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting. |
||
| 91 | Note: In case of usage of internal measurement channels (VrefInt/TempSensor), |
||
| 92 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
||
| 93 | Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */ |
||
| 94 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only). |
||
| 95 | Offset value must be a positive number. |
||
| 96 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), |
||
| 97 | this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ |
||
| 98 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. |
||
| 99 | To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. |
||
| 100 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. |
||
| 101 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
||
| 102 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
||
| 103 | uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). |
||
| 104 | Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. |
||
| 105 | Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. |
||
| 106 | This parameter can be set to ENABLE or DISABLE. |
||
| 107 | Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one. |
||
| 108 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
||
| 109 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
||
| 110 | uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one |
||
| 111 | This parameter can be set to ENABLE or DISABLE. |
||
| 112 | Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) |
||
| 113 | Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START) |
||
| 114 | Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. |
||
| 115 | To maintain JAUTO always enabled, DMA must be configured in circular mode. |
||
| 116 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
||
| 117 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
||
| 118 | uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. |
||
| 119 | If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled. |
||
| 120 | If set to external trigger source, triggering is on event rising edge. |
||
| 121 | This parameter can be a value of @ref ADCEx_External_trigger_source_Injected |
||
| 122 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
||
| 123 | If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) |
||
| 124 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
||
| 125 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
||
| 126 | }ADC_InjectionConfTypeDef; |
||
| 127 | |||
| 128 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 129 | /** |
||
| 130 | * @brief Structure definition of ADC multimode |
||
| 131 | * @note The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group). |
||
| 132 | * State of ADCs of the common group must be: disabled. |
||
| 133 | */ |
||
| 134 | typedef struct |
||
| 135 | { |
||
| 136 | uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode. |
||
| 137 | This parameter can be a value of @ref ADCEx_Common_mode |
||
| 138 | Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change. |
||
| 139 | Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2. |
||
| 140 | Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode. |
||
| 141 | Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters). |
||
| 142 | The equivalences are: |
||
| 143 | - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'. |
||
| 144 | - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */ |
||
| 145 | |||
| 146 | |||
| 147 | }ADC_MultiModeTypeDef; |
||
| 148 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 149 | |||
| 150 | /** |
||
| 151 | * @} |
||
| 152 | */ |
||
| 153 | |||
| 154 | |||
| 155 | /* Exported constants --------------------------------------------------------*/ |
||
| 156 | |||
| 157 | /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants |
||
| 158 | * @{ |
||
| 159 | */ |
||
| 160 | |||
| 161 | /** @defgroup ADCEx_injected_rank ADCEx rank into injected group |
||
| 162 | * @{ |
||
| 163 | */ |
||
| 164 | #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001) |
||
| 165 | #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002) |
||
| 166 | #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003) |
||
| 167 | #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004) |
||
| 168 | /** |
||
| 169 | * @} |
||
| 170 | */ |
||
| 171 | |||
| 172 | /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group |
||
| 173 | * @{ |
||
| 174 | */ |
||
| 175 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE ((uint32_t)0x00000000) |
||
| 176 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTTRIG) |
||
| 177 | /** |
||
| 178 | * @} |
||
| 179 | */ |
||
| 180 | |||
| 181 | /** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group |
||
| 182 | * @{ |
||
| 183 | */ |
||
| 184 | /*!< List of external triggers with generic trigger name, independently of */ |
||
| 185 | /* ADC target, sorted by trigger name: */ |
||
| 186 | |||
| 187 | /*!< External triggers of regular group for ADC1&ADC2 only */ |
||
| 188 | #define ADC_EXTERNALTRIGCONV_T1_CC1 ADC1_2_EXTERNALTRIG_T1_CC1 |
||
| 189 | #define ADC_EXTERNALTRIGCONV_T1_CC2 ADC1_2_EXTERNALTRIG_T1_CC2 |
||
| 190 | #define ADC_EXTERNALTRIGCONV_T2_CC2 ADC1_2_EXTERNALTRIG_T2_CC2 |
||
| 191 | #define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO |
||
| 192 | #define ADC_EXTERNALTRIGCONV_T4_CC4 ADC1_2_EXTERNALTRIG_T4_CC4 |
||
| 193 | #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC1_2_EXTERNALTRIG_EXT_IT11 |
||
| 194 | |||
| 195 | #if defined (STM32F103xE) || defined (STM32F103xG) |
||
| 196 | /*!< External triggers of regular group for ADC3 only */ |
||
| 197 | #define ADC_EXTERNALTRIGCONV_T2_CC3 ADC3_EXTERNALTRIG_T2_CC3 |
||
| 198 | #define ADC_EXTERNALTRIGCONV_T3_CC1 ADC3_EXTERNALTRIG_T3_CC1 |
||
| 199 | #define ADC_EXTERNALTRIGCONV_T5_CC1 ADC3_EXTERNALTRIG_T5_CC1 |
||
| 200 | #define ADC_EXTERNALTRIGCONV_T5_CC3 ADC3_EXTERNALTRIG_T5_CC3 |
||
| 201 | #define ADC_EXTERNALTRIGCONV_T8_CC1 ADC3_EXTERNALTRIG_T8_CC1 |
||
| 202 | #endif /* STM32F103xE || defined STM32F103xG */ |
||
| 203 | |||
| 204 | /*!< External triggers of regular group for all ADC instances */ |
||
| 205 | #define ADC_EXTERNALTRIGCONV_T1_CC3 ADC1_2_3_EXTERNALTRIG_T1_CC3 |
||
| 206 | |||
| 207 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
||
| 208 | /*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */ |
||
| 209 | /* XL-density devices. */ |
||
| 5 | mjames | 210 | /* To use it on ADC or ADC2, a remap of trigger must be done from */ |
| 2 | mjames | 211 | /* EXTI line 11 to TIM8_TRGO with macro: */ |
| 212 | /* __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE() */ |
||
| 213 | /* __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE() */ |
||
| 214 | |||
| 215 | /* Note for internal constant value management: If TIM8_TRGO is available, */ |
||
| 216 | /* its definition is set to value for ADC1&ADC2 by default and changed to */ |
||
| 217 | /* value for ADC3 by HAL ADC driver if ADC3 is selected. */ |
||
| 218 | #define ADC_EXTERNALTRIGCONV_T8_TRGO ADC1_2_EXTERNALTRIG_T8_TRGO |
||
| 219 | #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
||
| 220 | |||
| 221 | #define ADC_SOFTWARE_START ADC1_2_3_SWSTART |
||
| 222 | /** |
||
| 223 | * @} |
||
| 224 | */ |
||
| 225 | |||
| 226 | /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group |
||
| 227 | * @{ |
||
| 228 | */ |
||
| 229 | /*!< List of external triggers with generic trigger name, independently of */ |
||
| 230 | /* ADC target, sorted by trigger name: */ |
||
| 231 | |||
| 232 | /*!< External triggers of injected group for ADC1&ADC2 only */ |
||
| 233 | #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC1_2_EXTERNALTRIGINJEC_T2_TRGO |
||
| 234 | #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC1_2_EXTERNALTRIGINJEC_T2_CC1 |
||
| 235 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4 |
||
| 236 | #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO |
||
| 237 | #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 |
||
| 238 | |||
| 239 | #if defined (STM32F103xE) || defined (STM32F103xG) |
||
| 240 | /*!< External triggers of injected group for ADC3 only */ |
||
| 241 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC3_EXTERNALTRIGINJEC_T4_CC3 |
||
| 242 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ADC3_EXTERNALTRIGINJEC_T8_CC2 |
||
| 243 | #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ADC3_EXTERNALTRIGINJEC_T5_TRGO |
||
| 244 | #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ADC3_EXTERNALTRIGINJEC_T5_CC4 |
||
| 245 | #endif /* STM32F103xE || defined STM32F103xG */ |
||
| 246 | |||
| 247 | /*!< External triggers of injected group for all ADC instances */ |
||
| 248 | #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 |
||
| 249 | #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO |
||
| 250 | |||
| 251 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
||
| 252 | /*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */ |
||
| 253 | /* XL-density devices. */ |
||
| 5 | mjames | 254 | /* To use it on ADC1 or ADC2, a remap of trigger must be done from */ |
| 255 | /* EXTI line 11 to TIM8_CC4 with macro: */ |
||
| 2 | mjames | 256 | /* __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE() */ |
| 257 | /* __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE() */ |
||
| 258 | |||
| 259 | /* Note for internal constant value management: If TIM8_CC4 is available, */ |
||
| 260 | /* its definition is set to value for ADC1&ADC2 by default and changed to */ |
||
| 261 | /* value for ADC3 by HAL ADC driver if ADC3 is selected. */ |
||
| 262 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T8_CC4 |
||
| 263 | #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
||
| 264 | |||
| 265 | #define ADC_INJECTED_SOFTWARE_START ADC1_2_3_JSWSTART |
||
| 266 | /** |
||
| 267 | * @} |
||
| 268 | */ |
||
| 269 | |||
| 270 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 271 | /** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode |
||
| 272 | * @{ |
||
| 273 | */ |
||
| 274 | #define ADC_MODE_INDEPENDENT ((uint32_t)(0x00000000)) /*!< ADC dual mode disabled (ADC independent mode) */ |
||
| 275 | #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */ |
||
| 276 | #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)( ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */ |
||
| 277 | #define ADC_DUALMODE_INJECSIMULT_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
||
| 278 | #define ADC_DUALMODE_INJECSIMULT_INTERLSLOW ((uint32_t)( ADC_CR1_DUALMOD_2 )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
||
| 279 | #define ADC_DUALMODE_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */ |
||
| 280 | #define ADC_DUALMODE_REGSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */ |
||
| 281 | #define ADC_DUALMODE_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
||
| 282 | #define ADC_DUALMODE_INTERLSLOW ((uint32_t)(ADC_CR1_DUALMOD_3 )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
||
| 283 | #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CR1_DUALMOD_3 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */ |
||
| 284 | /** |
||
| 285 | * @} |
||
| 286 | */ |
||
| 287 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 288 | |||
| 289 | /** |
||
| 290 | * @} |
||
| 291 | */ |
||
| 292 | |||
| 293 | |||
| 294 | /* Private constants ---------------------------------------------------------*/ |
||
| 295 | |||
| 296 | /** @addtogroup ADCEx_Private_Constants ADCEx Private Constants |
||
| 297 | * @{ |
||
| 298 | */ |
||
| 299 | |||
| 300 | /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group |
||
| 301 | * @{ |
||
| 302 | */ |
||
| 303 | /* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC */ |
||
| 5 | mjames | 304 | /* instance is available on the selected device). */ |
| 2 | mjames | 305 | /* (used internally by HAL driver. To not use into HAL structure parameters) */ |
| 306 | |||
| 307 | /* External triggers of regular group for ADC1&ADC2 (if ADCx available) */ |
||
| 308 | #define ADC1_2_EXTERNALTRIG_T1_CC1 ((uint32_t) 0x00000000) |
||
| 309 | #define ADC1_2_EXTERNALTRIG_T1_CC2 ((uint32_t)( ADC_CR2_EXTSEL_0)) |
||
| 310 | #define ADC1_2_EXTERNALTRIG_T2_CC2 ((uint32_t)( ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0)) |
||
| 311 | #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 )) |
||
| 312 | #define ADC1_2_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0)) |
||
| 313 | #define ADC1_2_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 )) |
||
| 314 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 315 | /* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */ |
||
| 316 | /* XL-density devices. */ |
||
| 317 | #define ADC1_2_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_EXT_IT11 |
||
| 318 | #endif |
||
| 319 | |||
| 320 | #if defined (STM32F103xE) || defined (STM32F103xG) |
||
| 321 | /* External triggers of regular group for ADC3 */ |
||
| 322 | #define ADC3_EXTERNALTRIG_T3_CC1 ADC1_2_EXTERNALTRIG_T1_CC1 |
||
| 323 | #define ADC3_EXTERNALTRIG_T2_CC3 ADC1_2_EXTERNALTRIG_T1_CC2 |
||
| 324 | #define ADC3_EXTERNALTRIG_T8_CC1 ADC1_2_EXTERNALTRIG_T2_CC2 |
||
| 325 | #define ADC3_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO |
||
| 326 | #define ADC3_EXTERNALTRIG_T5_CC1 ADC1_2_EXTERNALTRIG_T4_CC4 |
||
| 327 | #define ADC3_EXTERNALTRIG_T5_CC3 ADC1_2_EXTERNALTRIG_EXT_IT11 |
||
| 328 | #endif |
||
| 329 | |||
| 330 | /* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */ |
||
| 331 | #define ADC1_2_3_EXTERNALTRIG_T1_CC3 ((uint32_t)( ADC_CR2_EXTSEL_1 )) |
||
| 332 | #define ADC1_2_3_SWSTART ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0)) |
||
| 333 | /** |
||
| 334 | * @} |
||
| 335 | */ |
||
| 336 | |||
| 337 | /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group |
||
| 338 | * @{ |
||
| 339 | */ |
||
| 340 | /* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC */ |
||
| 5 | mjames | 341 | /* instance is available on the selected device). */ |
| 2 | mjames | 342 | /* (used internally by HAL driver. To not use into HAL structure parameters) */ |
| 343 | |||
| 344 | /* External triggers of injected group for ADC1&ADC2 (if ADCx available) */ |
||
| 345 | #define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 )) |
||
| 346 | #define ADC1_2_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
||
| 347 | #define ADC1_2_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 )) |
||
| 348 | #define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
||
| 349 | #define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 )) |
||
| 350 | #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 351 | /* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */ |
||
| 352 | /* XL-density devices. */ |
||
| 353 | #define ADC1_2_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 |
||
| 354 | #endif |
||
| 355 | |||
| 356 | #if defined (STM32F103xE) || defined (STM32F103xG) |
||
| 357 | /* External triggers of injected group for ADC3 */ |
||
| 358 | #define ADC3_EXTERNALTRIGINJEC_T4_CC3 ADC1_2_EXTERNALTRIGINJEC_T2_TRGO |
||
| 359 | #define ADC3_EXTERNALTRIGINJEC_T8_CC2 ADC1_2_EXTERNALTRIGINJEC_T2_CC1 |
||
| 360 | #define ADC3_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4 |
||
| 361 | #define ADC3_EXTERNALTRIGINJEC_T5_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO |
||
| 362 | #define ADC3_EXTERNALTRIGINJEC_T5_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 |
||
| 363 | #endif /* STM32F103xE || defined STM32F103xG */ |
||
| 364 | |||
| 365 | /* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */ |
||
| 366 | #define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO ((uint32_t) 0x00000000) |
||
| 367 | #define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_0)) |
||
| 368 | #define ADC1_2_3_JSWSTART ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
||
| 369 | /** |
||
| 370 | * @} |
||
| 371 | */ |
||
| 372 | |||
| 373 | /** |
||
| 374 | * @} |
||
| 375 | */ |
||
| 376 | |||
| 377 | |||
| 378 | /* Exported macro ------------------------------------------------------------*/ |
||
| 379 | |||
| 380 | /* Private macro -------------------------------------------------------------*/ |
||
| 381 | |||
| 382 | /** @defgroup ADCEx_Private_Macro ADCEx Private Macro |
||
| 383 | * @{ |
||
| 384 | */ |
||
| 385 | /* Macro reserved for internal HAL driver usage, not intended to be used in */ |
||
| 386 | /* code of final user. */ |
||
| 387 | |||
| 388 | |||
| 389 | /** |
||
| 390 | * @brief For devices with 3 ADCs: Defines the external trigger source |
||
| 391 | * for regular group according to ADC into common group ADC1&ADC2 or |
||
| 392 | * ADC3 (some triggers with same source have different value to |
||
| 393 | * be programmed into ADC EXTSEL bits of CR2 register). |
||
| 394 | * For devices with 2 ADCs or less: this macro makes no change. |
||
| 395 | * @param __HANDLE__: ADC handle |
||
| 396 | * @param __EXT_TRIG_CONV__: External trigger selected for regular group. |
||
| 397 | * @retval External trigger to be programmed into EXTSEL bits of CR2 register |
||
| 398 | */ |
||
| 399 | #if defined (STM32F103xE) || defined (STM32F103xG) |
||
| 400 | #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ |
||
| 401 | (( (((__HANDLE__)->Instance) == ADC3) \ |
||
| 402 | )? \ |
||
| 403 | ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO \ |
||
| 404 | )? \ |
||
| 405 | (ADC3_EXTERNALTRIG_T8_TRGO) \ |
||
| 406 | : \ |
||
| 407 | (__EXT_TRIG_CONV__) \ |
||
| 408 | ) \ |
||
| 409 | : \ |
||
| 410 | (__EXT_TRIG_CONV__) \ |
||
| 411 | ) |
||
| 412 | #else |
||
| 413 | #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ |
||
| 414 | (__EXT_TRIG_CONV__) |
||
| 415 | #endif /* STM32F103xE || STM32F103xG */ |
||
| 416 | |||
| 417 | /** |
||
| 418 | * @brief For devices with 3 ADCs: Defines the external trigger source |
||
| 419 | * for injected group according to ADC into common group ADC1&ADC2 or |
||
| 420 | * ADC3 (some triggers with same source have different value to |
||
| 421 | * be programmed into ADC JEXTSEL bits of CR2 register). |
||
| 422 | * For devices with 2 ADCs or less: this macro makes no change. |
||
| 423 | * @param __HANDLE__: ADC handle |
||
| 424 | * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group. |
||
| 425 | * @retval External trigger to be programmed into JEXTSEL bits of CR2 register |
||
| 426 | */ |
||
| 427 | #if defined (STM32F103xE) || defined (STM32F103xG) |
||
| 428 | #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \ |
||
| 429 | (( (((__HANDLE__)->Instance) == ADC3) \ |
||
| 430 | )? \ |
||
| 431 | ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4 \ |
||
| 432 | )? \ |
||
| 433 | (ADC3_EXTERNALTRIGINJEC_T8_CC4) \ |
||
| 434 | : \ |
||
| 435 | (__EXT_TRIG_INJECTCONV__) \ |
||
| 436 | ) \ |
||
| 437 | : \ |
||
| 438 | (__EXT_TRIG_INJECTCONV__) \ |
||
| 439 | ) |
||
| 440 | #else |
||
| 441 | #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \ |
||
| 442 | (__EXT_TRIG_INJECTCONV__) |
||
| 443 | #endif /* STM32F103xE || STM32F103xG */ |
||
| 444 | |||
| 445 | |||
| 446 | /** |
||
| 447 | * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs) |
||
| 448 | * @param __HANDLE__: ADC handle |
||
| 449 | * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled |
||
| 450 | */ |
||
| 451 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 452 | #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \ |
||
| 453 | (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \ |
||
| 454 | )? \ |
||
| 455 | (ADC1->CR1 & ADC_CR1_DUALMOD) \ |
||
| 456 | : \ |
||
| 457 | (RESET) \ |
||
| 458 | ) |
||
| 459 | #else |
||
| 460 | #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \ |
||
| 461 | (RESET) |
||
| 462 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 463 | |||
| 464 | /** |
||
| 465 | * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs) |
||
| 466 | * @param __HANDLE__: ADC handle |
||
| 467 | * @retval None |
||
| 468 | */ |
||
| 469 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 470 | #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ |
||
| 471 | (( (((__HANDLE__)->Instance) == ADC2) \ |
||
| 472 | )? \ |
||
| 473 | ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET) \ |
||
| 474 | : \ |
||
| 475 | (!RESET) \ |
||
| 476 | ) |
||
| 477 | #else |
||
| 478 | #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ |
||
| 479 | (!RESET) |
||
| 480 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 481 | |||
| 482 | /** |
||
| 483 | * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs) |
||
| 484 | * @param __HANDLE__: ADC handle |
||
| 485 | * @retval None |
||
| 486 | */ |
||
| 487 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 488 | #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \ |
||
| 489 | (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \ |
||
| 490 | )? \ |
||
| 491 | (ADC1->CR1 & ADC_CR1_JAUTO) \ |
||
| 492 | : \ |
||
| 493 | (RESET) \ |
||
| 494 | ) |
||
| 495 | #else |
||
| 496 | #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \ |
||
| 497 | (RESET) |
||
| 498 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 499 | |||
| 500 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 501 | /** |
||
| 502 | * @brief Set handle of the other ADC sharing the common multimode settings |
||
| 503 | * @param __HANDLE__: ADC handle |
||
| 504 | * @param __HANDLE_OTHER_ADC__: other ADC handle |
||
| 505 | * @retval None |
||
| 506 | */ |
||
| 507 | #define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \ |
||
| 508 | ((__HANDLE_OTHER_ADC__)->Instance = ADC2) |
||
| 509 | |||
| 510 | /** |
||
| 511 | * @brief Set handle of the ADC slave associated to the ADC master |
||
| 512 | * On STM32F1 devices, ADC slave is always ADC2 (this can be different |
||
| 513 | * on other STM32 devices) |
||
| 514 | * @param __HANDLE_MASTER__: ADC master handle |
||
| 515 | * @param __HANDLE_SLAVE__: ADC slave handle |
||
| 516 | * @retval None |
||
| 517 | */ |
||
| 518 | #define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \ |
||
| 519 | ((__HANDLE_SLAVE__)->Instance = ADC2) |
||
| 520 | |||
| 521 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 522 | |||
| 523 | #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \ |
||
| 524 | ((CHANNEL) == ADC_INJECTED_RANK_2) || \ |
||
| 525 | ((CHANNEL) == ADC_INJECTED_RANK_3) || \ |
||
| 526 | ((CHANNEL) == ADC_INJECTED_RANK_4) ) |
||
| 527 | |||
| 528 | #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \ |
||
| 529 | ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) ) |
||
| 530 | |||
| 531 | /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification |
||
| 532 | * @{ |
||
| 533 | */ |
||
| 534 | #define IS_ADC_INJECTED_NB_CONV(LENGTH) \ |
||
| 535 | (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4))) |
||
| 536 | /** |
||
| 537 | * @} |
||
| 538 | */ |
||
| 539 | |||
| 540 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) |
||
| 541 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
||
| 542 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
||
| 543 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
||
| 544 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
||
| 545 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
||
| 546 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
||
| 547 | \ |
||
| 548 | ((REGTRIG) == ADC_SOFTWARE_START) ) |
||
| 549 | #endif |
||
| 550 | #if defined (STM32F101xE) || defined (STM32F101xG) |
||
| 551 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
||
| 552 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
||
| 553 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
||
| 554 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
||
| 555 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
||
| 556 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
||
| 557 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \ |
||
| 558 | \ |
||
| 559 | ((REGTRIG) == ADC_SOFTWARE_START) ) |
||
| 560 | #endif |
||
| 561 | #if defined (STM32F103xE) || defined (STM32F103xG) |
||
| 562 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
||
| 563 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
||
| 564 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
||
| 565 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
||
| 566 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
||
| 567 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
||
| 568 | \ |
||
| 569 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \ |
||
| 570 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \ |
||
| 571 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \ |
||
| 572 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \ |
||
| 573 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \ |
||
| 574 | \ |
||
| 575 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \ |
||
| 576 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \ |
||
| 577 | ((REGTRIG) == ADC_SOFTWARE_START) ) |
||
| 578 | #endif |
||
| 579 | |||
| 580 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) |
||
| 581 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
||
| 582 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
||
| 583 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
||
| 584 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
||
| 585 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
||
| 586 | \ |
||
| 587 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
||
| 588 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
||
| 589 | \ |
||
| 590 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) ) |
||
| 591 | #endif |
||
| 592 | #if defined (STM32F101xE) || defined (STM32F101xG) |
||
| 593 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
||
| 594 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
||
| 595 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
||
| 596 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
||
| 597 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
||
| 598 | \ |
||
| 599 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
||
| 600 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
||
| 601 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ |
||
| 602 | \ |
||
| 603 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) ) |
||
| 604 | #endif |
||
| 605 | #if defined (STM32F103xE) || defined (STM32F103xG) |
||
| 606 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
||
| 607 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
||
| 608 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
||
| 609 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
||
| 610 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ |
||
| 611 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
||
| 612 | \ |
||
| 613 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ |
||
| 614 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \ |
||
| 615 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \ |
||
| 616 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ |
||
| 617 | \ |
||
| 618 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
||
| 619 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
||
| 620 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ |
||
| 621 | \ |
||
| 622 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) ) |
||
| 623 | #endif |
||
| 624 | |||
| 625 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 626 | #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ |
||
| 627 | ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ |
||
| 628 | ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ |
||
| 629 | ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \ |
||
| 630 | ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \ |
||
| 631 | ((MODE) == ADC_DUALMODE_INJECSIMULT) || \ |
||
| 632 | ((MODE) == ADC_DUALMODE_REGSIMULT) || \ |
||
| 633 | ((MODE) == ADC_DUALMODE_INTERLFAST) || \ |
||
| 634 | ((MODE) == ADC_DUALMODE_INTERLSLOW) || \ |
||
| 635 | ((MODE) == ADC_DUALMODE_ALTERTRIG) ) |
||
| 636 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 637 | |||
| 638 | /** |
||
| 639 | * @} |
||
| 640 | */ |
||
| 641 | |||
| 642 | |||
| 643 | |||
| 644 | |||
| 645 | |||
| 646 | |||
| 647 | /* Exported functions --------------------------------------------------------*/ |
||
| 648 | /** @addtogroup ADCEx_Exported_Functions |
||
| 649 | * @{ |
||
| 650 | */ |
||
| 651 | |||
| 652 | /* IO operation functions *****************************************************/ |
||
| 653 | /** @addtogroup ADCEx_Exported_Functions_Group1 |
||
| 654 | * @{ |
||
| 655 | */ |
||
| 656 | |||
| 657 | /* ADC calibration */ |
||
| 658 | HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc); |
||
| 659 | |||
| 660 | /* Blocking mode: Polling */ |
||
| 661 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); |
||
| 662 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); |
||
| 663 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
||
| 664 | |||
| 665 | /* Non-blocking mode: Interruption */ |
||
| 666 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); |
||
| 667 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); |
||
| 668 | |||
| 669 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 670 | /* ADC multimode */ |
||
| 671 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length); |
||
| 672 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); |
||
| 673 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 674 | |||
| 675 | /* ADC retrieve conversion value intended to be used with polling or interruption */ |
||
| 676 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); |
||
| 677 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 678 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc); |
||
| 679 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 680 | |||
| 681 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ |
||
| 682 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); |
||
| 683 | /** |
||
| 684 | * @} |
||
| 685 | */ |
||
| 686 | |||
| 687 | |||
| 688 | /* Peripheral Control functions ***********************************************/ |
||
| 689 | /** @addtogroup ADCEx_Exported_Functions_Group2 |
||
| 690 | * @{ |
||
| 691 | */ |
||
| 692 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); |
||
| 693 | #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
||
| 694 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode); |
||
| 695 | #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
||
| 696 | /** |
||
| 697 | * @} |
||
| 698 | */ |
||
| 699 | |||
| 700 | |||
| 701 | /** |
||
| 702 | * @} |
||
| 703 | */ |
||
| 704 | |||
| 705 | |||
| 706 | /** |
||
| 707 | * @} |
||
| 708 | */ |
||
| 709 | |||
| 710 | /** |
||
| 711 | * @} |
||
| 712 | */ |
||
| 713 | |||
| 714 | #ifdef __cplusplus |
||
| 715 | } |
||
| 716 | #endif |
||
| 717 | |||
| 718 | #endif /* __STM32F1xx_HAL_ADC_EX_H */ |
||
| 719 | |||
| 720 | |||
| 721 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |