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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f0xx_ll_usart.c |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief USART LL module driver. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 10 | * All rights reserved.</center></h2> |
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| 11 | * |
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| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | #if defined(USE_FULL_LL_DRIVER) |
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| 20 | |||
| 21 | /* Includes ------------------------------------------------------------------*/ |
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| 22 | #include "stm32f0xx_ll_usart.h" |
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| 23 | #include "stm32f0xx_ll_rcc.h" |
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| 24 | #include "stm32f0xx_ll_bus.h" |
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| 25 | #ifdef USE_FULL_ASSERT |
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| 26 | #include "stm32_assert.h" |
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| 27 | #else |
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| 28 | #define assert_param(expr) ((void)0U) |
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| 29 | #endif /* USE_FULL_ASSERT */ |
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| 30 | |||
| 31 | /** @addtogroup STM32F0xx_LL_Driver |
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| 32 | * @{ |
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| 33 | */ |
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| 34 | |||
| 35 | #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5) || defined (USART6) || defined (USART7) || defined (USART8) |
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| 36 | |||
| 37 | /** @addtogroup USART_LL |
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| 38 | * @{ |
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| 39 | */ |
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| 40 | |||
| 41 | /* Private types -------------------------------------------------------------*/ |
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| 42 | /* Private variables ---------------------------------------------------------*/ |
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| 43 | /* Private constants ---------------------------------------------------------*/ |
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| 44 | /* Private macros ------------------------------------------------------------*/ |
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| 45 | /** @addtogroup USART_LL_Private_Macros |
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| 46 | * @{ |
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| 47 | */ |
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| 48 | |||
| 49 | /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available |
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| 50 | * divided by the smallest oversampling used on the USART (i.e. 8) */ |
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| 51 | #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 6000000U) |
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| 52 | |||
| 53 | /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */ |
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| 54 | #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U) |
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| 55 | |||
| 56 | #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ |
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| 57 | || ((__VALUE__) == LL_USART_DIRECTION_RX) \ |
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| 58 | || ((__VALUE__) == LL_USART_DIRECTION_TX) \ |
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| 59 | || ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) |
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| 60 | |||
| 61 | #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ |
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| 62 | || ((__VALUE__) == LL_USART_PARITY_EVEN) \ |
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| 63 | || ((__VALUE__) == LL_USART_PARITY_ODD)) |
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| 64 | |||
| 65 | #if defined(USART_7BITS_SUPPORT) |
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| 66 | #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \ |
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| 67 | || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \ |
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| 68 | || ((__VALUE__) == LL_USART_DATAWIDTH_9B)) |
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| 69 | #else |
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| 70 | #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \ |
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| 71 | || ((__VALUE__) == LL_USART_DATAWIDTH_9B)) |
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| 72 | #endif /* USART_7BITS_SUPPORT */ |
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| 73 | |||
| 74 | #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ |
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| 75 | || ((__VALUE__) == LL_USART_OVERSAMPLING_8)) |
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| 76 | |||
| 77 | #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \ |
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| 78 | || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT)) |
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| 79 | |||
| 80 | #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \ |
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| 81 | || ((__VALUE__) == LL_USART_PHASE_2EDGE)) |
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| 82 | |||
| 83 | #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \ |
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| 84 | || ((__VALUE__) == LL_USART_POLARITY_HIGH)) |
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| 85 | |||
| 86 | #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \ |
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| 87 | || ((__VALUE__) == LL_USART_CLOCK_ENABLE)) |
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| 88 | |||
| 89 | #if defined(USART_SMARTCARD_SUPPORT) |
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| 90 | #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \ |
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| 91 | || ((__VALUE__) == LL_USART_STOPBITS_1) \ |
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| 92 | || ((__VALUE__) == LL_USART_STOPBITS_1_5) \ |
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| 93 | || ((__VALUE__) == LL_USART_STOPBITS_2)) |
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| 94 | #else |
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| 95 | #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_1) \ |
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| 96 | || ((__VALUE__) == LL_USART_STOPBITS_2)) |
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| 97 | #endif |
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| 98 | |||
| 99 | #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \ |
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| 100 | || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \ |
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| 101 | || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \ |
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| 102 | || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS)) |
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| 103 | |||
| 104 | /** |
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| 105 | * @} |
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| 106 | */ |
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| 107 | |||
| 108 | /* Private function prototypes -----------------------------------------------*/ |
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| 109 | |||
| 110 | /* Exported functions --------------------------------------------------------*/ |
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| 111 | /** @addtogroup USART_LL_Exported_Functions |
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| 112 | * @{ |
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| 113 | */ |
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| 114 | |||
| 115 | /** @addtogroup USART_LL_EF_Init |
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| 116 | * @{ |
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| 117 | */ |
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| 118 | |||
| 119 | /** |
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| 120 | * @brief De-initialize USART registers (Registers restored to their default values). |
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| 121 | * @param USARTx USART Instance |
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| 122 | * @retval An ErrorStatus enumeration value: |
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| 123 | * - SUCCESS: USART registers are de-initialized |
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| 124 | * - ERROR: USART registers are not de-initialized |
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| 125 | */ |
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| 126 | ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx) |
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| 127 | { |
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| 128 | ErrorStatus status = SUCCESS; |
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| 129 | |||
| 130 | /* Check the parameters */ |
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| 131 | assert_param(IS_UART_INSTANCE(USARTx)); |
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| 132 | |||
| 133 | if (USARTx == USART1) |
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| 134 | { |
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| 135 | /* Force reset of USART clock */ |
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| 136 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART1); |
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| 137 | |||
| 138 | /* Release reset of USART clock */ |
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| 139 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART1); |
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| 140 | } |
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| 141 | #if defined(USART2) |
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| 142 | else if (USARTx == USART2) |
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| 143 | { |
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| 144 | /* Force reset of USART clock */ |
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| 145 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2); |
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| 146 | |||
| 147 | /* Release reset of USART clock */ |
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| 148 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2); |
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| 149 | } |
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| 150 | #endif /* USART2 */ |
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| 151 | #if defined(USART3) |
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| 152 | else if (USARTx == USART3) |
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| 153 | { |
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| 154 | /* Force reset of USART clock */ |
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| 155 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3); |
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| 156 | |||
| 157 | /* Release reset of USART clock */ |
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| 158 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3); |
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| 159 | } |
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| 160 | #endif /* USART3 */ |
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| 161 | #if defined(USART4) |
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| 162 | else if (USARTx == USART4) |
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| 163 | { |
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| 164 | /* Force reset of USART clock */ |
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| 165 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4); |
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| 166 | |||
| 167 | /* Release reset of USART clock */ |
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| 168 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4); |
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| 169 | } |
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| 170 | #endif /* USART4 */ |
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| 171 | #if defined(USART5) |
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| 172 | else if (USARTx == USART5) |
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| 173 | { |
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| 174 | /* Force reset of USART clock */ |
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| 175 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5); |
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| 176 | |||
| 177 | /* Release reset of USART clock */ |
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| 178 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5); |
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| 179 | } |
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| 180 | #endif /* USART5 */ |
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| 181 | #if defined(USART6) |
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| 182 | else if (USARTx == USART6) |
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| 183 | { |
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| 184 | /* Force reset of USART clock */ |
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| 185 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART6); |
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| 186 | |||
| 187 | /* Release reset of USART clock */ |
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| 188 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART6); |
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| 189 | } |
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| 190 | #endif /* USART6 */ |
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| 191 | #if defined(USART7) |
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| 192 | else if (USARTx == USART7) |
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| 193 | { |
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| 194 | /* Force reset of USART clock */ |
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| 195 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART7); |
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| 196 | |||
| 197 | /* Release reset of USART clock */ |
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| 198 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART7); |
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| 199 | } |
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| 200 | #endif /* USART7 */ |
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| 201 | #if defined(USART8) |
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| 202 | else if (USARTx == USART8) |
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| 203 | { |
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| 204 | /* Force reset of USART clock */ |
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| 205 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART8); |
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| 206 | |||
| 207 | /* Release reset of USART clock */ |
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| 208 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART8); |
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| 209 | } |
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| 210 | #endif /* USART8 */ |
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| 211 | else |
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| 212 | { |
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| 213 | status = ERROR; |
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| 214 | } |
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| 215 | |||
| 216 | return (status); |
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| 217 | } |
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| 218 | |||
| 219 | /** |
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| 220 | * @brief Initialize USART registers according to the specified |
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| 221 | * parameters in USART_InitStruct. |
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| 222 | * @note As some bits in USART configuration registers can only be written when |
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| 223 | * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling |
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| 224 | * this function. Otherwise, ERROR result will be returned. |
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| 225 | * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0). |
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| 226 | * @param USARTx USART Instance |
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| 227 | * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure |
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| 228 | * that contains the configuration information for the specified USART peripheral. |
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| 229 | * @retval An ErrorStatus enumeration value: |
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| 230 | * - SUCCESS: USART registers are initialized according to USART_InitStruct content |
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| 231 | * - ERROR: Problem occurred during USART Registers initialization |
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| 232 | */ |
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| 233 | ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct) |
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| 234 | { |
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| 235 | ErrorStatus status = ERROR; |
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| 236 | uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO; |
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| 237 | #if defined(USART2)||defined(USART3)||defined(USART4) |
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| 238 | LL_RCC_ClocksTypeDef RCC_Clocks; |
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| 239 | #endif /* USART2 ||USART3 || USART4 */ |
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| 240 | |||
| 241 | /* Check the parameters */ |
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| 242 | assert_param(IS_UART_INSTANCE(USARTx)); |
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| 243 | assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate)); |
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| 244 | assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth)); |
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| 245 | assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits)); |
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| 246 | assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity)); |
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| 247 | assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection)); |
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| 248 | assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl)); |
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| 249 | assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling)); |
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| 250 | |||
| 251 | /* USART needs to be in disabled state, in order to be able to configure some bits in |
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| 252 | CRx registers */ |
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| 253 | if (LL_USART_IsEnabled(USARTx) == 0U) |
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| 254 | { |
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| 255 | /*---------------------------- USART CR1 Configuration --------------------- |
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| 256 | * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters: |
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| 257 | * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value |
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| 258 | * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value |
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| 259 | * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value |
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| 260 | * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value. |
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| 261 | */ |
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| 262 | MODIFY_REG(USARTx->CR1, |
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| 263 | (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | |
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| 264 | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), |
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| 265 | (USART_InitStruct->DataWidth | USART_InitStruct->Parity | |
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| 266 | USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling)); |
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| 267 | |||
| 268 | /*---------------------------- USART CR2 Configuration --------------------- |
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| 269 | * Configure USARTx CR2 (Stop bits) with parameters: |
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| 270 | * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value. |
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| 271 | * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit(). |
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| 272 | */ |
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| 273 | LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits); |
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| 274 | |||
| 275 | /*---------------------------- USART CR3 Configuration --------------------- |
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| 276 | * Configure USARTx CR3 (Hardware Flow Control) with parameters: |
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| 277 | * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to |
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| 278 | * USART_InitStruct->HardwareFlowControl value. |
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| 279 | */ |
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| 280 | LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl); |
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| 281 | |||
| 282 | /*---------------------------- USART BRR Configuration --------------------- |
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| 283 | * Retrieve Clock frequency used for USART Peripheral |
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| 284 | */ |
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| 285 | if (USARTx == USART1) |
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| 286 | { |
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| 287 | periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE); |
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| 288 | } |
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| 289 | #if defined(USART2) |
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| 290 | else if (USARTx == USART2) |
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| 291 | { |
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| 292 | #if defined(RCC_CFGR3_USART2SW) |
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| 293 | periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE); |
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| 294 | #else |
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| 295 | /* USART2 clock is PCLK */ |
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| 296 | LL_RCC_GetSystemClocksFreq(&RCC_Clocks); |
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| 297 | periphclk = RCC_Clocks.PCLK1_Frequency; |
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| 298 | #endif |
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| 299 | } |
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| 300 | #endif /* USART2 */ |
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| 301 | #if defined(USART3) |
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| 302 | else if (USARTx == USART3) |
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| 303 | { |
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| 304 | #if defined(RCC_CFGR3_USART3SW) |
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| 305 | periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE); |
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| 306 | #else |
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| 307 | /* USART3 clock is PCLK */ |
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| 308 | LL_RCC_GetSystemClocksFreq(&RCC_Clocks); |
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| 309 | periphclk = RCC_Clocks.PCLK1_Frequency; |
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| 310 | #endif |
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| 311 | } |
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| 312 | #endif /* USART3 */ |
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| 313 | #if defined(USART4) |
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| 314 | else if (USARTx == USART4) |
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| 315 | { |
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| 316 | /* USART4 clock is PCLK1 */ |
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| 317 | LL_RCC_GetSystemClocksFreq(&RCC_Clocks); |
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| 318 | periphclk = RCC_Clocks.PCLK1_Frequency; |
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| 319 | } |
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| 320 | #endif /* USART4 */ |
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| 321 | #if defined(USART5) |
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| 322 | else if (USARTx == USART5) |
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| 323 | { |
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| 324 | /* USART5 clock is PCLK1 */ |
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| 325 | LL_RCC_GetSystemClocksFreq(&RCC_Clocks); |
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| 326 | periphclk = RCC_Clocks.PCLK1_Frequency; |
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| 327 | } |
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| 328 | #endif /* USART5 */ |
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| 329 | #if defined(USART6) |
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| 330 | else if (USARTx == USART6) |
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| 331 | { |
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| 332 | /* USART6 clock is PCLK1 */ |
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| 333 | LL_RCC_GetSystemClocksFreq(&RCC_Clocks); |
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| 334 | periphclk = RCC_Clocks.PCLK1_Frequency; |
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| 335 | } |
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| 336 | #endif /* USART6 */ |
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| 337 | #if defined(USART7) |
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| 338 | else if (USARTx == USART7) |
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| 339 | { |
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| 340 | /* USART7 clock is PCLK */ |
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| 341 | LL_RCC_GetSystemClocksFreq(&RCC_Clocks); |
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| 342 | periphclk = RCC_Clocks.PCLK1_Frequency; |
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| 343 | } |
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| 344 | #endif /* USART7 */ |
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| 345 | #if defined(USART8) |
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| 346 | else if (USARTx == USART8) |
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| 347 | { |
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| 348 | /* USART8 clock is PCLK */ |
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| 349 | LL_RCC_GetSystemClocksFreq(&RCC_Clocks); |
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| 350 | periphclk = RCC_Clocks.PCLK1_Frequency; |
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| 351 | } |
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| 352 | #endif /* USART8 */ |
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| 353 | else |
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| 354 | { |
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| 355 | /* Nothing to do, as error code is already assigned to ERROR value */ |
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| 356 | } |
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| 357 | |||
| 358 | /* Configure the USART Baud Rate : |
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| 359 | - valid baud rate value (different from 0) is required |
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| 360 | - Peripheral clock as returned by RCC service, should be valid (different from 0). |
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| 361 | */ |
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| 362 | if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO) |
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| 363 | && (USART_InitStruct->BaudRate != 0U)) |
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| 364 | { |
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| 365 | status = SUCCESS; |
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| 366 | LL_USART_SetBaudRate(USARTx, |
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| 367 | periphclk, |
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| 368 | USART_InitStruct->OverSampling, |
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| 369 | USART_InitStruct->BaudRate); |
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| 370 | |||
| 371 | /* Check BRR is greater than or equal to 16d */ |
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| 372 | assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR)); |
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| 373 | } |
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| 374 | } |
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| 375 | /* Endif (=> USART not in Disabled state => return ERROR) */ |
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| 376 | |||
| 377 | return (status); |
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| 378 | } |
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| 379 | |||
| 380 | /** |
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| 381 | * @brief Set each @ref LL_USART_InitTypeDef field to default value. |
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| 382 | * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure |
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| 383 | * whose fields will be set to default values. |
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| 384 | * @retval None |
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| 385 | */ |
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| 386 | |||
| 387 | void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct) |
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| 388 | { |
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| 389 | /* Set USART_InitStruct fields to default values */ |
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| 390 | USART_InitStruct->BaudRate = 9600U; |
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| 391 | USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B; |
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| 392 | USART_InitStruct->StopBits = LL_USART_STOPBITS_1; |
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| 393 | USART_InitStruct->Parity = LL_USART_PARITY_NONE ; |
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| 394 | USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX; |
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| 395 | USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE; |
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| 396 | USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16; |
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| 397 | } |
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| 398 | |||
| 399 | /** |
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| 400 | * @brief Initialize USART Clock related settings according to the |
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| 401 | * specified parameters in the USART_ClockInitStruct. |
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| 402 | * @note As some bits in USART configuration registers can only be written when |
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| 403 | * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling |
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| 404 | * this function. Otherwise, ERROR result will be returned. |
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| 405 | * @param USARTx USART Instance |
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| 406 | * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure |
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| 407 | * that contains the Clock configuration information for the specified USART peripheral. |
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| 408 | * @retval An ErrorStatus enumeration value: |
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| 409 | * - SUCCESS: USART registers related to Clock settings are initialized according |
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| 410 | * to USART_ClockInitStruct content |
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| 411 | * - ERROR: Problem occurred during USART Registers initialization |
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| 412 | */ |
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| 413 | ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct) |
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| 414 | { |
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| 415 | ErrorStatus status = SUCCESS; |
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| 416 | |||
| 417 | /* Check USART Instance and Clock signal output parameters */ |
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| 418 | assert_param(IS_UART_INSTANCE(USARTx)); |
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| 419 | assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput)); |
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| 420 | |||
| 421 | /* USART needs to be in disabled state, in order to be able to configure some bits in |
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| 422 | CRx registers */ |
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| 423 | if (LL_USART_IsEnabled(USARTx) == 0U) |
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| 424 | { |
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| 425 | /* If USART Clock signal is disabled */ |
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| 426 | if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE) |
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| 427 | { |
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| 428 | /* Deactivate Clock signal delivery : |
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| 429 | * - Disable Clock Output: USART_CR2_CLKEN cleared |
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| 430 | */ |
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| 431 | LL_USART_DisableSCLKOutput(USARTx); |
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| 432 | } |
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| 433 | else |
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| 434 | { |
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| 435 | /* Ensure USART instance is USART capable */ |
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| 436 | assert_param(IS_USART_INSTANCE(USARTx)); |
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| 437 | |||
| 438 | /* Check clock related parameters */ |
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| 439 | assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity)); |
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| 440 | assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase)); |
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| 441 | assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse)); |
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| 442 | |||
| 443 | /*---------------------------- USART CR2 Configuration ----------------------- |
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| 444 | * Configure USARTx CR2 (Clock signal related bits) with parameters: |
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| 445 | * - Enable Clock Output: USART_CR2_CLKEN set |
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| 446 | * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value |
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| 447 | * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value |
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| 448 | * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value. |
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| 449 | */ |
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| 450 | MODIFY_REG(USARTx->CR2, |
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| 451 | USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, |
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| 452 | USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity | |
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| 453 | USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse); |
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| 454 | } |
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| 455 | } |
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| 456 | /* Else (USART not in Disabled state => return ERROR */ |
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| 457 | else |
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| 458 | { |
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| 459 | status = ERROR; |
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| 460 | } |
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| 461 | |||
| 462 | return (status); |
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| 463 | } |
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| 464 | |||
| 465 | /** |
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| 466 | * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value. |
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| 467 | * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure |
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| 468 | * whose fields will be set to default values. |
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| 469 | * @retval None |
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| 470 | */ |
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| 471 | void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct) |
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| 472 | { |
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| 473 | /* Set LL_USART_ClockInitStruct fields with default values */ |
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| 474 | USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE; |
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| 475 | USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = |
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| 476 | LL_USART_CLOCK_DISABLE */ |
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| 477 | USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = |
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| 478 | LL_USART_CLOCK_DISABLE */ |
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| 479 | USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = |
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| 480 | LL_USART_CLOCK_DISABLE */ |
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| 481 | } |
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| 482 | |||
| 483 | /** |
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| 484 | * @} |
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| 485 | */ |
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| 486 | |||
| 487 | /** |
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| 488 | * @} |
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| 489 | */ |
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| 490 | |||
| 491 | /** |
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| 492 | * @} |
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| 493 | */ |
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| 494 | |||
| 495 | #endif /* USART1 || USART2 || USART3 || UART4 || UART5 || USART6 || USART7 || USART8 */ |
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| 496 | |||
| 497 | /** |
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| 498 | * @} |
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| 499 | */ |
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| 500 | |||
| 501 | #endif /* USE_FULL_LL_DRIVER */ |
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| 502 | |||
| 503 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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| 504 |