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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f0xx_hal_tim_ex.c |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief TIM HAL module driver. |
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| 6 | * This file provides firmware functions to manage the following |
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| 7 | * functionalities of the Timer Extended peripheral: |
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| 8 | * + Time Hall Sensor Interface Initialization |
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| 9 | * + Time Hall Sensor Interface Start |
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| 10 | * + Time Complementary signal break and dead time configuration |
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| 11 | * + Time Master and Slave synchronization configuration |
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| 12 | * + Time OCRef clear configuration |
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| 13 | * + Timer remapping capabilities configuration |
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| 14 | @verbatim |
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| 15 | ============================================================================== |
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| 16 | ##### TIMER Extended features ##### |
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| 17 | ============================================================================== |
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| 18 | [..] |
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| 19 | The Timer Extended features include: |
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| 20 | (#) Complementary outputs with programmable dead-time for : |
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| 21 | (++) Output Compare |
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| 22 | (++) PWM generation (Edge and Center-aligned Mode) |
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| 23 | (++) One-pulse mode output |
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| 24 | (#) Synchronization circuit to control the timer with external signals and to |
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| 25 | interconnect several timers together. |
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| 26 | (#) Break input to put the timer output signals in reset state or in a known state. |
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| 27 | (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for |
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| 28 | positioning purposes |
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| 29 | |||
| 30 | ##### How to use this driver ##### |
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| 31 | ============================================================================== |
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| 32 | [..] |
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| 33 | (#) Initialize the TIM low level resources by implementing the following functions |
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| 34 | depending on the selected feature: |
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| 35 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() |
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| 36 | |||
| 37 | (#) Initialize the TIM low level resources : |
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| 38 | (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); |
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| 39 | (##) TIM pins configuration |
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| 40 | (+++) Enable the clock for the TIM GPIOs using the following function: |
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| 41 | __HAL_RCC_GPIOx_CLK_ENABLE(); |
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| 42 | (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); |
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| 43 | |||
| 44 | (#) The external Clock can be configured, if needed (the default clock is the |
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| 45 | internal clock from the APBx), using the following function: |
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| 46 | HAL_TIM_ConfigClockSource, the clock configuration should be done before |
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| 47 | any start function. |
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| 48 | |||
| 49 | (#) Configure the TIM in the desired functioning mode using one of the |
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| 50 | initialization function of this driver: |
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| 51 | (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the |
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| 52 | Timer Hall Sensor Interface and the commutation event with the corresponding |
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| 53 | Interrupt and DMA request if needed (Note that One Timer is used to interface |
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| 54 | with the Hall sensor Interface and another Timer should be used to use |
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| 55 | the commutation event). |
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| 56 | |||
| 57 | (#) Activate the TIM peripheral using one of the start functions: |
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| 58 | (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() |
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| 59 | (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() |
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| 60 | (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() |
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| 61 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). |
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| 62 | |||
| 63 | @endverbatim |
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| 64 | ****************************************************************************** |
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| 65 | * @attention |
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| 66 | * |
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| 67 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 68 | * All rights reserved.</center></h2> |
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| 69 | * |
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| 70 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 71 | * the "License"; You may not use this file except in compliance with the |
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| 72 | * License. You may obtain a copy of the License at: |
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| 73 | * opensource.org/licenses/BSD-3-Clause |
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| 74 | * |
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| 75 | ****************************************************************************** |
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| 76 | */ |
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| 77 | |||
| 78 | /* Includes ------------------------------------------------------------------*/ |
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| 79 | #include "stm32f0xx_hal.h" |
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| 80 | |||
| 81 | /** @addtogroup STM32F0xx_HAL_Driver |
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| 82 | * @{ |
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| 83 | */ |
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| 84 | |||
| 85 | /** @defgroup TIMEx TIMEx |
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| 86 | * @brief TIM Extended HAL module driver |
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| 87 | * @{ |
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| 88 | */ |
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| 89 | |||
| 90 | #ifdef HAL_TIM_MODULE_ENABLED |
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| 91 | |||
| 92 | /* Private typedef -----------------------------------------------------------*/ |
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| 93 | /* Private define ------------------------------------------------------------*/ |
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| 94 | /* Private macro -------------------------------------------------------------*/ |
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| 95 | /* Private variables ---------------------------------------------------------*/ |
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| 96 | /* Private function prototypes -----------------------------------------------*/ |
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| 97 | static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState); |
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| 98 | |||
| 99 | /* Exported functions --------------------------------------------------------*/ |
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| 100 | /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions |
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| 101 | * @{ |
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| 102 | */ |
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| 103 | |||
| 104 | /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions |
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| 105 | * @brief Timer Hall Sensor functions |
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| 106 | * |
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| 107 | @verbatim |
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| 108 | ============================================================================== |
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| 109 | ##### Timer Hall Sensor functions ##### |
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| 110 | ============================================================================== |
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| 111 | [..] |
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| 112 | This section provides functions allowing to: |
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| 113 | (+) Initialize and configure TIM HAL Sensor. |
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| 114 | (+) De-initialize TIM HAL Sensor. |
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| 115 | (+) Start the Hall Sensor Interface. |
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| 116 | (+) Stop the Hall Sensor Interface. |
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| 117 | (+) Start the Hall Sensor Interface and enable interrupts. |
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| 118 | (+) Stop the Hall Sensor Interface and disable interrupts. |
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| 119 | (+) Start the Hall Sensor Interface and enable DMA transfers. |
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| 120 | (+) Stop the Hall Sensor Interface and disable DMA transfers. |
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| 121 | |||
| 122 | @endverbatim |
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| 123 | * @{ |
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| 124 | */ |
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| 125 | /** |
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| 126 | * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle. |
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| 127 | * @param htim TIM Hall Sensor Interface handle |
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| 128 | * @param sConfig TIM Hall Sensor configuration structure |
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| 129 | * @retval HAL status |
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| 130 | */ |
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| 131 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig) |
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| 132 | { |
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| 133 | TIM_OC_InitTypeDef OC_Config; |
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| 134 | |||
| 135 | /* Check the TIM handle allocation */ |
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| 136 | if (htim == NULL) |
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| 137 | { |
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| 138 | return HAL_ERROR; |
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| 139 | } |
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| 140 | |||
| 141 | /* Check the parameters */ |
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| 142 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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| 143 | assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); |
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| 144 | assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); |
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| 145 | assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); |
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| 146 | assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); |
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| 147 | assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); |
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| 148 | assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); |
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| 149 | |||
| 150 | if (htim->State == HAL_TIM_STATE_RESET) |
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| 151 | { |
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| 152 | /* Allocate lock resource and initialize it */ |
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| 153 | htim->Lock = HAL_UNLOCKED; |
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| 154 | |||
| 155 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) |
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| 156 | /* Reset interrupt callbacks to legacy week callbacks */ |
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| 157 | TIM_ResetCallback(htim); |
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| 158 | |||
| 159 | if (htim->HallSensor_MspInitCallback == NULL) |
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| 160 | { |
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| 161 | htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; |
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| 162 | } |
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| 163 | /* Init the low level hardware : GPIO, CLOCK, NVIC */ |
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| 164 | htim->HallSensor_MspInitCallback(htim); |
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| 165 | #else |
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| 166 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
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| 167 | HAL_TIMEx_HallSensor_MspInit(htim); |
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| 168 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ |
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| 169 | } |
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| 170 | |||
| 171 | /* Set the TIM state */ |
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| 172 | htim->State = HAL_TIM_STATE_BUSY; |
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| 173 | |||
| 174 | /* Configure the Time base in the Encoder Mode */ |
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| 175 | TIM_Base_SetConfig(htim->Instance, &htim->Init); |
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| 176 | |||
| 177 | /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ |
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| 178 | TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); |
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| 179 | |||
| 180 | /* Reset the IC1PSC Bits */ |
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| 181 | htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; |
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| 182 | /* Set the IC1PSC value */ |
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| 183 | htim->Instance->CCMR1 |= sConfig->IC1Prescaler; |
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| 184 | |||
| 185 | /* Enable the Hall sensor interface (XOR function of the three inputs) */ |
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| 186 | htim->Instance->CR2 |= TIM_CR2_TI1S; |
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| 187 | |||
| 188 | /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ |
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| 189 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
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| 190 | htim->Instance->SMCR |= TIM_TS_TI1F_ED; |
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| 191 | |||
| 192 | /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ |
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| 193 | htim->Instance->SMCR &= ~TIM_SMCR_SMS; |
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| 194 | htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; |
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| 195 | |||
| 196 | /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ |
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| 197 | OC_Config.OCFastMode = TIM_OCFAST_DISABLE; |
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| 198 | OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; |
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| 199 | OC_Config.OCMode = TIM_OCMODE_PWM2; |
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| 200 | OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
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| 201 | OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; |
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| 202 | OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; |
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| 203 | OC_Config.Pulse = sConfig->Commutation_Delay; |
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| 204 | |||
| 205 | TIM_OC2_SetConfig(htim->Instance, &OC_Config); |
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| 206 | |||
| 207 | /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 |
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| 208 | register to 101 */ |
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| 209 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
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| 210 | htim->Instance->CR2 |= TIM_TRGO_OC2REF; |
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| 211 | |||
| 212 | /* Initialize the TIM state*/ |
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| 213 | htim->State = HAL_TIM_STATE_READY; |
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| 214 | |||
| 215 | return HAL_OK; |
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| 216 | } |
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| 217 | |||
| 218 | /** |
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| 219 | * @brief DeInitializes the TIM Hall Sensor interface |
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| 220 | * @param htim TIM Hall Sensor Interface handle |
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| 221 | * @retval HAL status |
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| 222 | */ |
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| 223 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) |
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| 224 | { |
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| 225 | /* Check the parameters */ |
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| 226 | assert_param(IS_TIM_INSTANCE(htim->Instance)); |
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| 227 | |||
| 228 | htim->State = HAL_TIM_STATE_BUSY; |
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| 229 | |||
| 230 | /* Disable the TIM Peripheral Clock */ |
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| 231 | __HAL_TIM_DISABLE(htim); |
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| 232 | |||
| 233 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) |
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| 234 | if (htim->HallSensor_MspDeInitCallback == NULL) |
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| 235 | { |
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| 236 | htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; |
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| 237 | } |
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| 238 | /* DeInit the low level hardware */ |
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| 239 | htim->HallSensor_MspDeInitCallback(htim); |
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| 240 | #else |
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| 241 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
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| 242 | HAL_TIMEx_HallSensor_MspDeInit(htim); |
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| 243 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ |
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| 244 | |||
| 245 | /* Change TIM state */ |
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| 246 | htim->State = HAL_TIM_STATE_RESET; |
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| 247 | |||
| 248 | /* Release Lock */ |
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| 249 | __HAL_UNLOCK(htim); |
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| 250 | |||
| 251 | return HAL_OK; |
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| 252 | } |
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| 253 | |||
| 254 | /** |
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| 255 | * @brief Initializes the TIM Hall Sensor MSP. |
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| 256 | * @param htim TIM Hall Sensor Interface handle |
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| 257 | * @retval None |
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| 258 | */ |
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| 259 | __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) |
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| 260 | { |
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| 261 | /* Prevent unused argument(s) compilation warning */ |
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| 262 | UNUSED(htim); |
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| 263 | |||
| 264 | /* NOTE : This function should not be modified, when the callback is needed, |
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| 265 | the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file |
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| 266 | */ |
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| 267 | } |
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| 268 | |||
| 269 | /** |
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| 270 | * @brief DeInitializes TIM Hall Sensor MSP. |
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| 271 | * @param htim TIM Hall Sensor Interface handle |
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| 272 | * @retval None |
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| 273 | */ |
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| 274 | __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) |
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| 275 | { |
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| 276 | /* Prevent unused argument(s) compilation warning */ |
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| 277 | UNUSED(htim); |
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| 278 | |||
| 279 | /* NOTE : This function should not be modified, when the callback is needed, |
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| 280 | the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file |
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| 281 | */ |
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| 282 | } |
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| 283 | |||
| 284 | /** |
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| 285 | * @brief Starts the TIM Hall Sensor Interface. |
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| 286 | * @param htim TIM Hall Sensor Interface handle |
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| 287 | * @retval HAL status |
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| 288 | */ |
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| 289 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) |
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| 290 | { |
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| 291 | uint32_t tmpsmcr; |
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| 292 | |||
| 293 | /* Check the parameters */ |
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| 294 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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| 295 | |||
| 296 | /* Enable the Input Capture channel 1 |
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| 297 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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| 298 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
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| 299 | |||
| 300 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
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| 301 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
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| 302 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
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| 303 | { |
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| 304 | __HAL_TIM_ENABLE(htim); |
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| 305 | } |
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| 306 | |||
| 307 | /* Return function status */ |
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| 308 | return HAL_OK; |
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| 309 | } |
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| 310 | |||
| 311 | /** |
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| 312 | * @brief Stops the TIM Hall sensor Interface. |
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| 313 | * @param htim TIM Hall Sensor Interface handle |
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| 314 | * @retval HAL status |
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| 315 | */ |
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| 316 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) |
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| 317 | { |
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| 318 | /* Check the parameters */ |
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| 319 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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| 320 | |||
| 321 | /* Disable the Input Capture channels 1, 2 and 3 |
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| 322 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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| 323 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
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| 324 | |||
| 325 | /* Disable the Peripheral */ |
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| 326 | __HAL_TIM_DISABLE(htim); |
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| 327 | |||
| 328 | /* Return function status */ |
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| 329 | return HAL_OK; |
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| 330 | } |
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| 331 | |||
| 332 | /** |
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| 333 | * @brief Starts the TIM Hall Sensor Interface in interrupt mode. |
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| 334 | * @param htim TIM Hall Sensor Interface handle |
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| 335 | * @retval HAL status |
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| 336 | */ |
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| 337 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) |
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| 338 | { |
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| 339 | uint32_t tmpsmcr; |
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| 340 | |||
| 341 | /* Check the parameters */ |
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| 342 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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| 343 | |||
| 344 | /* Enable the capture compare Interrupts 1 event */ |
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| 345 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
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| 346 | |||
| 347 | /* Enable the Input Capture channel 1 |
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| 348 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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| 349 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
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| 350 | |||
| 351 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
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| 352 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
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| 353 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
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| 354 | { |
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| 355 | __HAL_TIM_ENABLE(htim); |
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| 356 | } |
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| 357 | |||
| 358 | /* Return function status */ |
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| 359 | return HAL_OK; |
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| 360 | } |
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| 361 | |||
| 362 | /** |
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| 363 | * @brief Stops the TIM Hall Sensor Interface in interrupt mode. |
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| 364 | * @param htim TIM Hall Sensor Interface handle |
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| 365 | * @retval HAL status |
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| 366 | */ |
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| 367 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) |
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| 368 | { |
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| 369 | /* Check the parameters */ |
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| 370 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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| 371 | |||
| 372 | /* Disable the Input Capture channel 1 |
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| 373 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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| 374 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
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| 375 | |||
| 376 | /* Disable the capture compare Interrupts event */ |
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| 377 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
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| 378 | |||
| 379 | /* Disable the Peripheral */ |
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| 380 | __HAL_TIM_DISABLE(htim); |
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| 381 | |||
| 382 | /* Return function status */ |
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| 383 | return HAL_OK; |
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| 384 | } |
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| 385 | |||
| 386 | /** |
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| 387 | * @brief Starts the TIM Hall Sensor Interface in DMA mode. |
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| 388 | * @param htim TIM Hall Sensor Interface handle |
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| 389 | * @param pData The destination Buffer address. |
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| 390 | * @param Length The length of data to be transferred from TIM peripheral to memory. |
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| 391 | * @retval HAL status |
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| 392 | */ |
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| 393 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) |
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| 394 | { |
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| 395 | uint32_t tmpsmcr; |
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| 396 | |||
| 397 | /* Check the parameters */ |
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| 398 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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| 399 | |||
| 400 | if (htim->State == HAL_TIM_STATE_BUSY) |
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| 401 | { |
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| 402 | return HAL_BUSY; |
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| 403 | } |
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| 404 | else if (htim->State == HAL_TIM_STATE_READY) |
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| 405 | { |
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| 406 | if (((uint32_t)pData == 0U) && (Length > 0U)) |
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| 407 | { |
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| 408 | return HAL_ERROR; |
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| 409 | } |
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| 410 | else |
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| 411 | { |
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| 412 | htim->State = HAL_TIM_STATE_BUSY; |
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| 413 | } |
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| 414 | } |
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| 415 | else |
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| 416 | { |
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| 417 | /* nothing to do */ |
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| 418 | } |
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| 419 | /* Enable the Input Capture channel 1 |
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| 420 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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| 421 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
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| 422 | |||
| 423 | /* Set the DMA Input Capture 1 Callbacks */ |
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| 424 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; |
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| 425 | htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; |
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| 426 | /* Set the DMA error callback */ |
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| 427 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
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| 428 | |||
| 429 | /* Enable the DMA channel for Capture 1*/ |
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| 430 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK) |
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| 431 | { |
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| 432 | return HAL_ERROR; |
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| 433 | } |
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| 434 | /* Enable the capture compare 1 Interrupt */ |
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| 435 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
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| 436 | |||
| 437 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
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| 438 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
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| 439 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
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| 440 | { |
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| 441 | __HAL_TIM_ENABLE(htim); |
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| 442 | } |
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| 443 | |||
| 444 | /* Return function status */ |
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| 445 | return HAL_OK; |
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| 446 | } |
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| 447 | |||
| 448 | /** |
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| 449 | * @brief Stops the TIM Hall Sensor Interface in DMA mode. |
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| 450 | * @param htim TIM Hall Sensor Interface handle |
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| 451 | * @retval HAL status |
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| 452 | */ |
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| 453 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) |
||
| 454 | { |
||
| 455 | /* Check the parameters */ |
||
| 456 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
||
| 457 | |||
| 458 | /* Disable the Input Capture channel 1 |
||
| 459 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
||
| 460 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
||
| 461 | |||
| 462 | |||
| 463 | /* Disable the capture compare Interrupts 1 event */ |
||
| 464 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
||
| 465 | |||
| 466 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); |
||
| 467 | /* Disable the Peripheral */ |
||
| 468 | __HAL_TIM_DISABLE(htim); |
||
| 469 | |||
| 470 | /* Return function status */ |
||
| 471 | return HAL_OK; |
||
| 472 | } |
||
| 473 | |||
| 474 | /** |
||
| 475 | * @} |
||
| 476 | */ |
||
| 477 | |||
| 478 | /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions |
||
| 479 | * @brief Timer Complementary Output Compare functions |
||
| 480 | * |
||
| 481 | @verbatim |
||
| 482 | ============================================================================== |
||
| 483 | ##### Timer Complementary Output Compare functions ##### |
||
| 484 | ============================================================================== |
||
| 485 | [..] |
||
| 486 | This section provides functions allowing to: |
||
| 487 | (+) Start the Complementary Output Compare/PWM. |
||
| 488 | (+) Stop the Complementary Output Compare/PWM. |
||
| 489 | (+) Start the Complementary Output Compare/PWM and enable interrupts. |
||
| 490 | (+) Stop the Complementary Output Compare/PWM and disable interrupts. |
||
| 491 | (+) Start the Complementary Output Compare/PWM and enable DMA transfers. |
||
| 492 | (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. |
||
| 493 | |||
| 494 | @endverbatim |
||
| 495 | * @{ |
||
| 496 | */ |
||
| 497 | |||
| 498 | /** |
||
| 499 | * @brief Starts the TIM Output Compare signal generation on the complementary |
||
| 500 | * output. |
||
| 501 | * @param htim TIM Output Compare handle |
||
| 502 | * @param Channel TIM Channel to be enabled |
||
| 503 | * This parameter can be one of the following values: |
||
| 504 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 505 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 506 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 507 | * @retval HAL status |
||
| 508 | */ |
||
| 509 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 510 | { |
||
| 511 | uint32_t tmpsmcr; |
||
| 512 | |||
| 513 | /* Check the parameters */ |
||
| 514 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 515 | |||
| 516 | /* Enable the Capture compare channel N */ |
||
| 517 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
| 518 | |||
| 519 | /* Enable the Main Output */ |
||
| 520 | __HAL_TIM_MOE_ENABLE(htim); |
||
| 521 | |||
| 522 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
| 523 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
| 524 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
| 525 | { |
||
| 526 | __HAL_TIM_ENABLE(htim); |
||
| 527 | } |
||
| 528 | |||
| 529 | /* Return function status */ |
||
| 530 | return HAL_OK; |
||
| 531 | } |
||
| 532 | |||
| 533 | /** |
||
| 534 | * @brief Stops the TIM Output Compare signal generation on the complementary |
||
| 535 | * output. |
||
| 536 | * @param htim TIM handle |
||
| 537 | * @param Channel TIM Channel to be disabled |
||
| 538 | * This parameter can be one of the following values: |
||
| 539 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 540 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 541 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 542 | * @retval HAL status |
||
| 543 | */ |
||
| 544 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 545 | { |
||
| 546 | /* Check the parameters */ |
||
| 547 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 548 | |||
| 549 | /* Disable the Capture compare channel N */ |
||
| 550 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
| 551 | |||
| 552 | /* Disable the Main Output */ |
||
| 553 | __HAL_TIM_MOE_DISABLE(htim); |
||
| 554 | |||
| 555 | /* Disable the Peripheral */ |
||
| 556 | __HAL_TIM_DISABLE(htim); |
||
| 557 | |||
| 558 | /* Return function status */ |
||
| 559 | return HAL_OK; |
||
| 560 | } |
||
| 561 | |||
| 562 | /** |
||
| 563 | * @brief Starts the TIM Output Compare signal generation in interrupt mode |
||
| 564 | * on the complementary output. |
||
| 565 | * @param htim TIM OC handle |
||
| 566 | * @param Channel TIM Channel to be enabled |
||
| 567 | * This parameter can be one of the following values: |
||
| 568 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 569 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 570 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 571 | * @retval HAL status |
||
| 572 | */ |
||
| 573 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 574 | { |
||
| 575 | uint32_t tmpsmcr; |
||
| 576 | |||
| 577 | /* Check the parameters */ |
||
| 578 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 579 | |||
| 580 | switch (Channel) |
||
| 581 | { |
||
| 582 | case TIM_CHANNEL_1: |
||
| 583 | { |
||
| 584 | /* Enable the TIM Output Compare interrupt */ |
||
| 585 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
||
| 586 | break; |
||
| 587 | } |
||
| 588 | |||
| 589 | case TIM_CHANNEL_2: |
||
| 590 | { |
||
| 591 | /* Enable the TIM Output Compare interrupt */ |
||
| 592 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
||
| 593 | break; |
||
| 594 | } |
||
| 595 | |||
| 596 | case TIM_CHANNEL_3: |
||
| 597 | { |
||
| 598 | /* Enable the TIM Output Compare interrupt */ |
||
| 599 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
||
| 600 | break; |
||
| 601 | } |
||
| 602 | |||
| 603 | |||
| 604 | default: |
||
| 605 | break; |
||
| 606 | } |
||
| 607 | |||
| 608 | /* Enable the TIM Break interrupt */ |
||
| 609 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
||
| 610 | |||
| 611 | /* Enable the Capture compare channel N */ |
||
| 612 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
| 613 | |||
| 614 | /* Enable the Main Output */ |
||
| 615 | __HAL_TIM_MOE_ENABLE(htim); |
||
| 616 | |||
| 617 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
| 618 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
| 619 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
| 620 | { |
||
| 621 | __HAL_TIM_ENABLE(htim); |
||
| 622 | } |
||
| 623 | |||
| 624 | /* Return function status */ |
||
| 625 | return HAL_OK; |
||
| 626 | } |
||
| 627 | |||
| 628 | /** |
||
| 629 | * @brief Stops the TIM Output Compare signal generation in interrupt mode |
||
| 630 | * on the complementary output. |
||
| 631 | * @param htim TIM Output Compare handle |
||
| 632 | * @param Channel TIM Channel to be disabled |
||
| 633 | * This parameter can be one of the following values: |
||
| 634 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 635 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 636 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 637 | * @retval HAL status |
||
| 638 | */ |
||
| 639 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 640 | { |
||
| 641 | uint32_t tmpccer; |
||
| 642 | /* Check the parameters */ |
||
| 643 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 644 | |||
| 645 | switch (Channel) |
||
| 646 | { |
||
| 647 | case TIM_CHANNEL_1: |
||
| 648 | { |
||
| 649 | /* Disable the TIM Output Compare interrupt */ |
||
| 650 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
||
| 651 | break; |
||
| 652 | } |
||
| 653 | |||
| 654 | case TIM_CHANNEL_2: |
||
| 655 | { |
||
| 656 | /* Disable the TIM Output Compare interrupt */ |
||
| 657 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
||
| 658 | break; |
||
| 659 | } |
||
| 660 | |||
| 661 | case TIM_CHANNEL_3: |
||
| 662 | { |
||
| 663 | /* Disable the TIM Output Compare interrupt */ |
||
| 664 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
||
| 665 | break; |
||
| 666 | } |
||
| 667 | |||
| 668 | default: |
||
| 669 | break; |
||
| 670 | } |
||
| 671 | |||
| 672 | /* Disable the Capture compare channel N */ |
||
| 673 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
| 674 | |||
| 675 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
||
| 676 | tmpccer = htim->Instance->CCER; |
||
| 677 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) |
||
| 678 | { |
||
| 679 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
||
| 680 | } |
||
| 681 | |||
| 682 | /* Disable the Main Output */ |
||
| 683 | __HAL_TIM_MOE_DISABLE(htim); |
||
| 684 | |||
| 685 | /* Disable the Peripheral */ |
||
| 686 | __HAL_TIM_DISABLE(htim); |
||
| 687 | |||
| 688 | /* Return function status */ |
||
| 689 | return HAL_OK; |
||
| 690 | } |
||
| 691 | |||
| 692 | /** |
||
| 693 | * @brief Starts the TIM Output Compare signal generation in DMA mode |
||
| 694 | * on the complementary output. |
||
| 695 | * @param htim TIM Output Compare handle |
||
| 696 | * @param Channel TIM Channel to be enabled |
||
| 697 | * This parameter can be one of the following values: |
||
| 698 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 699 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 700 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 701 | * @param pData The source Buffer address. |
||
| 702 | * @param Length The length of data to be transferred from memory to TIM peripheral |
||
| 703 | * @retval HAL status |
||
| 704 | */ |
||
| 705 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
||
| 706 | { |
||
| 707 | uint32_t tmpsmcr; |
||
| 708 | |||
| 709 | /* Check the parameters */ |
||
| 710 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 711 | |||
| 712 | if (htim->State == HAL_TIM_STATE_BUSY) |
||
| 713 | { |
||
| 714 | return HAL_BUSY; |
||
| 715 | } |
||
| 716 | else if (htim->State == HAL_TIM_STATE_READY) |
||
| 717 | { |
||
| 718 | if (((uint32_t)pData == 0U) && (Length > 0U)) |
||
| 719 | { |
||
| 720 | return HAL_ERROR; |
||
| 721 | } |
||
| 722 | else |
||
| 723 | { |
||
| 724 | htim->State = HAL_TIM_STATE_BUSY; |
||
| 725 | } |
||
| 726 | } |
||
| 727 | else |
||
| 728 | { |
||
| 729 | /* nothing to do */ |
||
| 730 | } |
||
| 731 | |||
| 732 | switch (Channel) |
||
| 733 | { |
||
| 734 | case TIM_CHANNEL_1: |
||
| 735 | { |
||
| 736 | /* Set the DMA compare callbacks */ |
||
| 737 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
| 738 | htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
| 739 | |||
| 740 | /* Set the DMA error callback */ |
||
| 741 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
||
| 742 | |||
| 743 | /* Enable the DMA channel */ |
||
| 744 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK) |
||
| 745 | { |
||
| 746 | return HAL_ERROR; |
||
| 747 | } |
||
| 748 | /* Enable the TIM Output Compare DMA request */ |
||
| 749 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
||
| 750 | break; |
||
| 751 | } |
||
| 752 | |||
| 753 | case TIM_CHANNEL_2: |
||
| 754 | { |
||
| 755 | /* Set the DMA compare callbacks */ |
||
| 756 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
| 757 | htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
| 758 | |||
| 759 | /* Set the DMA error callback */ |
||
| 760 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
||
| 761 | |||
| 762 | /* Enable the DMA channel */ |
||
| 763 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK) |
||
| 764 | { |
||
| 765 | return HAL_ERROR; |
||
| 766 | } |
||
| 767 | /* Enable the TIM Output Compare DMA request */ |
||
| 768 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
||
| 769 | break; |
||
| 770 | } |
||
| 771 | |||
| 772 | case TIM_CHANNEL_3: |
||
| 773 | { |
||
| 774 | /* Set the DMA compare callbacks */ |
||
| 775 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
| 776 | htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
| 777 | |||
| 778 | /* Set the DMA error callback */ |
||
| 779 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
||
| 780 | |||
| 781 | /* Enable the DMA channel */ |
||
| 782 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK) |
||
| 783 | { |
||
| 784 | return HAL_ERROR; |
||
| 785 | } |
||
| 786 | /* Enable the TIM Output Compare DMA request */ |
||
| 787 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
||
| 788 | break; |
||
| 789 | } |
||
| 790 | |||
| 791 | default: |
||
| 792 | break; |
||
| 793 | } |
||
| 794 | |||
| 795 | /* Enable the Capture compare channel N */ |
||
| 796 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
| 797 | |||
| 798 | /* Enable the Main Output */ |
||
| 799 | __HAL_TIM_MOE_ENABLE(htim); |
||
| 800 | |||
| 801 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
| 802 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
| 803 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
| 804 | { |
||
| 805 | __HAL_TIM_ENABLE(htim); |
||
| 806 | } |
||
| 807 | |||
| 808 | /* Return function status */ |
||
| 809 | return HAL_OK; |
||
| 810 | } |
||
| 811 | |||
| 812 | /** |
||
| 813 | * @brief Stops the TIM Output Compare signal generation in DMA mode |
||
| 814 | * on the complementary output. |
||
| 815 | * @param htim TIM Output Compare handle |
||
| 816 | * @param Channel TIM Channel to be disabled |
||
| 817 | * This parameter can be one of the following values: |
||
| 818 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 819 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 820 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 821 | * @retval HAL status |
||
| 822 | */ |
||
| 823 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 824 | { |
||
| 825 | /* Check the parameters */ |
||
| 826 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 827 | |||
| 828 | switch (Channel) |
||
| 829 | { |
||
| 830 | case TIM_CHANNEL_1: |
||
| 831 | { |
||
| 832 | /* Disable the TIM Output Compare DMA request */ |
||
| 833 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
||
| 834 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); |
||
| 835 | break; |
||
| 836 | } |
||
| 837 | |||
| 838 | case TIM_CHANNEL_2: |
||
| 839 | { |
||
| 840 | /* Disable the TIM Output Compare DMA request */ |
||
| 841 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
||
| 842 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); |
||
| 843 | break; |
||
| 844 | } |
||
| 845 | |||
| 846 | case TIM_CHANNEL_3: |
||
| 847 | { |
||
| 848 | /* Disable the TIM Output Compare DMA request */ |
||
| 849 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
||
| 850 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); |
||
| 851 | break; |
||
| 852 | } |
||
| 853 | |||
| 854 | default: |
||
| 855 | break; |
||
| 856 | } |
||
| 857 | |||
| 858 | /* Disable the Capture compare channel N */ |
||
| 859 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
| 860 | |||
| 861 | /* Disable the Main Output */ |
||
| 862 | __HAL_TIM_MOE_DISABLE(htim); |
||
| 863 | |||
| 864 | /* Disable the Peripheral */ |
||
| 865 | __HAL_TIM_DISABLE(htim); |
||
| 866 | |||
| 867 | /* Change the htim state */ |
||
| 868 | htim->State = HAL_TIM_STATE_READY; |
||
| 869 | |||
| 870 | /* Return function status */ |
||
| 871 | return HAL_OK; |
||
| 872 | } |
||
| 873 | |||
| 874 | /** |
||
| 875 | * @} |
||
| 876 | */ |
||
| 877 | |||
| 878 | /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions |
||
| 879 | * @brief Timer Complementary PWM functions |
||
| 880 | * |
||
| 881 | @verbatim |
||
| 882 | ============================================================================== |
||
| 883 | ##### Timer Complementary PWM functions ##### |
||
| 884 | ============================================================================== |
||
| 885 | [..] |
||
| 886 | This section provides functions allowing to: |
||
| 887 | (+) Start the Complementary PWM. |
||
| 888 | (+) Stop the Complementary PWM. |
||
| 889 | (+) Start the Complementary PWM and enable interrupts. |
||
| 890 | (+) Stop the Complementary PWM and disable interrupts. |
||
| 891 | (+) Start the Complementary PWM and enable DMA transfers. |
||
| 892 | (+) Stop the Complementary PWM and disable DMA transfers. |
||
| 893 | (+) Start the Complementary Input Capture measurement. |
||
| 894 | (+) Stop the Complementary Input Capture. |
||
| 895 | (+) Start the Complementary Input Capture and enable interrupts. |
||
| 896 | (+) Stop the Complementary Input Capture and disable interrupts. |
||
| 897 | (+) Start the Complementary Input Capture and enable DMA transfers. |
||
| 898 | (+) Stop the Complementary Input Capture and disable DMA transfers. |
||
| 899 | (+) Start the Complementary One Pulse generation. |
||
| 900 | (+) Stop the Complementary One Pulse. |
||
| 901 | (+) Start the Complementary One Pulse and enable interrupts. |
||
| 902 | (+) Stop the Complementary One Pulse and disable interrupts. |
||
| 903 | |||
| 904 | @endverbatim |
||
| 905 | * @{ |
||
| 906 | */ |
||
| 907 | |||
| 908 | /** |
||
| 909 | * @brief Starts the PWM signal generation on the complementary output. |
||
| 910 | * @param htim TIM handle |
||
| 911 | * @param Channel TIM Channel to be enabled |
||
| 912 | * This parameter can be one of the following values: |
||
| 913 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 914 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 915 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 916 | * @retval HAL status |
||
| 917 | */ |
||
| 918 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 919 | { |
||
| 920 | uint32_t tmpsmcr; |
||
| 921 | |||
| 922 | /* Check the parameters */ |
||
| 923 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 924 | |||
| 925 | /* Enable the complementary PWM output */ |
||
| 926 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
| 927 | |||
| 928 | /* Enable the Main Output */ |
||
| 929 | __HAL_TIM_MOE_ENABLE(htim); |
||
| 930 | |||
| 931 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
| 932 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
| 933 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
| 934 | { |
||
| 935 | __HAL_TIM_ENABLE(htim); |
||
| 936 | } |
||
| 937 | |||
| 938 | /* Return function status */ |
||
| 939 | return HAL_OK; |
||
| 940 | } |
||
| 941 | |||
| 942 | /** |
||
| 943 | * @brief Stops the PWM signal generation on the complementary output. |
||
| 944 | * @param htim TIM handle |
||
| 945 | * @param Channel TIM Channel to be disabled |
||
| 946 | * This parameter can be one of the following values: |
||
| 947 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 948 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 949 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 950 | * @retval HAL status |
||
| 951 | */ |
||
| 952 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 953 | { |
||
| 954 | /* Check the parameters */ |
||
| 955 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 956 | |||
| 957 | /* Disable the complementary PWM output */ |
||
| 958 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
| 959 | |||
| 960 | /* Disable the Main Output */ |
||
| 961 | __HAL_TIM_MOE_DISABLE(htim); |
||
| 962 | |||
| 963 | /* Disable the Peripheral */ |
||
| 964 | __HAL_TIM_DISABLE(htim); |
||
| 965 | |||
| 966 | /* Return function status */ |
||
| 967 | return HAL_OK; |
||
| 968 | } |
||
| 969 | |||
| 970 | /** |
||
| 971 | * @brief Starts the PWM signal generation in interrupt mode on the |
||
| 972 | * complementary output. |
||
| 973 | * @param htim TIM handle |
||
| 974 | * @param Channel TIM Channel to be disabled |
||
| 975 | * This parameter can be one of the following values: |
||
| 976 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 977 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 978 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 979 | * @retval HAL status |
||
| 980 | */ |
||
| 981 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 982 | { |
||
| 983 | uint32_t tmpsmcr; |
||
| 984 | |||
| 985 | /* Check the parameters */ |
||
| 986 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 987 | |||
| 988 | switch (Channel) |
||
| 989 | { |
||
| 990 | case TIM_CHANNEL_1: |
||
| 991 | { |
||
| 992 | /* Enable the TIM Capture/Compare 1 interrupt */ |
||
| 993 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
||
| 994 | break; |
||
| 995 | } |
||
| 996 | |||
| 997 | case TIM_CHANNEL_2: |
||
| 998 | { |
||
| 999 | /* Enable the TIM Capture/Compare 2 interrupt */ |
||
| 1000 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
||
| 1001 | break; |
||
| 1002 | } |
||
| 1003 | |||
| 1004 | case TIM_CHANNEL_3: |
||
| 1005 | { |
||
| 1006 | /* Enable the TIM Capture/Compare 3 interrupt */ |
||
| 1007 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
||
| 1008 | break; |
||
| 1009 | } |
||
| 1010 | |||
| 1011 | default: |
||
| 1012 | break; |
||
| 1013 | } |
||
| 1014 | |||
| 1015 | /* Enable the TIM Break interrupt */ |
||
| 1016 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
||
| 1017 | |||
| 1018 | /* Enable the complementary PWM output */ |
||
| 1019 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
| 1020 | |||
| 1021 | /* Enable the Main Output */ |
||
| 1022 | __HAL_TIM_MOE_ENABLE(htim); |
||
| 1023 | |||
| 1024 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
| 1025 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
| 1026 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
| 1027 | { |
||
| 1028 | __HAL_TIM_ENABLE(htim); |
||
| 1029 | } |
||
| 1030 | |||
| 1031 | /* Return function status */ |
||
| 1032 | return HAL_OK; |
||
| 1033 | } |
||
| 1034 | |||
| 1035 | /** |
||
| 1036 | * @brief Stops the PWM signal generation in interrupt mode on the |
||
| 1037 | * complementary output. |
||
| 1038 | * @param htim TIM handle |
||
| 1039 | * @param Channel TIM Channel to be disabled |
||
| 1040 | * This parameter can be one of the following values: |
||
| 1041 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 1042 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 1043 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 1044 | * @retval HAL status |
||
| 1045 | */ |
||
| 1046 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 1047 | { |
||
| 1048 | uint32_t tmpccer; |
||
| 1049 | |||
| 1050 | /* Check the parameters */ |
||
| 1051 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 1052 | |||
| 1053 | switch (Channel) |
||
| 1054 | { |
||
| 1055 | case TIM_CHANNEL_1: |
||
| 1056 | { |
||
| 1057 | /* Disable the TIM Capture/Compare 1 interrupt */ |
||
| 1058 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
||
| 1059 | break; |
||
| 1060 | } |
||
| 1061 | |||
| 1062 | case TIM_CHANNEL_2: |
||
| 1063 | { |
||
| 1064 | /* Disable the TIM Capture/Compare 2 interrupt */ |
||
| 1065 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
||
| 1066 | break; |
||
| 1067 | } |
||
| 1068 | |||
| 1069 | case TIM_CHANNEL_3: |
||
| 1070 | { |
||
| 1071 | /* Disable the TIM Capture/Compare 3 interrupt */ |
||
| 1072 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
||
| 1073 | break; |
||
| 1074 | } |
||
| 1075 | |||
| 1076 | default: |
||
| 1077 | break; |
||
| 1078 | } |
||
| 1079 | |||
| 1080 | /* Disable the complementary PWM output */ |
||
| 1081 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
| 1082 | |||
| 1083 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
||
| 1084 | tmpccer = htim->Instance->CCER; |
||
| 1085 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) |
||
| 1086 | { |
||
| 1087 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
||
| 1088 | } |
||
| 1089 | |||
| 1090 | /* Disable the Main Output */ |
||
| 1091 | __HAL_TIM_MOE_DISABLE(htim); |
||
| 1092 | |||
| 1093 | /* Disable the Peripheral */ |
||
| 1094 | __HAL_TIM_DISABLE(htim); |
||
| 1095 | |||
| 1096 | /* Return function status */ |
||
| 1097 | return HAL_OK; |
||
| 1098 | } |
||
| 1099 | |||
| 1100 | /** |
||
| 1101 | * @brief Starts the TIM PWM signal generation in DMA mode on the |
||
| 1102 | * complementary output |
||
| 1103 | * @param htim TIM handle |
||
| 1104 | * @param Channel TIM Channel to be enabled |
||
| 1105 | * This parameter can be one of the following values: |
||
| 1106 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 1107 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 1108 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 1109 | * @param pData The source Buffer address. |
||
| 1110 | * @param Length The length of data to be transferred from memory to TIM peripheral |
||
| 1111 | * @retval HAL status |
||
| 1112 | */ |
||
| 1113 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
||
| 1114 | { |
||
| 1115 | uint32_t tmpsmcr; |
||
| 1116 | |||
| 1117 | /* Check the parameters */ |
||
| 1118 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 1119 | |||
| 1120 | if (htim->State == HAL_TIM_STATE_BUSY) |
||
| 1121 | { |
||
| 1122 | return HAL_BUSY; |
||
| 1123 | } |
||
| 1124 | else if (htim->State == HAL_TIM_STATE_READY) |
||
| 1125 | { |
||
| 1126 | if (((uint32_t)pData == 0U) && (Length > 0U)) |
||
| 1127 | { |
||
| 1128 | return HAL_ERROR; |
||
| 1129 | } |
||
| 1130 | else |
||
| 1131 | { |
||
| 1132 | htim->State = HAL_TIM_STATE_BUSY; |
||
| 1133 | } |
||
| 1134 | } |
||
| 1135 | else |
||
| 1136 | { |
||
| 1137 | /* nothing to do */ |
||
| 1138 | } |
||
| 1139 | switch (Channel) |
||
| 1140 | { |
||
| 1141 | case TIM_CHANNEL_1: |
||
| 1142 | { |
||
| 1143 | /* Set the DMA compare callbacks */ |
||
| 1144 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
| 1145 | htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
| 1146 | |||
| 1147 | /* Set the DMA error callback */ |
||
| 1148 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
||
| 1149 | |||
| 1150 | /* Enable the DMA channel */ |
||
| 1151 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK) |
||
| 1152 | { |
||
| 1153 | return HAL_ERROR; |
||
| 1154 | } |
||
| 1155 | /* Enable the TIM Capture/Compare 1 DMA request */ |
||
| 1156 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
||
| 1157 | break; |
||
| 1158 | } |
||
| 1159 | |||
| 1160 | case TIM_CHANNEL_2: |
||
| 1161 | { |
||
| 1162 | /* Set the DMA compare callbacks */ |
||
| 1163 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
| 1164 | htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
| 1165 | |||
| 1166 | /* Set the DMA error callback */ |
||
| 1167 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
||
| 1168 | |||
| 1169 | /* Enable the DMA channel */ |
||
| 1170 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK) |
||
| 1171 | { |
||
| 1172 | return HAL_ERROR; |
||
| 1173 | } |
||
| 1174 | /* Enable the TIM Capture/Compare 2 DMA request */ |
||
| 1175 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
||
| 1176 | break; |
||
| 1177 | } |
||
| 1178 | |||
| 1179 | case TIM_CHANNEL_3: |
||
| 1180 | { |
||
| 1181 | /* Set the DMA compare callbacks */ |
||
| 1182 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
| 1183 | htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
| 1184 | |||
| 1185 | /* Set the DMA error callback */ |
||
| 1186 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
||
| 1187 | |||
| 1188 | /* Enable the DMA channel */ |
||
| 1189 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK) |
||
| 1190 | { |
||
| 1191 | return HAL_ERROR; |
||
| 1192 | } |
||
| 1193 | /* Enable the TIM Capture/Compare 3 DMA request */ |
||
| 1194 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
||
| 1195 | break; |
||
| 1196 | } |
||
| 1197 | |||
| 1198 | default: |
||
| 1199 | break; |
||
| 1200 | } |
||
| 1201 | |||
| 1202 | /* Enable the complementary PWM output */ |
||
| 1203 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
| 1204 | |||
| 1205 | /* Enable the Main Output */ |
||
| 1206 | __HAL_TIM_MOE_ENABLE(htim); |
||
| 1207 | |||
| 1208 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
| 1209 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
| 1210 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
| 1211 | { |
||
| 1212 | __HAL_TIM_ENABLE(htim); |
||
| 1213 | } |
||
| 1214 | |||
| 1215 | /* Return function status */ |
||
| 1216 | return HAL_OK; |
||
| 1217 | } |
||
| 1218 | |||
| 1219 | /** |
||
| 1220 | * @brief Stops the TIM PWM signal generation in DMA mode on the complementary |
||
| 1221 | * output |
||
| 1222 | * @param htim TIM handle |
||
| 1223 | * @param Channel TIM Channel to be disabled |
||
| 1224 | * This parameter can be one of the following values: |
||
| 1225 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 1226 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 1227 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
| 1228 | * @retval HAL status |
||
| 1229 | */ |
||
| 1230 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
| 1231 | { |
||
| 1232 | /* Check the parameters */ |
||
| 1233 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
| 1234 | |||
| 1235 | switch (Channel) |
||
| 1236 | { |
||
| 1237 | case TIM_CHANNEL_1: |
||
| 1238 | { |
||
| 1239 | /* Disable the TIM Capture/Compare 1 DMA request */ |
||
| 1240 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
||
| 1241 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); |
||
| 1242 | break; |
||
| 1243 | } |
||
| 1244 | |||
| 1245 | case TIM_CHANNEL_2: |
||
| 1246 | { |
||
| 1247 | /* Disable the TIM Capture/Compare 2 DMA request */ |
||
| 1248 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
||
| 1249 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); |
||
| 1250 | break; |
||
| 1251 | } |
||
| 1252 | |||
| 1253 | case TIM_CHANNEL_3: |
||
| 1254 | { |
||
| 1255 | /* Disable the TIM Capture/Compare 3 DMA request */ |
||
| 1256 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
||
| 1257 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); |
||
| 1258 | break; |
||
| 1259 | } |
||
| 1260 | |||
| 1261 | default: |
||
| 1262 | break; |
||
| 1263 | } |
||
| 1264 | |||
| 1265 | /* Disable the complementary PWM output */ |
||
| 1266 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
| 1267 | |||
| 1268 | /* Disable the Main Output */ |
||
| 1269 | __HAL_TIM_MOE_DISABLE(htim); |
||
| 1270 | |||
| 1271 | /* Disable the Peripheral */ |
||
| 1272 | __HAL_TIM_DISABLE(htim); |
||
| 1273 | |||
| 1274 | /* Change the htim state */ |
||
| 1275 | htim->State = HAL_TIM_STATE_READY; |
||
| 1276 | |||
| 1277 | /* Return function status */ |
||
| 1278 | return HAL_OK; |
||
| 1279 | } |
||
| 1280 | |||
| 1281 | /** |
||
| 1282 | * @} |
||
| 1283 | */ |
||
| 1284 | |||
| 1285 | /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions |
||
| 1286 | * @brief Timer Complementary One Pulse functions |
||
| 1287 | * |
||
| 1288 | @verbatim |
||
| 1289 | ============================================================================== |
||
| 1290 | ##### Timer Complementary One Pulse functions ##### |
||
| 1291 | ============================================================================== |
||
| 1292 | [..] |
||
| 1293 | This section provides functions allowing to: |
||
| 1294 | (+) Start the Complementary One Pulse generation. |
||
| 1295 | (+) Stop the Complementary One Pulse. |
||
| 1296 | (+) Start the Complementary One Pulse and enable interrupts. |
||
| 1297 | (+) Stop the Complementary One Pulse and disable interrupts. |
||
| 1298 | |||
| 1299 | @endverbatim |
||
| 1300 | * @{ |
||
| 1301 | */ |
||
| 1302 | |||
| 1303 | /** |
||
| 1304 | * @brief Starts the TIM One Pulse signal generation on the complementary |
||
| 1305 | * output. |
||
| 1306 | * @param htim TIM One Pulse handle |
||
| 1307 | * @param OutputChannel TIM Channel to be enabled |
||
| 1308 | * This parameter can be one of the following values: |
||
| 1309 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 1310 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 1311 | * @retval HAL status |
||
| 1312 | */ |
||
| 1313 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
| 1314 | { |
||
| 1315 | /* Check the parameters */ |
||
| 1316 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
| 1317 | |||
| 1318 | /* Enable the complementary One Pulse output */ |
||
| 1319 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
||
| 1320 | |||
| 1321 | /* Enable the Main Output */ |
||
| 1322 | __HAL_TIM_MOE_ENABLE(htim); |
||
| 1323 | |||
| 1324 | /* Return function status */ |
||
| 1325 | return HAL_OK; |
||
| 1326 | } |
||
| 1327 | |||
| 1328 | /** |
||
| 1329 | * @brief Stops the TIM One Pulse signal generation on the complementary |
||
| 1330 | * output. |
||
| 1331 | * @param htim TIM One Pulse handle |
||
| 1332 | * @param OutputChannel TIM Channel to be disabled |
||
| 1333 | * This parameter can be one of the following values: |
||
| 1334 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 1335 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 1336 | * @retval HAL status |
||
| 1337 | */ |
||
| 1338 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
| 1339 | { |
||
| 1340 | |||
| 1341 | /* Check the parameters */ |
||
| 1342 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
| 1343 | |||
| 1344 | /* Disable the complementary One Pulse output */ |
||
| 1345 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
||
| 1346 | |||
| 1347 | /* Disable the Main Output */ |
||
| 1348 | __HAL_TIM_MOE_DISABLE(htim); |
||
| 1349 | |||
| 1350 | /* Disable the Peripheral */ |
||
| 1351 | __HAL_TIM_DISABLE(htim); |
||
| 1352 | |||
| 1353 | /* Return function status */ |
||
| 1354 | return HAL_OK; |
||
| 1355 | } |
||
| 1356 | |||
| 1357 | /** |
||
| 1358 | * @brief Starts the TIM One Pulse signal generation in interrupt mode on the |
||
| 1359 | * complementary channel. |
||
| 1360 | * @param htim TIM One Pulse handle |
||
| 1361 | * @param OutputChannel TIM Channel to be enabled |
||
| 1362 | * This parameter can be one of the following values: |
||
| 1363 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 1364 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 1365 | * @retval HAL status |
||
| 1366 | */ |
||
| 1367 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
| 1368 | { |
||
| 1369 | /* Check the parameters */ |
||
| 1370 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
| 1371 | |||
| 1372 | /* Enable the TIM Capture/Compare 1 interrupt */ |
||
| 1373 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
||
| 1374 | |||
| 1375 | /* Enable the TIM Capture/Compare 2 interrupt */ |
||
| 1376 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
||
| 1377 | |||
| 1378 | /* Enable the complementary One Pulse output */ |
||
| 1379 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
||
| 1380 | |||
| 1381 | /* Enable the Main Output */ |
||
| 1382 | __HAL_TIM_MOE_ENABLE(htim); |
||
| 1383 | |||
| 1384 | /* Return function status */ |
||
| 1385 | return HAL_OK; |
||
| 1386 | } |
||
| 1387 | |||
| 1388 | /** |
||
| 1389 | * @brief Stops the TIM One Pulse signal generation in interrupt mode on the |
||
| 1390 | * complementary channel. |
||
| 1391 | * @param htim TIM One Pulse handle |
||
| 1392 | * @param OutputChannel TIM Channel to be disabled |
||
| 1393 | * This parameter can be one of the following values: |
||
| 1394 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
| 1395 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
| 1396 | * @retval HAL status |
||
| 1397 | */ |
||
| 1398 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
| 1399 | { |
||
| 1400 | /* Check the parameters */ |
||
| 1401 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
| 1402 | |||
| 1403 | /* Disable the TIM Capture/Compare 1 interrupt */ |
||
| 1404 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
||
| 1405 | |||
| 1406 | /* Disable the TIM Capture/Compare 2 interrupt */ |
||
| 1407 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
||
| 1408 | |||
| 1409 | /* Disable the complementary One Pulse output */ |
||
| 1410 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
||
| 1411 | |||
| 1412 | /* Disable the Main Output */ |
||
| 1413 | __HAL_TIM_MOE_DISABLE(htim); |
||
| 1414 | |||
| 1415 | /* Disable the Peripheral */ |
||
| 1416 | __HAL_TIM_DISABLE(htim); |
||
| 1417 | |||
| 1418 | /* Return function status */ |
||
| 1419 | return HAL_OK; |
||
| 1420 | } |
||
| 1421 | |||
| 1422 | /** |
||
| 1423 | * @} |
||
| 1424 | */ |
||
| 1425 | |||
| 1426 | /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions |
||
| 1427 | * @brief Peripheral Control functions |
||
| 1428 | * |
||
| 1429 | @verbatim |
||
| 1430 | ============================================================================== |
||
| 1431 | ##### Peripheral Control functions ##### |
||
| 1432 | ============================================================================== |
||
| 1433 | [..] |
||
| 1434 | This section provides functions allowing to: |
||
| 1435 | (+) Configure the commutation event in case of use of the Hall sensor interface. |
||
| 1436 | (+) Configure Output channels for OC and PWM mode. |
||
| 1437 | |||
| 1438 | (+) Configure Complementary channels, break features and dead time. |
||
| 1439 | (+) Configure Master synchronization. |
||
| 1440 | (+) Configure timer remapping capabilities. |
||
| 1441 | |||
| 1442 | @endverbatim |
||
| 1443 | * @{ |
||
| 1444 | */ |
||
| 1445 | |||
| 1446 | /** |
||
| 1447 | * @brief Configure the TIM commutation event sequence. |
||
| 1448 | * @note This function is mandatory to use the commutation event in order to |
||
| 1449 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
||
| 1450 | * the typical use of this feature is with the use of another Timer(interface Timer) |
||
| 1451 | * configured in Hall sensor interface, this interface Timer will generate the |
||
| 1452 | * commutation at its TRGO output (connected to Timer used in this function) each time |
||
| 1453 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
||
| 1454 | * @param htim TIM handle |
||
| 1455 | * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
||
| 1456 | * This parameter can be one of the following values: |
||
| 1457 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
||
| 1458 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
||
| 1459 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
||
| 1460 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
||
| 1461 | * @arg TIM_TS_NONE: No trigger is needed |
||
| 1462 | * @param CommutationSource the Commutation Event source |
||
| 1463 | * This parameter can be one of the following values: |
||
| 1464 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
||
| 1465 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
||
| 1466 | * @retval HAL status |
||
| 1467 | */ |
||
| 1468 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, |
||
| 1469 | uint32_t CommutationSource) |
||
| 1470 | { |
||
| 1471 | /* Check the parameters */ |
||
| 1472 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
||
| 1473 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
||
| 1474 | |||
| 1475 | __HAL_LOCK(htim); |
||
| 1476 | |||
| 1477 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
||
| 1478 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
||
| 1479 | { |
||
| 1480 | /* Select the Input trigger */ |
||
| 1481 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
||
| 1482 | htim->Instance->SMCR |= InputTrigger; |
||
| 1483 | } |
||
| 1484 | |||
| 1485 | /* Select the Capture Compare preload feature */ |
||
| 1486 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
||
| 1487 | /* Select the Commutation event source */ |
||
| 1488 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
||
| 1489 | htim->Instance->CR2 |= CommutationSource; |
||
| 1490 | |||
| 1491 | /* Disable Commutation Interrupt */ |
||
| 1492 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); |
||
| 1493 | |||
| 1494 | /* Disable Commutation DMA request */ |
||
| 1495 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); |
||
| 1496 | |||
| 1497 | __HAL_UNLOCK(htim); |
||
| 1498 | |||
| 1499 | return HAL_OK; |
||
| 1500 | } |
||
| 1501 | |||
| 1502 | /** |
||
| 1503 | * @brief Configure the TIM commutation event sequence with interrupt. |
||
| 1504 | * @note This function is mandatory to use the commutation event in order to |
||
| 1505 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
||
| 1506 | * the typical use of this feature is with the use of another Timer(interface Timer) |
||
| 1507 | * configured in Hall sensor interface, this interface Timer will generate the |
||
| 1508 | * commutation at its TRGO output (connected to Timer used in this function) each time |
||
| 1509 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
||
| 1510 | * @param htim TIM handle |
||
| 1511 | * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
||
| 1512 | * This parameter can be one of the following values: |
||
| 1513 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
||
| 1514 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
||
| 1515 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
||
| 1516 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
||
| 1517 | * @arg TIM_TS_NONE: No trigger is needed |
||
| 1518 | * @param CommutationSource the Commutation Event source |
||
| 1519 | * This parameter can be one of the following values: |
||
| 1520 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
||
| 1521 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
||
| 1522 | * @retval HAL status |
||
| 1523 | */ |
||
| 1524 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, |
||
| 1525 | uint32_t CommutationSource) |
||
| 1526 | { |
||
| 1527 | /* Check the parameters */ |
||
| 1528 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
||
| 1529 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
||
| 1530 | |||
| 1531 | __HAL_LOCK(htim); |
||
| 1532 | |||
| 1533 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
||
| 1534 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
||
| 1535 | { |
||
| 1536 | /* Select the Input trigger */ |
||
| 1537 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
||
| 1538 | htim->Instance->SMCR |= InputTrigger; |
||
| 1539 | } |
||
| 1540 | |||
| 1541 | /* Select the Capture Compare preload feature */ |
||
| 1542 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
||
| 1543 | /* Select the Commutation event source */ |
||
| 1544 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
||
| 1545 | htim->Instance->CR2 |= CommutationSource; |
||
| 1546 | |||
| 1547 | /* Disable Commutation DMA request */ |
||
| 1548 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); |
||
| 1549 | |||
| 1550 | /* Enable the Commutation Interrupt */ |
||
| 1551 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); |
||
| 1552 | |||
| 1553 | __HAL_UNLOCK(htim); |
||
| 1554 | |||
| 1555 | return HAL_OK; |
||
| 1556 | } |
||
| 1557 | |||
| 1558 | /** |
||
| 1559 | * @brief Configure the TIM commutation event sequence with DMA. |
||
| 1560 | * @note This function is mandatory to use the commutation event in order to |
||
| 1561 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
||
| 1562 | * the typical use of this feature is with the use of another Timer(interface Timer) |
||
| 1563 | * configured in Hall sensor interface, this interface Timer will generate the |
||
| 1564 | * commutation at its TRGO output (connected to Timer used in this function) each time |
||
| 1565 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
||
| 1566 | * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set |
||
| 1567 | * @param htim TIM handle |
||
| 1568 | * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
||
| 1569 | * This parameter can be one of the following values: |
||
| 1570 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
||
| 1571 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
||
| 1572 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
||
| 1573 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
||
| 1574 | * @arg TIM_TS_NONE: No trigger is needed |
||
| 1575 | * @param CommutationSource the Commutation Event source |
||
| 1576 | * This parameter can be one of the following values: |
||
| 1577 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
||
| 1578 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
||
| 1579 | * @retval HAL status |
||
| 1580 | */ |
||
| 1581 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, |
||
| 1582 | uint32_t CommutationSource) |
||
| 1583 | { |
||
| 1584 | /* Check the parameters */ |
||
| 1585 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
||
| 1586 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
||
| 1587 | |||
| 1588 | __HAL_LOCK(htim); |
||
| 1589 | |||
| 1590 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
||
| 1591 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
||
| 1592 | { |
||
| 1593 | /* Select the Input trigger */ |
||
| 1594 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
||
| 1595 | htim->Instance->SMCR |= InputTrigger; |
||
| 1596 | } |
||
| 1597 | |||
| 1598 | /* Select the Capture Compare preload feature */ |
||
| 1599 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
||
| 1600 | /* Select the Commutation event source */ |
||
| 1601 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
||
| 1602 | htim->Instance->CR2 |= CommutationSource; |
||
| 1603 | |||
| 1604 | /* Enable the Commutation DMA Request */ |
||
| 1605 | /* Set the DMA Commutation Callback */ |
||
| 1606 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; |
||
| 1607 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; |
||
| 1608 | /* Set the DMA error callback */ |
||
| 1609 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; |
||
| 1610 | |||
| 1611 | /* Disable Commutation Interrupt */ |
||
| 1612 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); |
||
| 1613 | |||
| 1614 | /* Enable the Commutation DMA Request */ |
||
| 1615 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); |
||
| 1616 | |||
| 1617 | __HAL_UNLOCK(htim); |
||
| 1618 | |||
| 1619 | return HAL_OK; |
||
| 1620 | } |
||
| 1621 | |||
| 1622 | /** |
||
| 1623 | * @brief Configures the TIM in master mode. |
||
| 1624 | * @param htim TIM handle. |
||
| 1625 | * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that |
||
| 1626 | * contains the selected trigger output (TRGO) and the Master/Slave |
||
| 1627 | * mode. |
||
| 1628 | * @retval HAL status |
||
| 1629 | */ |
||
| 1630 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, |
||
| 1631 | TIM_MasterConfigTypeDef *sMasterConfig) |
||
| 1632 | { |
||
| 1633 | uint32_t tmpcr2; |
||
| 1634 | uint32_t tmpsmcr; |
||
| 1635 | |||
| 1636 | /* Check the parameters */ |
||
| 1637 | assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); |
||
| 1638 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
||
| 1639 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
||
| 1640 | |||
| 1641 | /* Check input state */ |
||
| 1642 | __HAL_LOCK(htim); |
||
| 1643 | |||
| 1644 | /* Change the handler state */ |
||
| 1645 | htim->State = HAL_TIM_STATE_BUSY; |
||
| 1646 | |||
| 1647 | /* Get the TIMx CR2 register value */ |
||
| 1648 | tmpcr2 = htim->Instance->CR2; |
||
| 1649 | |||
| 1650 | /* Get the TIMx SMCR register value */ |
||
| 1651 | tmpsmcr = htim->Instance->SMCR; |
||
| 1652 | |||
| 1653 | /* Reset the MMS Bits */ |
||
| 1654 | tmpcr2 &= ~TIM_CR2_MMS; |
||
| 1655 | /* Select the TRGO source */ |
||
| 1656 | tmpcr2 |= sMasterConfig->MasterOutputTrigger; |
||
| 1657 | |||
| 1658 | /* Update TIMx CR2 */ |
||
| 1659 | htim->Instance->CR2 = tmpcr2; |
||
| 1660 | |||
| 1661 | if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) |
||
| 1662 | { |
||
| 1663 | /* Reset the MSM Bit */ |
||
| 1664 | tmpsmcr &= ~TIM_SMCR_MSM; |
||
| 1665 | /* Set master mode */ |
||
| 1666 | tmpsmcr |= sMasterConfig->MasterSlaveMode; |
||
| 1667 | |||
| 1668 | /* Update TIMx SMCR */ |
||
| 1669 | htim->Instance->SMCR = tmpsmcr; |
||
| 1670 | } |
||
| 1671 | |||
| 1672 | /* Change the htim state */ |
||
| 1673 | htim->State = HAL_TIM_STATE_READY; |
||
| 1674 | |||
| 1675 | __HAL_UNLOCK(htim); |
||
| 1676 | |||
| 1677 | return HAL_OK; |
||
| 1678 | } |
||
| 1679 | |||
| 1680 | /** |
||
| 1681 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
||
| 1682 | * and the AOE(automatic output enable). |
||
| 1683 | * @param htim TIM handle |
||
| 1684 | * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that |
||
| 1685 | * contains the BDTR Register configuration information for the TIM peripheral. |
||
| 1686 | * @note Interrupts can be generated when an active level is detected on the |
||
| 1687 | * break input, the break 2 input or the system break input. Break |
||
| 1688 | * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. |
||
| 1689 | * @retval HAL status |
||
| 1690 | */ |
||
| 1691 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
||
| 1692 | TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) |
||
| 1693 | { |
||
| 1694 | /* Keep this variable initialized to 0 as it is used to configure BDTR register */ |
||
| 1695 | uint32_t tmpbdtr = 0U; |
||
| 1696 | |||
| 1697 | /* Check the parameters */ |
||
| 1698 | assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); |
||
| 1699 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
||
| 1700 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
||
| 1701 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
||
| 1702 | assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); |
||
| 1703 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
||
| 1704 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
||
| 1705 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
||
| 1706 | |||
| 1707 | /* Check input state */ |
||
| 1708 | __HAL_LOCK(htim); |
||
| 1709 | |||
| 1710 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
||
| 1711 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
||
| 1712 | |||
| 1713 | /* Set the BDTR bits */ |
||
| 1714 | MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); |
||
| 1715 | MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); |
||
| 1716 | MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); |
||
| 1717 | MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); |
||
| 1718 | MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); |
||
| 1719 | MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); |
||
| 1720 | MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); |
||
| 1721 | |||
| 1722 | |||
| 1723 | /* Set TIMx_BDTR */ |
||
| 1724 | htim->Instance->BDTR = tmpbdtr; |
||
| 1725 | |||
| 1726 | __HAL_UNLOCK(htim); |
||
| 1727 | |||
| 1728 | return HAL_OK; |
||
| 1729 | } |
||
| 1730 | |||
| 1731 | /** |
||
| 1732 | * @brief Configures the TIMx Remapping input capabilities. |
||
| 1733 | * @param htim TIM handle. |
||
| 1734 | * @param Remap specifies the TIM remapping source. |
||
| 1735 | * For TIM14, the parameter can have the following values: |
||
| 1736 | * @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO |
||
| 1737 | * @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock |
||
| 1738 | * @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32 |
||
| 1739 | * @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO |
||
| 1740 | * |
||
| 1741 | * @retval HAL status |
||
| 1742 | */ |
||
| 1743 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) |
||
| 1744 | { |
||
| 1745 | __HAL_LOCK(htim); |
||
| 1746 | |||
| 1747 | /* Check parameters */ |
||
| 1748 | assert_param(IS_TIM_REMAP(htim->Instance, Remap)); |
||
| 1749 | |||
| 1750 | /* Set the Timer remapping configuration */ |
||
| 1751 | WRITE_REG(htim->Instance->OR, Remap); |
||
| 1752 | |||
| 1753 | __HAL_UNLOCK(htim); |
||
| 1754 | |||
| 1755 | return HAL_OK; |
||
| 1756 | } |
||
| 1757 | |||
| 1758 | /** |
||
| 1759 | * @} |
||
| 1760 | */ |
||
| 1761 | |||
| 1762 | /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions |
||
| 1763 | * @brief Extended Callbacks functions |
||
| 1764 | * |
||
| 1765 | @verbatim |
||
| 1766 | ============================================================================== |
||
| 1767 | ##### Extended Callbacks functions ##### |
||
| 1768 | ============================================================================== |
||
| 1769 | [..] |
||
| 1770 | This section provides Extended TIM callback functions: |
||
| 1771 | (+) Timer Commutation callback |
||
| 1772 | (+) Timer Break callback |
||
| 1773 | |||
| 1774 | @endverbatim |
||
| 1775 | * @{ |
||
| 1776 | */ |
||
| 1777 | |||
| 1778 | /** |
||
| 1779 | * @brief Hall commutation changed callback in non-blocking mode |
||
| 1780 | * @param htim TIM handle |
||
| 1781 | * @retval None |
||
| 1782 | */ |
||
| 1783 | __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) |
||
| 1784 | { |
||
| 1785 | /* Prevent unused argument(s) compilation warning */ |
||
| 1786 | UNUSED(htim); |
||
| 1787 | |||
| 1788 | /* NOTE : This function should not be modified, when the callback is needed, |
||
| 1789 | the HAL_TIMEx_CommutCallback could be implemented in the user file |
||
| 1790 | */ |
||
| 1791 | } |
||
| 1792 | /** |
||
| 1793 | * @brief Hall commutation changed half complete callback in non-blocking mode |
||
| 1794 | * @param htim TIM handle |
||
| 1795 | * @retval None |
||
| 1796 | */ |
||
| 1797 | __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim) |
||
| 1798 | { |
||
| 1799 | /* Prevent unused argument(s) compilation warning */ |
||
| 1800 | UNUSED(htim); |
||
| 1801 | |||
| 1802 | /* NOTE : This function should not be modified, when the callback is needed, |
||
| 1803 | the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file |
||
| 1804 | */ |
||
| 1805 | } |
||
| 1806 | |||
| 1807 | /** |
||
| 1808 | * @brief Hall Break detection callback in non-blocking mode |
||
| 1809 | * @param htim TIM handle |
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| 1810 | * @retval None |
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| 1811 | */ |
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| 1812 | __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) |
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| 1813 | { |
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| 1814 | /* Prevent unused argument(s) compilation warning */ |
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| 1815 | UNUSED(htim); |
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| 1816 | |||
| 1817 | /* NOTE : This function should not be modified, when the callback is needed, |
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| 1818 | the HAL_TIMEx_BreakCallback could be implemented in the user file |
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| 1819 | */ |
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| 1820 | } |
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| 1821 | /** |
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| 1822 | * @} |
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| 1823 | */ |
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| 1824 | |||
| 1825 | /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions |
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| 1826 | * @brief Extended Peripheral State functions |
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| 1827 | * |
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| 1828 | @verbatim |
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| 1829 | ============================================================================== |
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| 1830 | ##### Extended Peripheral State functions ##### |
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| 1831 | ============================================================================== |
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| 1832 | [..] |
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| 1833 | This subsection permits to get in run-time the status of the peripheral |
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| 1834 | and the data flow. |
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| 1835 | |||
| 1836 | @endverbatim |
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| 1837 | * @{ |
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| 1838 | */ |
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| 1839 | |||
| 1840 | /** |
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| 1841 | * @brief Return the TIM Hall Sensor interface handle state. |
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| 1842 | * @param htim TIM Hall Sensor handle |
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| 1843 | * @retval HAL state |
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| 1844 | */ |
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| 1845 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) |
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| 1846 | { |
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| 1847 | return htim->State; |
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| 1848 | } |
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| 1849 | |||
| 1850 | /** |
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| 1851 | * @} |
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| 1852 | */ |
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| 1853 | |||
| 1854 | /** |
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| 1855 | * @} |
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| 1856 | */ |
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| 1857 | |||
| 1858 | /* Private functions ---------------------------------------------------------*/ |
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| 1859 | /** @defgroup TIMEx_Private_Functions TIMEx Private Functions |
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| 1860 | * @{ |
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| 1861 | */ |
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| 1862 | |||
| 1863 | /** |
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| 1864 | * @brief TIM DMA Commutation callback. |
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| 1865 | * @param hdma pointer to DMA handle. |
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| 1866 | * @retval None |
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| 1867 | */ |
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| 1868 | void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) |
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| 1869 | { |
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| 1870 | TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
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| 1871 | |||
| 1872 | /* Change the htim state */ |
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| 1873 | htim->State = HAL_TIM_STATE_READY; |
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| 1874 | |||
| 1875 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) |
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| 1876 | htim->CommutationCallback(htim); |
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| 1877 | #else |
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| 1878 | HAL_TIMEx_CommutCallback(htim); |
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| 1879 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ |
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| 1880 | } |
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| 1881 | |||
| 1882 | /** |
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| 1883 | * @brief TIM DMA Commutation half complete callback. |
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| 1884 | * @param hdma pointer to DMA handle. |
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| 1885 | * @retval None |
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| 1886 | */ |
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| 1887 | void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma) |
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| 1888 | { |
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| 1889 | TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
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| 1890 | |||
| 1891 | /* Change the htim state */ |
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| 1892 | htim->State = HAL_TIM_STATE_READY; |
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| 1893 | |||
| 1894 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) |
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| 1895 | htim->CommutationHalfCpltCallback(htim); |
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| 1896 | #else |
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| 1897 | HAL_TIMEx_CommutHalfCpltCallback(htim); |
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| 1898 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ |
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| 1899 | } |
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| 1900 | |||
| 1901 | |||
| 1902 | /** |
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| 1903 | * @brief Enables or disables the TIM Capture Compare Channel xN. |
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| 1904 | * @param TIMx to select the TIM peripheral |
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| 1905 | * @param Channel specifies the TIM Channel |
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| 1906 | * This parameter can be one of the following values: |
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| 1907 | * @arg TIM_CHANNEL_1: TIM Channel 1 |
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| 1908 | * @arg TIM_CHANNEL_2: TIM Channel 2 |
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| 1909 | * @arg TIM_CHANNEL_3: TIM Channel 3 |
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| 1910 | * @param ChannelNState specifies the TIM Channel CCxNE bit new state. |
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| 1911 | * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. |
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| 1912 | * @retval None |
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| 1913 | */ |
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| 1914 | static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState) |
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| 1915 | { |
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| 1916 | uint32_t tmp; |
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| 1917 | |||
| 1918 | tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ |
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| 1919 | |||
| 1920 | /* Reset the CCxNE Bit */ |
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| 1921 | TIMx->CCER &= ~tmp; |
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| 1922 | |||
| 1923 | /* Set or reset the CCxNE Bit */ |
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| 1924 | TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ |
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| 1925 | } |
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| 1926 | /** |
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| 1927 | * @} |
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| 1928 | */ |
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| 1929 | |||
| 1930 | #endif /* HAL_TIM_MODULE_ENABLED */ |
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| 1931 | /** |
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| 1932 | * @} |
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| 1933 | */ |
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| 1934 | |||
| 1935 | /** |
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| 1936 | * @} |
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| 1937 | */ |
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| 1938 | |||
| 1939 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |