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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f0xx_hal_cortex.c |
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4 | * @author MCD Application Team |
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5 | * @brief CORTEX HAL module driver. |
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6 | * This file provides firmware functions to manage the following |
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7 | * functionalities of the CORTEX: |
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8 | * + Initialization and de-initialization functions |
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9 | * + Peripheral Control functions |
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10 | * |
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11 | * @verbatim |
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12 | ============================================================================== |
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13 | ##### How to use this driver ##### |
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14 | ============================================================================== |
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15 | |||
16 | [..] |
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17 | *** How to configure Interrupts using CORTEX HAL driver *** |
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18 | =========================================================== |
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19 | [..] |
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20 | This section provides functions allowing to configure the NVIC interrupts (IRQ). |
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21 | The Cortex-M0 exceptions are managed by CMSIS functions. |
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22 | (#) Enable and Configure the priority of the selected IRQ Channels. |
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23 | The priority can be 0..3. |
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24 | |||
25 | -@- Lower priority values gives higher priority. |
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26 | -@- Priority Order: |
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27 | (#@) Lowest priority. |
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28 | (#@) Lowest hardware priority (IRQn position). |
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29 | |||
30 | (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() |
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31 | |||
32 | (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() |
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33 | |||
34 | -@- Negative value of IRQn_Type are not allowed. |
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35 | |||
36 | |||
37 | [..] |
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38 | *** How to configure Systick using CORTEX HAL driver *** |
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39 | ======================================================== |
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40 | [..] |
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41 | Setup SysTick Timer for time base. |
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42 | |||
43 | (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which |
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44 | is a CMSIS function that: |
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45 | (++) Configures the SysTick Reload register with value passed as function parameter. |
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46 | (++) Configures the SysTick IRQ priority to the lowest value (0x03). |
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47 | (++) Resets the SysTick Counter register. |
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48 | (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). |
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49 | (++) Enables the SysTick Interrupt. |
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50 | (++) Starts the SysTick Counter. |
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51 | |||
52 | (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro |
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53 | HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the |
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54 | HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() macro is defined |
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55 | inside the stm32f0xx_hal_cortex.h file. |
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56 | |||
57 | (+) You can change the SysTick IRQ priority by calling the |
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58 | HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function |
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59 | call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function. |
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60 | |||
61 | (+) To adjust the SysTick time base, use the following formula: |
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62 | |||
63 | Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) |
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64 | (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function |
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65 | (++) Reload Value should not exceed 0xFFFFFF |
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66 | |||
67 | @endverbatim |
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68 | ****************************************************************************** |
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69 | * @attention |
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70 | * |
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71 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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72 | * All rights reserved.</center></h2> |
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73 | * |
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74 | * This software component is licensed by ST under BSD 3-Clause license, |
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75 | * the "License"; You may not use this file except in compliance with the |
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76 | * License. You may obtain a copy of the License at: |
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77 | * opensource.org/licenses/BSD-3-Clause |
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78 | * |
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79 | ****************************************************************************** |
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80 | */ |
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81 | |||
82 | /* Includes ------------------------------------------------------------------*/ |
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83 | #include "stm32f0xx_hal.h" |
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84 | |||
85 | /** @addtogroup STM32F0xx_HAL_Driver |
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86 | * @{ |
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87 | */ |
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88 | |||
89 | /** @defgroup CORTEX CORTEX |
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90 | * @brief CORTEX CORTEX HAL module driver |
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91 | * @{ |
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92 | */ |
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93 | |||
94 | #ifdef HAL_CORTEX_MODULE_ENABLED |
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95 | |||
96 | /* Private typedef -----------------------------------------------------------*/ |
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97 | /* Private define ------------------------------------------------------------*/ |
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98 | /* Private macro -------------------------------------------------------------*/ |
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99 | /* Private variables ---------------------------------------------------------*/ |
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100 | /* Private function prototypes -----------------------------------------------*/ |
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101 | /* Exported functions ---------------------------------------------------------*/ |
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102 | |||
103 | /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions |
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104 | * @{ |
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105 | */ |
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106 | |||
107 | |||
108 | /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions |
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109 | * @brief Initialization and Configuration functions |
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110 | * |
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111 | @verbatim |
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112 | ============================================================================== |
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113 | ##### Initialization and de-initialization functions ##### |
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114 | ============================================================================== |
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115 | [..] |
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116 | This section provides the CORTEX HAL driver functions allowing to configure Interrupts |
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117 | Systick functionalities |
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118 | |||
119 | @endverbatim |
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120 | * @{ |
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121 | */ |
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122 | |||
123 | /** |
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124 | * @brief Sets the priority of an interrupt. |
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125 | * @param IRQn External interrupt number . |
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126 | * This parameter can be an enumerator of IRQn_Type enumeration |
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127 | * (For the complete STM32 Devices IRQ Channels list, please refer to stm32f0xx.h file) |
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128 | * @param PreemptPriority The preemption priority for the IRQn channel. |
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129 | * This parameter can be a value between 0 and 3. |
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130 | * A lower priority value indicates a higher priority |
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131 | * @param SubPriority the subpriority level for the IRQ channel. |
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132 | * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because |
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133 | * no subpriority supported in Cortex M0 based products. |
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134 | * @retval None |
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135 | */ |
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136 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) |
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137 | { |
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138 | /* Check the parameters */ |
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139 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); |
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140 | NVIC_SetPriority(IRQn,PreemptPriority); |
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141 | } |
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142 | |||
143 | /** |
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144 | * @brief Enables a device specific interrupt in the NVIC interrupt controller. |
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145 | * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() |
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146 | * function should be called before. |
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147 | * @param IRQn External interrupt number. |
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148 | * This parameter can be an enumerator of IRQn_Type enumeration |
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149 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h)) |
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150 | * @retval None |
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151 | */ |
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152 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) |
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153 | { |
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154 | /* Check the parameters */ |
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155 | assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); |
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156 | |||
157 | /* Enable interrupt */ |
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158 | NVIC_EnableIRQ(IRQn); |
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159 | } |
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160 | |||
161 | /** |
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162 | * @brief Disables a device specific interrupt in the NVIC interrupt controller. |
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163 | * @param IRQn External interrupt number. |
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164 | * This parameter can be an enumerator of IRQn_Type enumeration |
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165 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h)) |
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166 | * @retval None |
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167 | */ |
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168 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) |
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169 | { |
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170 | /* Check the parameters */ |
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171 | assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); |
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172 | |||
173 | /* Disable interrupt */ |
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174 | NVIC_DisableIRQ(IRQn); |
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175 | } |
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176 | |||
177 | /** |
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178 | * @brief Initiates a system reset request to reset the MCU. |
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179 | * @retval None |
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180 | */ |
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181 | void HAL_NVIC_SystemReset(void) |
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182 | { |
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183 | /* System Reset */ |
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184 | NVIC_SystemReset(); |
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185 | } |
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186 | |||
187 | /** |
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188 | * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. |
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189 | * Counter is in free running mode to generate periodic interrupts. |
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190 | * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. |
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191 | * @retval status: - 0 Function succeeded. |
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192 | * - 1 Function failed. |
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193 | */ |
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194 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) |
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195 | { |
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196 | return SysTick_Config(TicksNumb); |
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197 | } |
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198 | /** |
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199 | * @} |
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200 | */ |
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201 | |||
202 | /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions |
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203 | * @brief Cortex control functions |
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204 | * |
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205 | @verbatim |
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206 | ============================================================================== |
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207 | ##### Peripheral Control functions ##### |
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208 | ============================================================================== |
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209 | [..] |
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210 | This subsection provides a set of functions allowing to control the CORTEX |
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211 | (NVIC, SYSTICK) functionalities. |
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212 | |||
213 | |||
214 | @endverbatim |
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215 | * @{ |
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216 | */ |
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217 | |||
218 | |||
219 | /** |
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220 | * @brief Gets the priority of an interrupt. |
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221 | * @param IRQn External interrupt number. |
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222 | * This parameter can be an enumerator of IRQn_Type enumeration |
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223 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h)) |
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224 | * @retval None |
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225 | */ |
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226 | uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn) |
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227 | { |
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228 | /* Get priority for Cortex-M system or device specific interrupts */ |
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229 | return NVIC_GetPriority(IRQn); |
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230 | } |
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231 | |||
232 | /** |
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233 | * @brief Sets Pending bit of an external interrupt. |
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234 | * @param IRQn External interrupt number |
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235 | * This parameter can be an enumerator of IRQn_Type enumeration |
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236 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h)) |
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237 | * @retval None |
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238 | */ |
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239 | void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) |
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240 | { |
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241 | /* Check the parameters */ |
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242 | assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); |
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243 | |||
244 | /* Set interrupt pending */ |
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245 | NVIC_SetPendingIRQ(IRQn); |
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246 | } |
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247 | |||
248 | /** |
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249 | * @brief Gets Pending Interrupt (reads the pending register in the NVIC |
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250 | * and returns the pending bit for the specified interrupt). |
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251 | * @param IRQn External interrupt number. |
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252 | * This parameter can be an enumerator of IRQn_Type enumeration |
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253 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h)) |
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254 | * @retval status: - 0 Interrupt status is not pending. |
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255 | * - 1 Interrupt status is pending. |
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256 | */ |
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257 | uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) |
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258 | { |
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259 | /* Check the parameters */ |
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260 | assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); |
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261 | |||
262 | /* Return 1 if pending else 0 */ |
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263 | return NVIC_GetPendingIRQ(IRQn); |
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264 | } |
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265 | |||
266 | /** |
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267 | * @brief Clears the pending bit of an external interrupt. |
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268 | * @param IRQn External interrupt number. |
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269 | * This parameter can be an enumerator of IRQn_Type enumeration |
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270 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h)) |
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271 | * @retval None |
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272 | */ |
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273 | void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) |
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274 | { |
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275 | /* Check the parameters */ |
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276 | assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); |
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277 | |||
278 | /* Clear pending interrupt */ |
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279 | NVIC_ClearPendingIRQ(IRQn); |
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280 | } |
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281 | |||
282 | /** |
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283 | * @brief Configures the SysTick clock source. |
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284 | * @param CLKSource specifies the SysTick clock source. |
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285 | * This parameter can be one of the following values: |
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286 | * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. |
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287 | * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. |
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288 | * @retval None |
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289 | */ |
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290 | void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) |
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291 | { |
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292 | /* Check the parameters */ |
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293 | assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); |
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294 | if (CLKSource == SYSTICK_CLKSOURCE_HCLK) |
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295 | { |
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296 | SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; |
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297 | } |
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298 | else |
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299 | { |
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300 | SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; |
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301 | } |
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302 | } |
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303 | |||
304 | /** |
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305 | * @brief This function handles SYSTICK interrupt request. |
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306 | * @retval None |
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307 | */ |
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308 | void HAL_SYSTICK_IRQHandler(void) |
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309 | { |
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310 | HAL_SYSTICK_Callback(); |
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311 | } |
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312 | |||
313 | /** |
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314 | * @brief SYSTICK callback. |
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315 | * @retval None |
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316 | */ |
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317 | __weak void HAL_SYSTICK_Callback(void) |
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318 | { |
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319 | /* NOTE : This function Should not be modified, when the callback is needed, |
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320 | the HAL_SYSTICK_Callback could be implemented in the user file |
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321 | */ |
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322 | } |
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323 | |||
324 | /** |
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325 | * @} |
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326 | */ |
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327 | |||
328 | /** |
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329 | * @} |
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330 | */ |
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331 | |||
332 | #endif /* HAL_CORTEX_MODULE_ENABLED */ |
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333 | /** |
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334 | * @} |
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335 | */ |
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336 | |||
337 | /** |
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338 | * @} |
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339 | */ |
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340 | |||
341 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |