WebSVN – FuelGauge – Blame – /trunk/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c

Rev	Author	Line No.	Line
2	mjames	1	/**
		2	******************************************************************************
		3	* @file stm32f0xx_hal_adc.c
		4	* @author MCD Application Team
		5	* @brief This file provides firmware functions to manage the following
		6	* functionalities of the Analog to Digital Convertor (ADC)
		7	* peripheral:
		8	* + Initialization and de-initialization functions
		9	* ++ Initialization and Configuration of ADC
		10	* + Operation functions
		11	* ++ Start, stop, get result of conversions of regular
		12	* group, using 3 possible modes: polling, interruption or DMA.
		13	* + Control functions
		14	* ++ Channels configuration on regular group
		15	* ++ Analog Watchdog configuration
		16	* + State functions
		17	* ++ ADC state machine management
		18	* ++ Interrupts and flags management
		19	* Other functions (extended functions) are available in file
		20	* "stm32f0xx_hal_adc_ex.c".
		21	*
		22	@verbatim
		23	==============================================================================
		24	##### ADC peripheral features #####
		25	==============================================================================
		26	[..]
		27	(+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
		28
		29	(+) Interrupt generation at the end of regular conversion and in case of
		30	analog watchdog or overrun events.
		31
		32	(+) Single and continuous conversion modes.
		33
		34	(+) Scan mode for conversion of several channels sequentially.
		35
		36	(+) Data alignment with in-built data coherency.
		37
		38	(+) Programmable sampling time (common for all channels)
		39
		40	(+) ADC conversion of regular group.
		41
		42	(+) External trigger (timer or EXTI) with configurable polarity
		43
		44	(+) DMA request generation for transfer of conversions data of regular group.
		45
		46	(+) ADC calibration
		47
		48	(+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
		49	slower speed.
		50
		51	(+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
		52	Vdda or to an external voltage reference).
		53
		54
		55	##### How to use this driver #####
		56	==============================================================================
		57	[..]
		58
		59	* Configuration of top level parameters related to ADC *
		60	============================================================
		61	[..]
		62
		63	(#) Enable the ADC interface
		64	(++) As prerequisite, ADC clock must be configured at RCC top level.
		65	Caution: On STM32F0, ADC clock frequency max is 14MHz (refer
		66	to device datasheet).
		67	Therefore, ADC clock prescaler must be configured in
		68	function of ADC clock source frequency to remain below
		69	this maximum frequency.
		70
		71	(++) Two clock settings are mandatory:
		72	(+++) ADC clock (core clock, also possibly conversion clock).
		73
		74	(+++) ADC clock (conversions clock).
		75	Two possible clock sources: synchronous clock derived from APB clock
		76	or asynchronous clock derived from ADC dedicated HSI RC oscillator
		77	14MHz.
		78	If asynchronous clock is selected, parameter "HSI14State" must be set either:
		79	- to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control
		80	the HSI14 oscillator enable/disable (if not used to supply the main
		81	system clock): feature used if ADC mode LowPowerAutoPowerOff is
		82	enabled.
		83	- to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator
		84	always enabled: can be used to supply the main system clock.
		85
		86	(+++) Example:
		87	Into HAL_ADC_MspInit() (recommended code location) or with
		88	other device clock parameters configuration:
		89	(+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory)
		90
		91	HI14 enable or let under control of ADC: (optional: if asynchronous clock selected)
		92	(+++) RCC_OscInitTypeDef RCC_OscInitStructure;
		93	(+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
		94	(+++) RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT;
		95	(+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL;
		96	(+++) RCC_OscInitStructure.PLL... (optional if used for system clock)
		97	(+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
		98
		99	(++) ADC clock source and clock prescaler are configured at ADC level with
		100	parameter "ClockPrescaler" using function HAL_ADC_Init().
		101
		102	(#) ADC pins configuration
		103	(++) Enable the clock for the ADC GPIOs
		104	using macro __HAL_RCC_GPIOx_CLK_ENABLE()
		105	(++) Configure these ADC pins in analog mode
		106	using function HAL_GPIO_Init()
		107
		108	(#) Optionally, in case of usage of ADC with interruptions:
		109	(++) Configure the NVIC for ADC
		110	using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
		111	(++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
		112	into the function of corresponding ADC interruption vector
		113	ADCx_IRQHandler().
		114
		115	(#) Optionally, in case of usage of DMA:
		116	(++) Configure the DMA (DMA channel, mode normal or circular, ...)
		117	using function HAL_DMA_Init().
		118	(++) Configure the NVIC for DMA
		119	using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
		120	(++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
		121	into the function of corresponding DMA interruption vector
		122	DMAx_Channelx_IRQHandler().
		123
		124	* Configuration of ADC, group regular, channels parameters *
		125	================================================================
		126	[..]
		127
		128	(#) Configure the ADC parameters (resolution, data alignment, ...)
		129	and regular group parameters (conversion trigger, sequencer, ...)
		130	using function HAL_ADC_Init().
		131
		132	(#) Configure the channels for regular group parameters (channel number,
		133	channel rank into sequencer, ..., into regular group)
		134	using function HAL_ADC_ConfigChannel().
		135
		136	(#) Optionally, configure the analog watchdog parameters (channels
		137	monitored, thresholds, ...)
		138	using function HAL_ADC_AnalogWDGConfig().
		139
		140	* Execution of ADC conversions *
		141	====================================
		142	[..]
		143
		144	(#) Optionally, perform an automatic ADC calibration to improve the
		145	conversion accuracy
		146	using function HAL_ADCEx_Calibration_Start().
		147
		148	(#) ADC driver can be used among three modes: polling, interruption,
		149	transfer by DMA.
		150
		151	(++) ADC conversion by polling:
		152	(+++) Activate the ADC peripheral and start conversions
		153	using function HAL_ADC_Start()
		154	(+++) Wait for ADC conversion completion
		155	using function HAL_ADC_PollForConversion()
		156	(+++) Retrieve conversion results
		157	using function HAL_ADC_GetValue()
		158	(+++) Stop conversion and disable the ADC peripheral
		159	using function HAL_ADC_Stop()
		160
		161	(++) ADC conversion by interruption:
		162	(+++) Activate the ADC peripheral and start conversions
		163	using function HAL_ADC_Start_IT()
		164	(+++) Wait for ADC conversion completion by call of function
		165	HAL_ADC_ConvCpltCallback()
		166	(this function must be implemented in user program)
		167	(+++) Retrieve conversion results
		168	using function HAL_ADC_GetValue()
		169	(+++) Stop conversion and disable the ADC peripheral
		170	using function HAL_ADC_Stop_IT()
		171
		172	(++) ADC conversion with transfer by DMA:
		173	(+++) Activate the ADC peripheral and start conversions
		174	using function HAL_ADC_Start_DMA()
		175	(+++) Wait for ADC conversion completion by call of function
		176	HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
		177	(these functions must be implemented in user program)
		178	(+++) Conversion results are automatically transferred by DMA into
		179	destination variable address.
		180	(+++) Stop conversion and disable the ADC peripheral
		181	using function HAL_ADC_Stop_DMA()
		182
		183	[..]
		184
		185	(@) Callback functions must be implemented in user program:
		186	(+@) HAL_ADC_ErrorCallback()
		187	(+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
		188	(+@) HAL_ADC_ConvCpltCallback()
		189	(+@) HAL_ADC_ConvHalfCpltCallback
		190
		191	* Deinitialization of ADC *
		192	============================================================
		193	[..]
		194
		195	(#) Disable the ADC interface
		196	(++) ADC clock can be hard reset and disabled at RCC top level.
		197	(++) Hard reset of ADC peripherals
		198	using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
		199	(++) ADC clock disable
		200	using the equivalent macro/functions as configuration step.
		201	(+++) Example:
		202	Into HAL_ADC_MspDeInit() (recommended code location) or with
		203	other device clock parameters configuration:
		204	(+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
		205	(+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_OFF; (if not used for system clock)
		206	(+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
		207
		208	(#) ADC pins configuration
		209	(++) Disable the clock for the ADC GPIOs
		210	using macro __HAL_RCC_GPIOx_CLK_DISABLE()
		211
		212	(#) Optionally, in case of usage of ADC with interruptions:
		213	(++) Disable the NVIC for ADC
		214	using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
		215
		216	(#) Optionally, in case of usage of DMA:
		217	(++) Deinitialize the DMA
		218	using function HAL_DMA_DeInit().
		219	(++) Disable the NVIC for DMA
		220	using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
		221
		222	[..]
		223
		224	* Callback registration *
		225	=============================================
		226	[..]
		227
		228	The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
		229	allows the user to configure dynamically the driver callbacks.
6	mjames	230	Use Functions HAL_ADC_RegisterCallback()
2	mjames	231	to register an interrupt callback.
		232	[..]
		233
6	mjames	234	Function HAL_ADC_RegisterCallback() allows to register following callbacks:
2	mjames	235	(+) ConvCpltCallback : ADC conversion complete callback
		236	(+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
		237	(+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
		238	(+) ErrorCallback : ADC error callback
		239	(+) MspInitCallback : ADC Msp Init callback
		240	(+) MspDeInitCallback : ADC Msp DeInit callback
		241	This function takes as parameters the HAL peripheral handle, the Callback ID
		242	and a pointer to the user callback function.
		243	[..]
		244
6	mjames	245	Use function HAL_ADC_UnRegisterCallback to reset a callback to the default
2	mjames	246	weak function.
		247	[..]
		248
6	mjames	249	HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
2	mjames	250	and the Callback ID.
		251	This function allows to reset following callbacks:
		252	(+) ConvCpltCallback : ADC conversion complete callback
		253	(+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
		254	(+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
		255	(+) ErrorCallback : ADC error callback
		256	(+) MspInitCallback : ADC Msp Init callback
		257	(+) MspDeInitCallback : ADC Msp DeInit callback
		258	[..]
		259
6	mjames	260	By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET
2	mjames	261	all callbacks are set to the corresponding weak functions:
6	mjames	262	examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback().
2	mjames	263	Exception done for MspInit and MspDeInit functions that are
6	mjames	264	reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when
2	mjames	265	these callbacks are null (not registered beforehand).
		266	[..]
		267
6	mjames	268	If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit()
2	mjames	269	keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
		270	[..]
		271
6	mjames	272	Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only.
2	mjames	273	Exception done MspInit/MspDeInit functions that can be registered/unregistered
6	mjames	274	in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state,
2	mjames	275	thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
		276	[..]
		277
		278	Then, the user first registers the MspInit/MspDeInit user callbacks
6	mjames	279	using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit()
		280	or HAL_ADC_Init() function.
2	mjames	281	[..]
		282
		283	When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
		284	not defined, the callback registration feature is not available and all callbacks
		285	are set to the corresponding weak functions.
		286
		287	@endverbatim
		288	******************************************************************************
		289	* @attention
		290	*
		291	* <h2><center>© Copyright (c) 2016 STMicroelectronics.
		292	* All rights reserved.</center></h2>
		293	*
		294	* This software component is licensed by ST under BSD 3-Clause license,
		295	* the "License"; You may not use this file except in compliance with the
		296	* License. You may obtain a copy of the License at:
		297	* opensource.org/licenses/BSD-3-Clause
		298	*
		299	******************************************************************************
		300	*/
		301
		302	/* Includes ------------------------------------------------------------------*/
		303	#include "stm32f0xx_hal.h"
		304
		305	/** @addtogroup STM32F0xx_HAL_Driver
		306	* @{
		307	*/
		308
		309	/** @defgroup ADC ADC
		310	* @brief ADC HAL module driver
		311	* @{
		312	*/
		313
		314	#ifdef HAL_ADC_MODULE_ENABLED
		315
		316	/* Private typedef -----------------------------------------------------------*/
		317	/* Private define ------------------------------------------------------------*/
		318	/** @defgroup ADC_Private_Constants ADC Private Constants
		319	* @{
		320	*/
		321
		322	/* Fixed timeout values for ADC calibration, enable settling time, disable */
		323	/* settling time. */
		324	/* Values defined to be higher than worst cases: low clock frequency, */
		325	/* maximum prescaler. */
		326	/* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */
		327	/* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */
		328	/* Unit: ms */
		329	#define ADC_ENABLE_TIMEOUT ( 2U)
		330	#define ADC_DISABLE_TIMEOUT ( 2U)
		331	#define ADC_STOP_CONVERSION_TIMEOUT ( 2U)
		332
		333	/* Delay for ADC stabilization time. */
		334	/* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
		335	/* Unit: us */
		336	#define ADC_STAB_DELAY_US ( 1U)
		337
		338	/* Delay for temperature sensor stabilization time. */
		339	/* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
		340	/* Unit: us */
		341	#define ADC_TEMPSENSOR_DELAY_US ( 10U)
		342
		343	/**
		344	* @}
		345	*/
		346
		347	/* Private macro -------------------------------------------------------------*/
		348	/* Private variables ---------------------------------------------------------*/
		349	/* Private function prototypes -----------------------------------------------*/
		350	/** @defgroup ADC_Private_Functions ADC Private Functions
		351	* @{
		352	*/
		353	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
		354	static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
		355	static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc);
		356	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
		357	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
		358	static void ADC_DMAError(DMA_HandleTypeDef *hdma);
		359	/**
		360	* @}
		361	*/
		362
		363	/* Exported functions ---------------------------------------------------------*/
		364
		365	/** @defgroup ADC_Exported_Functions ADC Exported Functions
		366	* @{
		367	*/
		368
		369	/** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions
		370	* @brief Initialization and Configuration functions
		371	*
		372	@verbatim
		373	===============================================================================
		374	##### Initialization and de-initialization functions #####
		375	===============================================================================
		376	[..] This section provides functions allowing to:
		377	(+) Initialize and configure the ADC.
		378	(+) De-initialize the ADC
		379	@endverbatim
		380	* @{
		381	*/
		382
		383	/**
		384	* @brief Initializes the ADC peripheral and regular group according to
		385	* parameters specified in structure "ADC_InitTypeDef".
		386	* @note As prerequisite, ADC clock must be configured at RCC top level
		387	* depending on both possible clock sources: APB clock of HSI clock.
		388	* See commented example code below that can be copied and uncommented
		389	* into HAL_ADC_MspInit().
		390	* @note Possibility to update parameters on the fly:
		391	* This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
		392	* coming from ADC state reset. Following calls to this function can
		393	* be used to reconfigure some parameters of ADC_InitTypeDef
		394	* structure on the fly, without modifying MSP configuration. If ADC
		395	* MSP has to be modified again, HAL_ADC_DeInit() must be called
		396	* before HAL_ADC_Init().
		397	* The setting of these parameters is conditioned to ADC state.
		398	* For parameters constraints, see comments of structure
		399	* "ADC_InitTypeDef".
		400	* @note This function configures the ADC within 2 scopes: scope of entire
		401	* ADC and scope of regular group. For parameters details, see comments
		402	* of structure "ADC_InitTypeDef".
		403	* @param hadc ADC handle
		404	* @retval HAL status
		405	*/
		406	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
		407	{
		408	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		409	uint32_t tmpCFGR1 = 0U;
		410
		411	/* Check ADC handle */
		412	if(hadc == NULL)
		413	{
		414	return HAL_ERROR;
		415	}
		416
		417	/* Check the parameters */
		418	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		419	assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
		420	assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
		421	assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
		422	assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
		423	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
		424	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
		425	assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
		426	assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
		427	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
		428	assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
		429	assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
		430	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
		431	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
		432
		433	/* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
		434	/* at RCC top level depending on both possible clock sources: */
		435	/* APB clock or HSI clock. */
		436	/* Refer to header of this file for more details on clock enabling procedure*/
		437
		438	/* Actions performed only if ADC is coming from state reset: */
		439	/* - Initialization of ADC MSP */
		440	/* - ADC voltage regulator enable */
		441	if (hadc->State == HAL_ADC_STATE_RESET)
		442	{
		443	/* Initialize ADC error code */
		444	ADC_CLEAR_ERRORCODE(hadc);
		445
		446	/* Allocate lock resource and initialize it */
		447	hadc->Lock = HAL_UNLOCKED;
		448
		449	#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
		450	/* Init the ADC Callback settings */
		451	hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak callback */
		452	hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak callback */
		453	hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak callback */
		454	hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak callback */
		455
		456	if (hadc->MspInitCallback == NULL)
		457	{
		458	hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
		459	}
		460
		461	/* Init the low level hardware */
		462	hadc->MspInitCallback(hadc);
		463	#else
		464	/* Init the low level hardware */
		465	HAL_ADC_MspInit(hadc);
		466	#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
		467	}
		468
		469	/* Configuration of ADC parameters if previous preliminary actions are */
		470	/* correctly completed. */
		471	/* and if there is no conversion on going on regular group (ADC can be */
		472	/* enabled anyway, in case of call of this function to update a parameter */
		473	/* on the fly). */
		474	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
		475	(tmp_hal_status == HAL_OK) &&
		476	(ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) )
		477	{
		478	/* Set ADC state */
		479	ADC_STATE_CLR_SET(hadc->State,
		480	HAL_ADC_STATE_REG_BUSY,
		481	HAL_ADC_STATE_BUSY_INTERNAL);
		482
		483	/* Parameters update conditioned to ADC state: */
		484	/* Parameters that can be updated only when ADC is disabled: */
		485	/* - ADC clock mode */
		486	/* - ADC clock prescaler */
		487	/* - ADC resolution */
		488	if (ADC_IS_ENABLE(hadc) == RESET)
		489	{
		490	/* Some parameters of this register are not reset, since they are set */
		491	/* by other functions and must be kept in case of usage of this */
		492	/* function on the fly (update of a parameter of ADC_InitTypeDef */
		493	/* without needing to reconfigure all other ADC groups/channels */
		494	/* parameters): */
		495	/* - internal measurement paths: Vbat, temperature sensor, Vref */
		496	/* (set into HAL_ADC_ConfigChannel() ) */
		497
		498	/* Configuration of ADC resolution */
		499	MODIFY_REG(hadc->Instance->CFGR1,
		500	ADC_CFGR1_RES ,
		501	hadc->Init.Resolution );
		502
		503	/* Configuration of ADC clock mode: clock source AHB or HSI with */
		504	/* selectable prescaler */
		505	MODIFY_REG(hadc->Instance->CFGR2 ,
		506	ADC_CFGR2_CKMODE ,
		507	hadc->Init.ClockPrescaler );
		508	}
		509
		510	/* Configuration of ADC: */
		511	/* - discontinuous mode */
		512	/* - LowPowerAutoWait mode */
		513	/* - LowPowerAutoPowerOff mode */
		514	/* - continuous conversion mode */
		515	/* - overrun */
		516	/* - external trigger to start conversion */
		517	/* - external trigger polarity */
		518	/* - data alignment */
		519	/* - resolution */
		520	/* - scan direction */
		521	/* - DMA continuous request */
		522	hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN \|
		523	ADC_CFGR1_AUTOFF \|
		524	ADC_CFGR1_AUTDLY \|
		525	ADC_CFGR1_CONT \|
		526	ADC_CFGR1_OVRMOD \|
		527	ADC_CFGR1_EXTSEL \|
		528	ADC_CFGR1_EXTEN \|
		529	ADC_CFGR1_ALIGN \|
		530	ADC_CFGR1_SCANDIR \|
		531	ADC_CFGR1_DMACFG );
		532
		533	tmpCFGR1 \|= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) \|
		534	ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) \|
		535	ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) \|
		536	ADC_CFGR1_OVERRUN(hadc->Init.Overrun) \|
		537	hadc->Init.DataAlign \|
		538	ADC_SCANDIR(hadc->Init.ScanConvMode) \|
		539	ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) );
		540
		541	/* Enable discontinuous mode only if continuous mode is disabled */
		542	if (hadc->Init.DiscontinuousConvMode == ENABLE)
		543	{
		544	if (hadc->Init.ContinuousConvMode == DISABLE)
		545	{
		546	/* Enable the selected ADC group regular discontinuous mode */
		547	tmpCFGR1 \|= ADC_CFGR1_DISCEN;
		548	}
		549	else
		550	{
		551	/* ADC regular group discontinuous was intended to be enabled, */
		552	/* but ADC regular group modes continuous and sequencer discontinuous */
		553	/* cannot be enabled simultaneously. */
		554
		555	/* Update ADC state machine to error */
		556	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
		557
		558	/* Set ADC error code to ADC IP internal error */
		559	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		560	}
		561	}
		562
		563	/* Enable external trigger if trigger selection is different of software */
		564	/* start. */
		565	/* Note: This configuration keeps the hardware feature of parameter */
		566	/* ExternalTrigConvEdge "trigger edge none" equivalent to */
		567	/* software start. */
		568	if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
		569	{
		570	tmpCFGR1 \|= ( hadc->Init.ExternalTrigConv \|
		571	hadc->Init.ExternalTrigConvEdge );
		572	}
		573
		574	/* Update ADC configuration register with previous settings */
		575	hadc->Instance->CFGR1 \|= tmpCFGR1;
		576
		577	/* Channel sampling time configuration */
		578	/* Management of parameters "SamplingTimeCommon" and "SamplingTime" */
		579	/* (obsolete): sampling time set in this function if parameter */
		580	/* "SamplingTimeCommon" has been set to a valid sampling time. */
		581	/* Otherwise, sampling time is set into ADC channel initialization */
		582	/* structure with parameter "SamplingTime" (obsolete). */
		583	if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
		584	{
		585	/* Channel sampling time configuration */
		586	/* Clear the old sample time */
		587	hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
		588
		589	/* Set the new sample time */
		590	hadc->Instance->SMPR \|= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon);
		591	}
		592
		593	/* Check back that ADC registers have effectively been configured to */
		594	/* ensure of no potential problem of ADC core IP clocking. */
		595	/* Check through register CFGR1 (excluding analog watchdog configuration: */
		596	/* set into separate dedicated function, and bits of ADC resolution set */
		597	/* out of temporary variable 'tmpCFGR1'). */
		598	if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_RES))
		599	== tmpCFGR1)
		600	{
		601	/* Set ADC error code to none */
		602	ADC_CLEAR_ERRORCODE(hadc);
		603
		604	/* Set the ADC state */
		605	ADC_STATE_CLR_SET(hadc->State,
		606	HAL_ADC_STATE_BUSY_INTERNAL,
		607	HAL_ADC_STATE_READY);
		608	}
		609	else
		610	{
		611	/* Update ADC state machine to error */
		612	ADC_STATE_CLR_SET(hadc->State,
		613	HAL_ADC_STATE_BUSY_INTERNAL,
		614	HAL_ADC_STATE_ERROR_INTERNAL);
		615
		616	/* Set ADC error code to ADC IP internal error */
		617	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		618
		619	tmp_hal_status = HAL_ERROR;
		620	}
		621
		622	}
		623	else
		624	{
		625	/* Update ADC state machine to error */
		626	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
		627
		628	tmp_hal_status = HAL_ERROR;
		629	}
		630
		631	/* Return function status */
		632	return tmp_hal_status;
		633	}
		634
		635
		636	/**
		637	* @brief Deinitialize the ADC peripheral registers to their default reset
		638	* values, with deinitialization of the ADC MSP.
		639	* @note For devices with several ADCs: reset of ADC common registers is done
		640	* only if all ADCs sharing the same common group are disabled.
		641	* If this is not the case, reset of these common parameters reset is
		642	* bypassed without error reporting: it can be the intended behaviour in
		643	* case of reset of a single ADC while the other ADCs sharing the same
		644	* common group is still running.
		645	* @param hadc ADC handle
		646	* @retval HAL status
		647	*/
		648	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
		649	{
		650	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		651
		652	/* Check ADC handle */
		653	if(hadc == NULL)
		654	{
		655	return HAL_ERROR;
		656	}
		657
		658	/* Check the parameters */
		659	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		660
		661	/* Set ADC state */
		662	SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
		663
		664	/* Stop potential conversion on going, on regular group */
		665	tmp_hal_status = ADC_ConversionStop(hadc);
		666
		667	/* Disable ADC peripheral if conversions are effectively stopped */
		668	if (tmp_hal_status == HAL_OK)
		669	{
		670	/* Disable the ADC peripheral */
		671	tmp_hal_status = ADC_Disable(hadc);
		672
		673	/* Check if ADC is effectively disabled */
		674	if (tmp_hal_status != HAL_ERROR)
		675	{
		676	/* Change ADC state */
		677	hadc->State = HAL_ADC_STATE_READY;
		678	}
		679	}
		680
		681
		682	/* Configuration of ADC parameters if previous preliminary actions are */
		683	/* correctly completed. */
		684	if (tmp_hal_status != HAL_ERROR)
		685	{
		686
		687	/* ========== Reset ADC registers ========== */
		688	/* Reset register IER */
		689	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD \| ADC_IT_OVR \|
		690	ADC_IT_EOS \| ADC_IT_EOC \|
		691	ADC_IT_EOSMP \| ADC_IT_RDY ) );
		692
		693	/* Reset register ISR */
		694	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD \| ADC_FLAG_OVR \|
		695	ADC_FLAG_EOS \| ADC_FLAG_EOC \|
		696	ADC_FLAG_EOSMP \| ADC_FLAG_RDY ) );
		697
		698	/* Reset register CR */
		699	/* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */
		700	/* "read-set": no direct reset applicable. */
		701
		702	/* Reset register CFGR1 */
		703	hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_DISCEN \|
		704	ADC_CFGR1_AUTOFF \| ADC_CFGR1_WAIT \| ADC_CFGR1_CONT \| ADC_CFGR1_OVRMOD \|
		705	ADC_CFGR1_EXTEN \| ADC_CFGR1_EXTSEL \| ADC_CFGR1_ALIGN \| ADC_CFGR1_RES \|
		706	ADC_CFGR1_SCANDIR \| ADC_CFGR1_DMACFG \| ADC_CFGR1_DMAEN );
		707
		708	/* Reset register CFGR2 */
		709	/* Note: Update of ADC clock mode is conditioned to ADC state disabled: */
		710	/* already done above. */
		711	hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE;
		712
		713	/* Reset register SMPR */
		714	hadc->Instance->SMPR &= ~ADC_SMPR_SMP;
		715
		716	/* Reset register TR1 */
		717	hadc->Instance->TR &= ~(ADC_TR_HT \| ADC_TR_LT);
		718
		719	/* Reset register CHSELR */
		720	hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 \| ADC_CHSELR_CHSEL17 \| ADC_CHSELR_CHSEL16 \|
		721	ADC_CHSELR_CHSEL15 \| ADC_CHSELR_CHSEL14 \| ADC_CHSELR_CHSEL13 \| ADC_CHSELR_CHSEL12 \|
		722	ADC_CHSELR_CHSEL11 \| ADC_CHSELR_CHSEL10 \| ADC_CHSELR_CHSEL9 \| ADC_CHSELR_CHSEL8 \|
		723	ADC_CHSELR_CHSEL7 \| ADC_CHSELR_CHSEL6 \| ADC_CHSELR_CHSEL5 \| ADC_CHSELR_CHSEL4 \|
		724	ADC_CHSELR_CHSEL3 \| ADC_CHSELR_CHSEL2 \| ADC_CHSELR_CHSEL1 \| ADC_CHSELR_CHSEL0 );
		725
		726	/* Reset register DR */
		727	/* bits in access mode read only, no direct reset applicable*/
		728
		729	/* Reset register CCR */
		730	ADC->CCR &= ~(ADC_CCR_ALL);
		731
		732	/* ========== Hard reset ADC peripheral ========== */
		733	/* Performs a global reset of the entire ADC peripheral: ADC state is */
		734	/* forced to a similar state after device power-on. */
		735	/* If needed, copy-paste and uncomment the following reset code into */
		736	/* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
		737	/* */
		738	/* __HAL_RCC_ADC1_FORCE_RESET() */
		739	/* __HAL_RCC_ADC1_RELEASE_RESET() */
		740
		741	#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
		742	if (hadc->MspDeInitCallback == NULL)
		743	{
		744	hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
		745	}
		746
		747	/* DeInit the low level hardware */
		748	hadc->MspDeInitCallback(hadc);
		749	#else
		750	/* DeInit the low level hardware */
		751	HAL_ADC_MspDeInit(hadc);
		752	#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
		753
		754	/* Set ADC error code to none */
		755	ADC_CLEAR_ERRORCODE(hadc);
		756
		757	/* Set ADC state */
		758	hadc->State = HAL_ADC_STATE_RESET;
		759	}
		760
		761	/* Process unlocked */
		762	__HAL_UNLOCK(hadc);
		763
		764	/* Return function status */
		765	return tmp_hal_status;
		766	}
		767
		768
		769	/**
		770	* @brief Initializes the ADC MSP.
		771	* @param hadc ADC handle
		772	* @retval None
		773	*/
		774	__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
		775	{
		776	/* Prevent unused argument(s) compilation warning */
		777	UNUSED(hadc);
		778
		779	/* NOTE : This function should not be modified. When the callback is needed,
		780	function HAL_ADC_MspInit must be implemented in the user file.
		781	*/
		782	}
		783
		784	/**
		785	* @brief DeInitializes the ADC MSP.
		786	* @param hadc ADC handle
		787	* @retval None
		788	*/
		789	__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
		790	{
		791	/* Prevent unused argument(s) compilation warning */
		792	UNUSED(hadc);
		793
		794	/* NOTE : This function should not be modified. When the callback is needed,
		795	function HAL_ADC_MspDeInit must be implemented in the user file.
		796	*/
		797	}
		798
		799	#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
		800	/**
		801	* @brief Register a User ADC Callback
		802	* To be used instead of the weak predefined callback
		803	* @param hadc Pointer to a ADC_HandleTypeDef structure that contains
		804	* the configuration information for the specified ADC.
		805	* @param CallbackID ID of the callback to be registered
		806	* This parameter can be one of the following values:
		807	* @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
		808	* @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
		809	* @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
		810	* @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
		811	* @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
		812	* @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
		813	* @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
		814	* @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
		815	* @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
		816	* @param pCallback pointer to the Callback function
		817	* @retval HAL status
		818	*/
		819	HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback)
		820	{
		821	HAL_StatusTypeDef status = HAL_OK;
		822
		823	if (pCallback == NULL)
		824	{
		825	/* Update the error code */
		826	hadc->ErrorCode \|= HAL_ADC_ERROR_INVALID_CALLBACK;
		827
		828	return HAL_ERROR;
		829	}
		830
		831	if ((hadc->State & HAL_ADC_STATE_READY) != 0)
		832	{
		833	switch (CallbackID)
		834	{
		835	case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
		836	hadc->ConvCpltCallback = pCallback;
		837	break;
		838
		839	case HAL_ADC_CONVERSION_HALF_CB_ID :
		840	hadc->ConvHalfCpltCallback = pCallback;
		841	break;
		842
		843	case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
		844	hadc->LevelOutOfWindowCallback = pCallback;
		845	break;
		846
		847	case HAL_ADC_ERROR_CB_ID :
		848	hadc->ErrorCallback = pCallback;
		849	break;
		850
		851	case HAL_ADC_MSPINIT_CB_ID :
		852	hadc->MspInitCallback = pCallback;
		853	break;
		854
		855	case HAL_ADC_MSPDEINIT_CB_ID :
		856	hadc->MspDeInitCallback = pCallback;
		857	break;
		858
		859	default :
		860	/* Update the error code */
		861	hadc->ErrorCode \|= HAL_ADC_ERROR_INVALID_CALLBACK;
		862
		863	/* Return error status */
		864	status = HAL_ERROR;
		865	break;
		866	}
		867	}
		868	else if (HAL_ADC_STATE_RESET == hadc->State)
		869	{
		870	switch (CallbackID)
		871	{
		872	case HAL_ADC_MSPINIT_CB_ID :
		873	hadc->MspInitCallback = pCallback;
		874	break;
		875
		876	case HAL_ADC_MSPDEINIT_CB_ID :
		877	hadc->MspDeInitCallback = pCallback;
		878	break;
		879
		880	default :
		881	/* Update the error code */
		882	hadc->ErrorCode \|= HAL_ADC_ERROR_INVALID_CALLBACK;
		883
		884	/* Return error status */
		885	status = HAL_ERROR;
		886	break;
		887	}
		888	}
		889	else
		890	{
		891	/* Update the error code */
		892	hadc->ErrorCode \|= HAL_ADC_ERROR_INVALID_CALLBACK;
		893
		894	/* Return error status */
		895	status = HAL_ERROR;
		896	}
		897
		898	return status;
		899	}
		900
		901	/**
		902	* @brief Unregister a ADC Callback
		903	* ADC callback is redirected to the weak predefined callback
		904	* @param hadc Pointer to a ADC_HandleTypeDef structure that contains
		905	* the configuration information for the specified ADC.
		906	* @param CallbackID ID of the callback to be unregistered
		907	* This parameter can be one of the following values:
		908	* @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
		909	* @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
		910	* @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
		911	* @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
		912	* @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
		913	* @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
		914	* @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
		915	* @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
		916	* @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
		917	* @retval HAL status
		918	*/
		919	HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
		920	{
		921	HAL_StatusTypeDef status = HAL_OK;
		922
		923	if ((hadc->State & HAL_ADC_STATE_READY) != 0)
		924	{
		925	switch (CallbackID)
		926	{
		927	case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
		928	hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
		929	break;
		930
		931	case HAL_ADC_CONVERSION_HALF_CB_ID :
		932	hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
		933	break;
		934
		935	case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
		936	hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
		937	break;
		938
		939	case HAL_ADC_ERROR_CB_ID :
		940	hadc->ErrorCallback = HAL_ADC_ErrorCallback;
		941	break;
		942
		943	case HAL_ADC_MSPINIT_CB_ID :
		944	hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
		945	break;
		946
		947	case HAL_ADC_MSPDEINIT_CB_ID :
		948	hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
		949	break;
		950
		951	default :
		952	/* Update the error code */
		953	hadc->ErrorCode \|= HAL_ADC_ERROR_INVALID_CALLBACK;
		954
		955	/* Return error status */
		956	status = HAL_ERROR;
		957	break;
		958	}
		959	}
		960	else if (HAL_ADC_STATE_RESET == hadc->State)
		961	{
		962	switch (CallbackID)
		963	{
		964	case HAL_ADC_MSPINIT_CB_ID :
		965	hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
		966	break;
		967
		968	case HAL_ADC_MSPDEINIT_CB_ID :
		969	hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
		970	break;
		971
		972	default :
		973	/* Update the error code */
		974	hadc->ErrorCode \|= HAL_ADC_ERROR_INVALID_CALLBACK;
		975
		976	/* Return error status */
		977	status = HAL_ERROR;
		978	break;
		979	}
		980	}
		981	else
		982	{
		983	/* Update the error code */
		984	hadc->ErrorCode \|= HAL_ADC_ERROR_INVALID_CALLBACK;
		985
		986	/* Return error status */
		987	status = HAL_ERROR;
		988	}
		989
		990	return status;
		991	}
		992
		993	#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
		994
		995	/**
		996	* @}
		997	*/
		998
		999	/** @defgroup ADC_Exported_Functions_Group2 IO operation functions
		1000	* @brief IO operation functions
		1001	*
		1002	@verbatim
		1003	===============================================================================
		1004	##### IO operation functions #####
		1005	===============================================================================
		1006	[..] This section provides functions allowing to:
		1007	(+) Start conversion of regular group.
		1008	(+) Stop conversion of regular group.
		1009	(+) Poll for conversion complete on regular group.
		1010	(+) Poll for conversion event.
		1011	(+) Get result of regular channel conversion.
		1012	(+) Start conversion of regular group and enable interruptions.
		1013	(+) Stop conversion of regular group and disable interruptions.
		1014	(+) Handle ADC interrupt request
		1015	(+) Start conversion of regular group and enable DMA transfer.
		1016	(+) Stop conversion of regular group and disable ADC DMA transfer.
		1017	@endverbatim
		1018	* @{
		1019	*/
		1020
		1021	/**
		1022	* @brief Enables ADC, starts conversion of regular group.
		1023	* Interruptions enabled in this function: None.
		1024	* @param hadc ADC handle
		1025	* @retval HAL status
		1026	*/
		1027	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
		1028	{
		1029	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		1030
		1031	/* Check the parameters */
		1032	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1033
		1034	/* Perform ADC enable and conversion start if no conversion is on going */
		1035	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
		1036	{
		1037	/* Process locked */
		1038	__HAL_LOCK(hadc);
		1039
		1040	/* Enable the ADC peripheral */
		1041	/* If low power mode AutoPowerOff is enabled, power-on/off phases are */
		1042	/* performed automatically by hardware. */
		1043	if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
		1044	{
		1045	tmp_hal_status = ADC_Enable(hadc);
		1046	}
		1047
		1048	/* Start conversion if ADC is effectively enabled */
		1049	if (tmp_hal_status == HAL_OK)
		1050	{
		1051	/* Set ADC state */
		1052	/* - Clear state bitfield related to regular group conversion results */
		1053	/* - Set state bitfield related to regular operation */
		1054	ADC_STATE_CLR_SET(hadc->State,
		1055	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR \| HAL_ADC_STATE_REG_EOSMP,
		1056	HAL_ADC_STATE_REG_BUSY);
		1057
		1058	/* Reset ADC all error code fields */
		1059	ADC_CLEAR_ERRORCODE(hadc);
		1060
		1061	/* Process unlocked */
		1062	/* Unlock before starting ADC conversions: in case of potential */
		1063	/* interruption, to let the process to ADC IRQ Handler. */
		1064	__HAL_UNLOCK(hadc);
		1065
		1066	/* Clear regular group conversion flag and overrun flag */
		1067	/* (To ensure of no unknown state from potential previous ADC */
		1068	/* operations) */
		1069	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
		1070
		1071	/* Enable conversion of regular group. */
		1072	/* If software start has been selected, conversion starts immediately. */
		1073	/* If external trigger has been selected, conversion will start at next */
		1074	/* trigger event. */
		1075	hadc->Instance->CR \|= ADC_CR_ADSTART;
		1076	}
		1077	}
		1078	else
		1079	{
		1080	tmp_hal_status = HAL_BUSY;
		1081	}
		1082
		1083	/* Return function status */
		1084	return tmp_hal_status;
		1085	}
		1086
		1087	/**
		1088	* @brief Stop ADC conversion of regular group, disable ADC peripheral.
		1089	* @param hadc ADC handle
		1090	* @retval HAL status.
		1091	*/
		1092	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
		1093	{
		1094	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		1095
		1096	/* Check the parameters */
		1097	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1098
		1099	/* Process locked */
		1100	__HAL_LOCK(hadc);
		1101
		1102	/* 1. Stop potential conversion on going, on regular group */
		1103	tmp_hal_status = ADC_ConversionStop(hadc);
		1104
		1105	/* Disable ADC peripheral if conversions are effectively stopped */
		1106	if (tmp_hal_status == HAL_OK)
		1107	{
		1108	/* 2. Disable the ADC peripheral */
		1109	tmp_hal_status = ADC_Disable(hadc);
		1110
		1111	/* Check if ADC is effectively disabled */
		1112	if (tmp_hal_status == HAL_OK)
		1113	{
		1114	/* Set ADC state */
		1115	ADC_STATE_CLR_SET(hadc->State,
		1116	HAL_ADC_STATE_REG_BUSY,
		1117	HAL_ADC_STATE_READY);
		1118	}
		1119	}
		1120
		1121	/* Process unlocked */
		1122	__HAL_UNLOCK(hadc);
		1123
		1124	/* Return function status */
		1125	return tmp_hal_status;
		1126	}
		1127
		1128	/**
		1129	* @brief Wait for regular group conversion to be completed.
		1130	* @note ADC conversion flags EOS (end of sequence) and EOC (end of
		1131	* conversion) are cleared by this function, with an exception:
		1132	* if low power feature "LowPowerAutoWait" is enabled, flags are
		1133	* not cleared to not interfere with this feature until data register
		1134	* is read using function HAL_ADC_GetValue().
		1135	* @note This function cannot be used in a particular setup: ADC configured
		1136	* in DMA mode and polling for end of each conversion (ADC init
		1137	* parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
		1138	* In this case, DMA resets the flag EOC and polling cannot be
		1139	* performed on each conversion. Nevertheless, polling can still
		1140	* be performed on the complete sequence (ADC init
		1141	* parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
		1142	* @param hadc ADC handle
		1143	* @param Timeout Timeout value in millisecond.
		1144	* @retval HAL status
		1145	*/
		1146	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
		1147	{
		1148	uint32_t tickstart;
		1149	uint32_t tmp_Flag_EOC;
		1150
		1151	/* Check the parameters */
		1152	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1153
		1154	/* If end of conversion selected to end of sequence */
		1155	if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
		1156	{
		1157	tmp_Flag_EOC = ADC_FLAG_EOS;
		1158	}
		1159	/* If end of conversion selected to end of each conversion */
		1160	else /* ADC_EOC_SINGLE_CONV */
		1161	{
		1162	/* Verification that ADC configuration is compliant with polling for */
		1163	/* each conversion: */
		1164	/* Particular case is ADC configured in DMA mode and ADC sequencer with */
		1165	/* several ranks and polling for end of each conversion. */
		1166	/* For code simplicity sake, this particular case is generalized to */
		1167	/* ADC configured in DMA mode and and polling for end of each conversion. */
		1168	if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
		1169	{
		1170	/* Update ADC state machine to error */
		1171	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
		1172
		1173	/* Process unlocked */
		1174	__HAL_UNLOCK(hadc);
		1175
		1176	return HAL_ERROR;
		1177	}
		1178	else
		1179	{
		1180	tmp_Flag_EOC = (ADC_FLAG_EOC \| ADC_FLAG_EOS);
		1181	}
		1182	}
		1183
		1184	/* Get tick count */
		1185	tickstart = HAL_GetTick();
		1186
		1187	/* Wait until End of Conversion flag is raised */
		1188	while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
		1189	{
		1190	/* Check if timeout is disabled (set to infinite wait) */
		1191	if(Timeout != HAL_MAX_DELAY)
		1192	{
		1193	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
		1194	{
6	mjames	1195	/* New check to avoid false timeout detection in case of preemption */
		1196	if(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
		1197	{
		1198	/* Update ADC state machine to timeout */
		1199	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
		1200
		1201	/* Process unlocked */
		1202	__HAL_UNLOCK(hadc);
		1203
		1204	return HAL_TIMEOUT;
		1205	}
2	mjames	1206	}
		1207	}
		1208	}
		1209
		1210	/* Update ADC state machine */
		1211	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
		1212
		1213	/* Determine whether any further conversion upcoming on group regular */
		1214	/* by external trigger, continuous mode or scan sequence on going. */
		1215	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
		1216	(hadc->Init.ContinuousConvMode == DISABLE) )
		1217	{
		1218	/* If End of Sequence is reached, disable interrupts */
		1219	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
		1220	{
		1221	/* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
		1222	/* ADSTART==0 (no conversion on going) */
		1223	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
		1224	{
		1225	/* Disable ADC end of single conversion interrupt on group regular */
		1226	/* Note: Overrun interrupt was enabled with EOC interrupt in */
		1227	/* HAL_Start_IT(), but is not disabled here because can be used */
		1228	/* by overrun IRQ process below. */
		1229	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC \| ADC_IT_EOS);
		1230
		1231	/* Set ADC state */
		1232	ADC_STATE_CLR_SET(hadc->State,
		1233	HAL_ADC_STATE_REG_BUSY,
		1234	HAL_ADC_STATE_READY);
		1235	}
		1236	else
		1237	{
		1238	/* Change ADC state to error state */
		1239	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
		1240
		1241	/* Set ADC error code to ADC IP internal error */
		1242	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		1243	}
		1244	}
		1245	}
		1246
		1247	/* Clear end of conversion flag of regular group if low power feature */
		1248	/* "LowPowerAutoWait " is disabled, to not interfere with this feature */
		1249	/* until data register is read using function HAL_ADC_GetValue(). */
		1250	if (hadc->Init.LowPowerAutoWait == DISABLE)
		1251	{
		1252	/* Clear regular group conversion flag */
		1253	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS));
		1254	}
		1255
		1256	/* Return ADC state */
		1257	return HAL_OK;
		1258	}
		1259
		1260	/**
		1261	* @brief Poll for conversion event.
		1262	* @param hadc ADC handle
		1263	* @param EventType the ADC event type.
		1264	* This parameter can be one of the following values:
		1265	* @arg ADC_AWD_EVENT: ADC Analog watchdog event
		1266	* @arg ADC_OVR_EVENT: ADC Overrun event
		1267	* @param Timeout Timeout value in millisecond.
		1268	* @retval HAL status
		1269	*/
		1270	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
		1271	{
		1272	uint32_t tickstart=0;
		1273
		1274	/* Check the parameters */
		1275	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1276	assert_param(IS_ADC_EVENT_TYPE(EventType));
		1277
		1278	/* Get tick count */
		1279	tickstart = HAL_GetTick();
		1280
		1281	/* Check selected event flag */
		1282	while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
		1283	{
		1284	/* Check if timeout is disabled (set to infinite wait) */
		1285	if(Timeout != HAL_MAX_DELAY)
		1286	{
		1287	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
		1288	{
6	mjames	1289	/* New check to avoid false timeout detection in case of preemption */
		1290	if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
		1291	{
		1292	/* Update ADC state machine to timeout */
		1293	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
		1294
		1295	/* Process unlocked */
		1296	__HAL_UNLOCK(hadc);
		1297
		1298	return HAL_TIMEOUT;
		1299	}
2	mjames	1300	}
		1301	}
		1302	}
		1303
		1304	switch(EventType)
		1305	{
		1306	/* Analog watchdog (level out of window) event */
		1307	case ADC_AWD_EVENT:
		1308	/* Set ADC state */
		1309	SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
		1310
		1311	/* Clear ADC analog watchdog flag */
		1312	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
		1313	break;
		1314
		1315	/* Overrun event */
		1316	default: /* Case ADC_OVR_EVENT */
		1317	/* If overrun is set to overwrite previous data, overrun event is not */
		1318	/* considered as an error. */
		1319	/* (cf ref manual "Managing conversions without using the DMA and without */
		1320	/* overrun ") */
		1321	if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)
		1322	{
		1323	/* Set ADC state */
		1324	SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
		1325
		1326	/* Set ADC error code to overrun */
		1327	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
		1328	}
		1329
		1330	/* Clear ADC Overrun flag */
		1331	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
		1332	break;
		1333	}
		1334
		1335	/* Return ADC state */
		1336	return HAL_OK;
		1337	}
		1338
		1339	/**
		1340	* @brief Enables ADC, starts conversion of regular group with interruption.
		1341	* Interruptions enabled in this function:
		1342	* - EOC (end of conversion of regular group) or EOS (end of
		1343	* sequence of regular group) depending on ADC initialization
		1344	* parameter "EOCSelection"
		1345	* - overrun (if available)
		1346	* Each of these interruptions has its dedicated callback function.
		1347	* @param hadc ADC handle
		1348	* @retval HAL status
		1349	*/
		1350	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
		1351	{
		1352	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		1353
		1354	/* Check the parameters */
		1355	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1356
		1357	/* Perform ADC enable and conversion start if no conversion is on going */
		1358	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
		1359	{
		1360	/* Process locked */
		1361	__HAL_LOCK(hadc);
		1362
		1363	/* Enable the ADC peripheral */
		1364	/* If low power mode AutoPowerOff is enabled, power-on/off phases are */
		1365	/* performed automatically by hardware. */
		1366	if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
		1367	{
		1368	tmp_hal_status = ADC_Enable(hadc);
		1369	}
		1370
		1371	/* Start conversion if ADC is effectively enabled */
		1372	if (tmp_hal_status == HAL_OK)
		1373	{
		1374	/* Set ADC state */
		1375	/* - Clear state bitfield related to regular group conversion results */
		1376	/* - Set state bitfield related to regular operation */
		1377	ADC_STATE_CLR_SET(hadc->State,
		1378	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR \| HAL_ADC_STATE_REG_EOSMP,
		1379	HAL_ADC_STATE_REG_BUSY);
		1380
		1381	/* Reset ADC all error code fields */
		1382	ADC_CLEAR_ERRORCODE(hadc);
		1383
		1384	/* Process unlocked */
		1385	/* Unlock before starting ADC conversions: in case of potential */
		1386	/* interruption, to let the process to ADC IRQ Handler. */
		1387	__HAL_UNLOCK(hadc);
		1388
		1389	/* Clear regular group conversion flag and overrun flag */
		1390	/* (To ensure of no unknown state from potential previous ADC */
		1391	/* operations) */
		1392	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
		1393
		1394	/* Enable ADC end of conversion interrupt */
		1395	/* Enable ADC overrun interrupt */
		1396	switch(hadc->Init.EOCSelection)
		1397	{
		1398	case ADC_EOC_SEQ_CONV:
		1399	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
		1400	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS \| ADC_IT_OVR));
		1401	break;
		1402	/* case ADC_EOC_SINGLE_CONV */
		1403	default:
		1404	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_EOS \| ADC_IT_OVR));
		1405	break;
		1406	}
		1407
		1408	/* Enable conversion of regular group. */
		1409	/* If software start has been selected, conversion starts immediately. */
		1410	/* If external trigger has been selected, conversion will start at next */
		1411	/* trigger event. */
		1412	hadc->Instance->CR \|= ADC_CR_ADSTART;
		1413	}
		1414	}
		1415	else
		1416	{
		1417	tmp_hal_status = HAL_BUSY;
		1418	}
		1419
		1420	/* Return function status */
		1421	return tmp_hal_status;
		1422	}
		1423
		1424
		1425	/**
		1426	* @brief Stop ADC conversion of regular group, disable interruption of
		1427	* end-of-conversion, disable ADC peripheral.
		1428	* @param hadc ADC handle
		1429	* @retval HAL status.
		1430	*/
		1431	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
		1432	{
		1433	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		1434
		1435	/* Check the parameters */
		1436	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1437
		1438	/* Process locked */
		1439	__HAL_LOCK(hadc);
		1440
		1441	/* 1. Stop potential conversion on going, on regular group */
		1442	tmp_hal_status = ADC_ConversionStop(hadc);
		1443
		1444	/* Disable ADC peripheral if conversions are effectively stopped */
		1445	if (tmp_hal_status == HAL_OK)
		1446	{
		1447	/* Disable ADC end of conversion interrupt for regular group */
		1448	/* Disable ADC overrun interrupt */
		1449	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_EOS \| ADC_IT_OVR));
		1450
		1451	/* 2. Disable the ADC peripheral */
		1452	tmp_hal_status = ADC_Disable(hadc);
		1453
		1454	/* Check if ADC is effectively disabled */
		1455	if (tmp_hal_status == HAL_OK)
		1456	{
		1457	/* Set ADC state */
		1458	ADC_STATE_CLR_SET(hadc->State,
		1459	HAL_ADC_STATE_REG_BUSY,
		1460	HAL_ADC_STATE_READY);
		1461	}
		1462	}
		1463
		1464	/* Process unlocked */
		1465	__HAL_UNLOCK(hadc);
		1466
		1467	/* Return function status */
		1468	return tmp_hal_status;
		1469	}
		1470
		1471	/**
		1472	* @brief Enables ADC, starts conversion of regular group and transfers result
		1473	* through DMA.
		1474	* Interruptions enabled in this function:
		1475	* - DMA transfer complete
		1476	* - DMA half transfer
		1477	* - overrun
		1478	* Each of these interruptions has its dedicated callback function.
		1479	* @param hadc ADC handle
		1480	* @param pData The destination Buffer address.
		1481	* @param Length The length of data to be transferred from ADC peripheral to memory.
		1482	* @retval None
		1483	*/
		1484	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
		1485	{
		1486	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		1487
		1488	/* Check the parameters */
		1489	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1490
		1491	/* Perform ADC enable and conversion start if no conversion is on going */
		1492	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
		1493	{
		1494	/* Process locked */
		1495	__HAL_LOCK(hadc);
		1496
		1497	/* Enable the ADC peripheral */
		1498	/* If low power mode AutoPowerOff is enabled, power-on/off phases are */
		1499	/* performed automatically by hardware. */
		1500	if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
		1501	{
		1502	tmp_hal_status = ADC_Enable(hadc);
		1503	}
		1504
		1505	/* Start conversion if ADC is effectively enabled */
		1506	if (tmp_hal_status == HAL_OK)
		1507	{
		1508	/* Set ADC state */
		1509	/* - Clear state bitfield related to regular group conversion results */
		1510	/* - Set state bitfield related to regular operation */
		1511	ADC_STATE_CLR_SET(hadc->State,
		1512	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR \| HAL_ADC_STATE_REG_EOSMP,
		1513	HAL_ADC_STATE_REG_BUSY);
		1514
		1515	/* Reset ADC all error code fields */
		1516	ADC_CLEAR_ERRORCODE(hadc);
		1517
		1518	/* Process unlocked */
		1519	/* Unlock before starting ADC conversions: in case of potential */
		1520	/* interruption, to let the process to ADC IRQ Handler. */
		1521	__HAL_UNLOCK(hadc);
		1522
		1523	/* Set the DMA transfer complete callback */
		1524	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
		1525
		1526	/* Set the DMA half transfer complete callback */
		1527	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
		1528
		1529	/* Set the DMA error callback */
		1530	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
		1531
		1532
		1533	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
		1534	/* start (in case of SW start): */
		1535
		1536	/* Clear regular group conversion flag and overrun flag */
		1537	/* (To ensure of no unknown state from potential previous ADC */
		1538	/* operations) */
		1539	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
		1540
		1541	/* Enable ADC overrun interrupt */
		1542	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
		1543
		1544	/* Enable ADC DMA mode */
		1545	hadc->Instance->CFGR1 \|= ADC_CFGR1_DMAEN;
		1546
		1547	/* Start the DMA channel */
		1548	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
		1549
		1550	/* Enable conversion of regular group. */
		1551	/* If software start has been selected, conversion starts immediately. */
		1552	/* If external trigger has been selected, conversion will start at next */
		1553	/* trigger event. */
		1554	hadc->Instance->CR \|= ADC_CR_ADSTART;
		1555	}
		1556	}
		1557	else
		1558	{
		1559	tmp_hal_status = HAL_BUSY;
		1560	}
		1561
		1562	/* Return function status */
		1563	return tmp_hal_status;
		1564	}
		1565
		1566	/**
		1567	* @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable
		1568	* ADC peripheral.
		1569	* Each of these interruptions has its dedicated callback function.
		1570	* @param hadc ADC handle
		1571	* @retval HAL status.
		1572	*/
		1573	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
		1574	{
		1575	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		1576
		1577	/* Check the parameters */
		1578	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1579
		1580	/* Process locked */
		1581	__HAL_LOCK(hadc);
		1582
		1583	/* 1. Stop potential conversion on going, on regular group */
		1584	tmp_hal_status = ADC_ConversionStop(hadc);
		1585
		1586	/* Disable ADC peripheral if conversions are effectively stopped */
		1587	if (tmp_hal_status == HAL_OK)
		1588	{
		1589	/* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
		1590	hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN;
		1591
		1592	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
		1593	/* while DMA transfer is on going) */
6	mjames	1594	if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
2	mjames	1595	{
6	mjames	1596	tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
		1597
		1598	/* Check if DMA channel effectively disabled */
		1599	if (tmp_hal_status != HAL_OK)
		1600	{
		1601	/* Update ADC state machine to error */
		1602	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
		1603	}
2	mjames	1604	}
		1605
		1606	/* Disable ADC overrun interrupt */
		1607	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
		1608
		1609	/* 2. Disable the ADC peripheral */
		1610	/* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */
		1611	/* in memory a potential failing status. */
		1612	if (tmp_hal_status == HAL_OK)
		1613	{
		1614	tmp_hal_status = ADC_Disable(hadc);
		1615	}
		1616	else
		1617	{
		1618	ADC_Disable(hadc);
		1619	}
		1620
		1621	/* Check if ADC is effectively disabled */
		1622	if (tmp_hal_status == HAL_OK)
		1623	{
		1624	/* Set ADC state */
		1625	ADC_STATE_CLR_SET(hadc->State,
		1626	HAL_ADC_STATE_REG_BUSY,
		1627	HAL_ADC_STATE_READY);
		1628	}
		1629
		1630	}
		1631
		1632	/* Process unlocked */
		1633	__HAL_UNLOCK(hadc);
		1634
		1635	/* Return function status */
		1636	return tmp_hal_status;
		1637	}
		1638
		1639	/**
		1640	* @brief Get ADC regular group conversion result.
		1641	* @note Reading register DR automatically clears ADC flag EOC
		1642	* (ADC group regular end of unitary conversion).
		1643	* @note This function does not clear ADC flag EOS
		1644	* (ADC group regular end of sequence conversion).
		1645	* Occurrence of flag EOS rising:
		1646	* - If sequencer is composed of 1 rank, flag EOS is equivalent
		1647	* to flag EOC.
		1648	* - If sequencer is composed of several ranks, during the scan
		1649	* sequence flag EOC only is raised, at the end of the scan sequence
		1650	* both flags EOC and EOS are raised.
		1651	* To clear this flag, either use function:
		1652	* in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
		1653	* model polling: @ref HAL_ADC_PollForConversion()
		1654	* or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
		1655	* @param hadc ADC handle
		1656	* @retval ADC group regular conversion data
		1657	*/
		1658	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
		1659	{
		1660	/* Check the parameters */
		1661	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1662
		1663	/* Note: EOC flag is not cleared here by software because automatically */
		1664	/* cleared by hardware when reading register DR. */
		1665
		1666	/* Return ADC converted value */
		1667	return hadc->Instance->DR;
		1668	}
		1669
		1670	/**
		1671	* @brief Handles ADC interrupt request.
		1672	* @param hadc ADC handle
		1673	* @retval None
		1674	*/
		1675	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
		1676	{
		1677	/* Check the parameters */
		1678	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1679	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
		1680	assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
		1681
		1682	/* ========== Check End of Conversion flag for regular group ========== */
		1683	if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) \|\|
		1684	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
		1685	{
		1686	/* Update state machine on conversion status if not in error state */
		1687	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
		1688	{
		1689	/* Set ADC state */
		1690	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
		1691	}
		1692
		1693	/* Determine whether any further conversion upcoming on group regular */
		1694	/* by external trigger, continuous mode or scan sequence on going. */
		1695	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
		1696	(hadc->Init.ContinuousConvMode == DISABLE) )
		1697	{
		1698	/* If End of Sequence is reached, disable interrupts */
		1699	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
		1700	{
		1701	/* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
		1702	/* ADSTART==0 (no conversion on going) */
		1703	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
		1704	{
		1705	/* Disable ADC end of single conversion interrupt on group regular */
		1706	/* Note: Overrun interrupt was enabled with EOC interrupt in */
		1707	/* HAL_Start_IT(), but is not disabled here because can be used */
		1708	/* by overrun IRQ process below. */
		1709	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC \| ADC_IT_EOS);
		1710
		1711	/* Set ADC state */
		1712	ADC_STATE_CLR_SET(hadc->State,
		1713	HAL_ADC_STATE_REG_BUSY,
		1714	HAL_ADC_STATE_READY);
		1715	}
		1716	else
		1717	{
		1718	/* Change ADC state to error state */
		1719	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
		1720
		1721	/* Set ADC error code to ADC IP internal error */
		1722	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		1723	}
		1724	}
		1725	}
		1726
		1727	/* Note: into callback, to determine if conversion has been triggered */
		1728	/* from EOC or EOS, possibility to use: */
		1729	/* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
		1730	#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
		1731	hadc->ConvCpltCallback(hadc);
		1732	#else
		1733	HAL_ADC_ConvCpltCallback(hadc);
		1734	#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
		1735
		1736
		1737	/* Clear regular group conversion flag */
		1738	/* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */
		1739	/* conversion flags clear induces the release of the preserved data.*/
		1740	/* Therefore, if the preserved data value is needed, it must be */
		1741	/* read preliminarily into HAL_ADC_ConvCpltCallback(). */
		1742	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS) );
		1743	}
		1744
		1745	/* ========== Check Analog watchdog flags ========== */
		1746	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
		1747	{
		1748	/* Set ADC state */
		1749	SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
		1750
		1751	#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
		1752	hadc->LevelOutOfWindowCallback(hadc);
		1753	#else
		1754	HAL_ADC_LevelOutOfWindowCallback(hadc);
		1755	#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
		1756
		1757	/* Clear ADC Analog watchdog flag */
		1758	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
		1759
		1760	}
		1761
		1762
		1763	/* ========== Check Overrun flag ========== */
		1764	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
		1765	{
		1766	/* If overrun is set to overwrite previous data (default setting), */
		1767	/* overrun event is not considered as an error. */
		1768	/* (cf ref manual "Managing conversions without using the DMA and without */
		1769	/* overrun ") */
		1770	/* Exception for usage with DMA overrun event always considered as an */
		1771	/* error. */
		1772	if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) \|\|
		1773	HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) )
		1774	{
		1775	/* Set ADC error code to overrun */
		1776	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
		1777
		1778	/* Clear ADC overrun flag */
		1779	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
		1780
		1781	#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
		1782	hadc->ErrorCallback(hadc);
		1783	#else
		1784	HAL_ADC_ErrorCallback(hadc);
		1785	#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
		1786	}
		1787
		1788	/* Clear the Overrun flag */
		1789	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
		1790	}
		1791
		1792	}
		1793
		1794
		1795	/**
		1796	* @brief Conversion complete callback in non blocking mode
		1797	* @param hadc ADC handle
		1798	* @retval None
		1799	*/
		1800	__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
		1801	{
		1802	/* Prevent unused argument(s) compilation warning */
		1803	UNUSED(hadc);
		1804
		1805	/* NOTE : This function should not be modified. When the callback is needed,
		1806	function HAL_ADC_ConvCpltCallback must be implemented in the user file.
		1807	*/
		1808	}
		1809
		1810	/**
		1811	* @brief Conversion DMA half-transfer callback in non blocking mode
		1812	* @param hadc ADC handle
		1813	* @retval None
		1814	*/
		1815	__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
		1816	{
		1817	/* Prevent unused argument(s) compilation warning */
		1818	UNUSED(hadc);
		1819
		1820	/* NOTE : This function should not be modified. When the callback is needed,
		1821	function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
		1822	*/
		1823	}
		1824
		1825	/**
		1826	* @brief Analog watchdog callback in non blocking mode.
		1827	* @param hadc ADC handle
		1828	* @retval None
		1829	*/
		1830	__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
		1831	{
		1832	/* Prevent unused argument(s) compilation warning */
		1833	UNUSED(hadc);
		1834
		1835	/* NOTE : This function should not be modified. When the callback is needed,
		1836	function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file.
		1837	*/
		1838	}
		1839
		1840	/**
		1841	* @brief ADC error callback in non blocking mode
		1842	* (ADC conversion with interruption or transfer by DMA)
		1843	* @param hadc ADC handle
		1844	* @retval None
		1845	*/
		1846	__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
		1847	{
		1848	/* Prevent unused argument(s) compilation warning */
		1849	UNUSED(hadc);
		1850
		1851	/* NOTE : This function should not be modified. When the callback is needed,
		1852	function HAL_ADC_ErrorCallback must be implemented in the user file.
		1853	*/
		1854	}
		1855
		1856
		1857	/**
		1858	* @}
		1859	*/
		1860
		1861	/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
		1862	* @brief Peripheral Control functions
		1863	*
		1864	@verbatim
		1865	===============================================================================
		1866	##### Peripheral Control functions #####
		1867	===============================================================================
		1868	[..] This section provides functions allowing to:
		1869	(+) Configure channels on regular group
		1870	(+) Configure the analog watchdog
		1871
		1872	@endverbatim
		1873	* @{
		1874	*/
		1875
		1876	/**
		1877	* @brief Configures the the selected channel to be linked to the regular
		1878	* group.
		1879	* @note In case of usage of internal measurement channels:
		1880	* VrefInt/Vbat/TempSensor.
		1881	* Sampling time constraints must be respected (sampling time can be
		1882	* adjusted in function of ADC clock frequency and sampling time
		1883	* setting).
		1884	* Refer to device datasheet for timings values, parameters TS_vrefint,
		1885	* TS_vbat, TS_temp (values rough order: 5us to 17us).
		1886	* These internal paths can be be disabled using function
		1887	* HAL_ADC_DeInit().
		1888	* @note Possibility to update parameters on the fly:
		1889	* This function initializes channel into regular group, following
		1890	* calls to this function can be used to reconfigure some parameters
		1891	* of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
		1892	* the ADC.
		1893	* The setting of these parameters is conditioned to ADC state.
		1894	* For parameters constraints, see comments of structure
		1895	* "ADC_ChannelConfTypeDef".
		1896	* @param hadc ADC handle
		1897	* @param sConfig Structure of ADC channel for regular group.
		1898	* @retval HAL status
		1899	*/
		1900	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
		1901	{
		1902	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		1903	__IO uint32_t wait_loop_index = 0U;
		1904
		1905	/* Check the parameters */
		1906	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		1907	assert_param(IS_ADC_CHANNEL(sConfig->Channel));
		1908	assert_param(IS_ADC_RANK(sConfig->Rank));
		1909
		1910	if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
		1911	{
		1912	assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
		1913	}
		1914
		1915	/* Process locked */
		1916	__HAL_LOCK(hadc);
		1917
		1918	/* Parameters update conditioned to ADC state: */
		1919	/* Parameters that can be updated when ADC is disabled or enabled without */
		1920	/* conversion on going on regular group: */
		1921	/* - Channel number */
		1922	/* - Channel sampling time */
		1923	/* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */
		1924	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
		1925	{
		1926	/* Configure channel: depending on rank setting, add it or remove it from */
		1927	/* ADC conversion sequencer. */
		1928	if (sConfig->Rank != ADC_RANK_NONE)
		1929	{
		1930	/* Regular sequence configuration */
		1931	/* Set the channel selection register from the selected channel */
		1932	hadc->Instance->CHSELR \|= ADC_CHSELR_CHANNEL(sConfig->Channel);
		1933
		1934	/* Channel sampling time configuration */
		1935	/* Management of parameters "SamplingTimeCommon" and "SamplingTime" */
		1936	/* (obsolete): sampling time set in this function with */
		1937	/* parameter "SamplingTime" (obsolete) only if not already set into */
		1938	/* ADC initialization structure with parameter "SamplingTimeCommon". */
		1939	if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
		1940	{
		1941	/* Modify sampling time if needed (not needed in case of reoccurrence */
		1942	/* for several channels programmed consecutively into the sequencer) */
		1943	if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc))
		1944	{
		1945	/* Channel sampling time configuration */
		1946	/* Clear the old sample time */
		1947	hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
		1948
		1949	/* Set the new sample time */
		1950	hadc->Instance->SMPR \|= ADC_SMPR_SET(sConfig->SamplingTime);
		1951	}
		1952	}
		1953
		1954	/* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
		1955	/* internal measurement paths enable: If internal channel selected, */
		1956	/* enable dedicated internal buffers and path. */
		1957	/* Note: these internal measurement paths can be disabled using */
		1958	/* HAL_ADC_DeInit() or removing the channel from sequencer with */
		1959	/* channel configuration parameter "Rank". */
		1960	if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
		1961	{
		1962	/* If Channel_16 is selected, enable Temp. sensor measurement path. */
		1963	/* If Channel_17 is selected, enable VREFINT measurement path. */
		1964	/* If Channel_18 is selected, enable VBAT measurement path. */
		1965	ADC->CCR \|= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
		1966
		1967	/* If Temp. sensor is selected, wait for stabilization delay */
		1968	if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
		1969	{
		1970	/* Delay for temperature sensor stabilization time */
		1971	/* Compute number of CPU cycles to wait for */
		1972	wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
		1973	while(wait_loop_index != 0U)
		1974	{
		1975	wait_loop_index--;
		1976	}
		1977	}
		1978	}
		1979	}
		1980	else
		1981	{
		1982	/* Regular sequence configuration */
		1983	/* Reset the channel selection register from the selected channel */
		1984	hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel);
		1985
		1986	/* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
		1987	/* internal measurement paths disable: If internal channel selected, */
		1988	/* disable dedicated internal buffers and path. */
		1989	if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
		1990	{
		1991	/* If Channel_16 is selected, disable Temp. sensor measurement path. */
		1992	/* If Channel_17 is selected, disable VREFINT measurement path. */
		1993	/* If Channel_18 is selected, disable VBAT measurement path. */
		1994	ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
		1995	}
		1996	}
		1997
		1998	}
		1999
		2000	/* If a conversion is on going on regular group, no update on regular */
		2001	/* channel could be done on neither of the channel configuration structure */
		2002	/* parameters. */
		2003	else
		2004	{
		2005	/* Update ADC state machine to error */
		2006	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
		2007
		2008	tmp_hal_status = HAL_ERROR;
		2009	}
		2010
		2011	/* Process unlocked */
		2012	__HAL_UNLOCK(hadc);
		2013
		2014	/* Return function status */
		2015	return tmp_hal_status;
		2016	}
		2017
		2018
		2019	/**
		2020	* @brief Configures the analog watchdog.
		2021	* @note Possibility to update parameters on the fly:
		2022	* This function initializes the selected analog watchdog, following
		2023	* calls to this function can be used to reconfigure some parameters
		2024	* of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting
		2025	* the ADC.
		2026	* The setting of these parameters is conditioned to ADC state.
		2027	* For parameters constraints, see comments of structure
		2028	* "ADC_AnalogWDGConfTypeDef".
		2029	* @param hadc ADC handle
		2030	* @param AnalogWDGConfig Structure of ADC analog watchdog configuration
		2031	* @retval HAL status
		2032	*/
		2033	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
		2034	{
		2035	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
		2036
		2037	uint32_t tmpAWDHighThresholdShifted;
		2038	uint32_t tmpAWDLowThresholdShifted;
		2039
		2040	/* Check the parameters */
		2041	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		2042	assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
		2043	assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
		2044
		2045	/* Verify if threshold is within the selected ADC resolution */
		2046	assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
		2047	assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
		2048
		2049	if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
		2050	{
		2051	assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
		2052	}
		2053
		2054	/* Process locked */
		2055	__HAL_LOCK(hadc);
		2056
		2057	/* Parameters update conditioned to ADC state: */
		2058	/* Parameters that can be updated when ADC is disabled or enabled without */
		2059	/* conversion on going on regular group: */
		2060	/* - Analog watchdog channels */
		2061	/* - Analog watchdog thresholds */
		2062	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
		2063	{
		2064	/* Configuration of analog watchdog: */
		2065	/* - Set the analog watchdog enable mode: one or overall group of */
		2066	/* channels. */
		2067	/* - Set the Analog watchdog channel (is not used if watchdog */
		2068	/* mode "all channels": ADC_CFGR_AWD1SGL=0). */
		2069	hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL \|
		2070	ADC_CFGR1_AWDEN \|
		2071	ADC_CFGR1_AWDCH );
		2072
		2073	hadc->Instance->CFGR1 \|= ( AnalogWDGConfig->WatchdogMode \|
		2074	ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) );
		2075
		2076	/* Shift the offset in function of the selected ADC resolution: Thresholds*/
		2077	/* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
		2078	tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
		2079	tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
		2080
		2081	/* Set the high and low thresholds */
		2082	hadc->Instance->TR &= ~(ADC_TR_HT \| ADC_TR_LT);
		2083	hadc->Instance->TR \|= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) \|
		2084	tmpAWDLowThresholdShifted );
		2085
		2086	/* Clear the ADC Analog watchdog flag (in case of left enabled by */
		2087	/* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */
		2088	/* or HAL_ADC_PollForEvent(). */
		2089	__HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD);
		2090
		2091	/* Configure ADC Analog watchdog interrupt */
		2092	if(AnalogWDGConfig->ITMode == ENABLE)
		2093	{
		2094	/* Enable the ADC Analog watchdog interrupt */
		2095	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
		2096	}
		2097	else
		2098	{
		2099	/* Disable the ADC Analog watchdog interrupt */
		2100	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
		2101	}
		2102
		2103	}
		2104	/* If a conversion is on going on regular group, no update could be done */
		2105	/* on neither of the AWD configuration structure parameters. */
		2106	else
		2107	{
		2108	/* Update ADC state machine to error */
		2109	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
		2110
		2111	tmp_hal_status = HAL_ERROR;
		2112	}
		2113
		2114
		2115	/* Process unlocked */
		2116	__HAL_UNLOCK(hadc);
		2117
		2118	/* Return function status */
		2119	return tmp_hal_status;
		2120	}
		2121
		2122
		2123	/**
		2124	* @}
		2125	*/
		2126
		2127
		2128	/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
		2129	* @brief Peripheral State functions
		2130	*
		2131	@verbatim
		2132	===============================================================================
		2133	##### Peripheral State and Errors functions #####
		2134	===============================================================================
		2135	[..]
		2136	This subsection provides functions to get in run-time the status of the
		2137	peripheral.
		2138	(+) Check the ADC state
		2139	(+) Check the ADC error code
		2140
		2141	@endverbatim
		2142	* @{
		2143	*/
		2144
		2145	/**
		2146	* @brief Return the ADC state
		2147	* @note ADC state machine is managed by bitfields, ADC status must be
		2148	* compared with states bits.
		2149	* For example:
		2150	* " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
		2151	* " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) "
		2152	* @param hadc ADC handle
		2153	* @retval HAL state
		2154	*/
		2155	uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
		2156	{
		2157	/* Check the parameters */
		2158	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		2159
		2160	/* Return ADC state */
		2161	return hadc->State;
		2162	}
		2163
		2164	/**
		2165	* @brief Return the ADC error code
		2166	* @param hadc ADC handle
		2167	* @retval ADC Error Code
		2168	*/
		2169	uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
		2170	{
		2171	return hadc->ErrorCode;
		2172	}
		2173
		2174	/**
		2175	* @}
		2176	*/
		2177
		2178	/**
		2179	* @}
		2180	*/
		2181
		2182	/** @defgroup ADC_Private_Functions ADC Private Functions
		2183	* @{
		2184	*/
		2185
		2186	/**
		2187	* @brief Enable the selected ADC.
		2188	* @note Prerequisite condition to use this function: ADC must be disabled
		2189	* and voltage regulator must be enabled (done into HAL_ADC_Init()).
		2190	* @note If low power mode AutoPowerOff is enabled, power-on/off phases are
		2191	* performed automatically by hardware.
		2192	* In this mode, this function is useless and must not be called because
		2193	* flag ADC_FLAG_RDY is not usable.
		2194	* Therefore, this function must be called under condition of
		2195	* "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
		2196	* @param hadc ADC handle
		2197	* @retval HAL status.
		2198	*/
		2199	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
		2200	{
		2201	uint32_t tickstart = 0U;
		2202	__IO uint32_t wait_loop_index = 0U;
		2203
		2204	/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
		2205	/* enabling phase not yet completed: flag ADC ready not yet set). */
		2206	/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
		2207	/* causes: ADC clock not running, ...). */
		2208	if (ADC_IS_ENABLE(hadc) == RESET)
		2209	{
		2210	/* Check if conditions to enable the ADC are fulfilled */
		2211	if (ADC_ENABLING_CONDITIONS(hadc) == RESET)
		2212	{
		2213	/* Update ADC state machine to error */
		2214	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
		2215
		2216	/* Set ADC error code to ADC IP internal error */
		2217	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		2218
		2219	return HAL_ERROR;
		2220	}
		2221
		2222	/* Enable the ADC peripheral */
		2223	__HAL_ADC_ENABLE(hadc);
		2224
		2225	/* Delay for ADC stabilization time */
		2226	/* Compute number of CPU cycles to wait for */
		2227	wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
		2228	while(wait_loop_index != 0U)
		2229	{
		2230	wait_loop_index--;
		2231	}
		2232
		2233	/* Get tick count */
		2234	tickstart = HAL_GetTick();
		2235
		2236	/* Wait for ADC effectively enabled */
		2237	while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
		2238	{
		2239	if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
		2240	{
6	mjames	2241	/* New check to avoid false timeout detection in case of preemption */
		2242	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
		2243	{
		2244	/* Update ADC state machine to error */
		2245	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
		2246
		2247	/* Set ADC error code to ADC IP internal error */
		2248	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		2249
		2250	return HAL_ERROR;
		2251	}
2	mjames	2252	}
6	mjames	2253	}
2	mjames	2254	}
		2255
		2256	/* Return HAL status */
		2257	return HAL_OK;
		2258	}
		2259
		2260	/**
		2261	* @brief Disable the selected ADC.
		2262	* @note Prerequisite condition to use this function: ADC conversions must be
		2263	* stopped.
		2264	* @param hadc ADC handle
		2265	* @retval HAL status.
		2266	*/
		2267	static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
		2268	{
		2269	uint32_t tickstart = 0U;
		2270
		2271	/* Verification if ADC is not already disabled: */
		2272	/* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
		2273	/* disabled. */
		2274	if (ADC_IS_ENABLE(hadc) != RESET)
		2275	{
		2276	/* Check if conditions to disable the ADC are fulfilled */
		2277	if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
		2278	{
		2279	/* Disable the ADC peripheral */
		2280	__HAL_ADC_DISABLE(hadc);
		2281	}
		2282	else
		2283	{
		2284	/* Update ADC state machine to error */
		2285	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
		2286
		2287	/* Set ADC error code to ADC IP internal error */
		2288	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		2289
		2290	return HAL_ERROR;
		2291	}
		2292
		2293	/* Wait for ADC effectively disabled */
		2294	/* Get tick count */
		2295	tickstart = HAL_GetTick();
		2296
		2297	while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
		2298	{
		2299	if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
		2300	{
6	mjames	2301	/* New check to avoid false timeout detection in case of preemption */
		2302	if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
		2303	{
		2304	/* Update ADC state machine to error */
		2305	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
		2306
		2307	/* Set ADC error code to ADC IP internal error */
		2308	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		2309
		2310	return HAL_ERROR;
		2311	}
2	mjames	2312	}
		2313	}
		2314	}
		2315
		2316	/* Return HAL status */
		2317	return HAL_OK;
		2318	}
		2319
		2320
		2321	/**
		2322	* @brief Stop ADC conversion.
		2323	* @note Prerequisite condition to use this function: ADC conversions must be
		2324	* stopped to disable the ADC.
		2325	* @param hadc ADC handle
		2326	* @retval HAL status.
		2327	*/
		2328	static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc)
		2329	{
		2330	uint32_t tickstart = 0U;
		2331
		2332	/* Check the parameters */
		2333	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
		2334
		2335	/* Verification if ADC is not already stopped on regular group to bypass */
		2336	/* this function if not needed. */
		2337	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
		2338	{
		2339
		2340	/* Stop potential conversion on going on regular group */
		2341	/* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
		2342	if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
		2343	HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
		2344	{
		2345	/* Stop conversions on regular group */
		2346	hadc->Instance->CR \|= ADC_CR_ADSTP;
		2347	}
		2348
		2349	/* Wait for conversion effectively stopped */
		2350	/* Get tick count */
		2351	tickstart = HAL_GetTick();
		2352
		2353	while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
		2354	{
		2355	if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
		2356	{
6	mjames	2357	/* New check to avoid false timeout detection in case of preemption */
		2358	if((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
		2359	{
		2360	/* Update ADC state machine to error */
		2361	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
		2362
		2363	/* Set ADC error code to ADC IP internal error */
		2364	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		2365
		2366	return HAL_ERROR;
		2367	}
2	mjames	2368	}
		2369	}
		2370	}
		2371
		2372	/* Return HAL status */
		2373	return HAL_OK;
		2374	}
		2375
		2376
		2377	/**
		2378	* @brief DMA transfer complete callback.
		2379	* @param hdma pointer to DMA handle.
		2380	* @retval None
		2381	*/
		2382	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
		2383	{
		2384	/* Retrieve ADC handle corresponding to current DMA handle */
		2385	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
		2386
		2387	/* Update state machine on conversion status if not in error state */
		2388	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL \| HAL_ADC_STATE_ERROR_DMA))
		2389	{
		2390	/* Set ADC state */
		2391	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
		2392
		2393	/* Determine whether any further conversion upcoming on group regular */
		2394	/* by external trigger, continuous mode or scan sequence on going. */
		2395	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
		2396	(hadc->Init.ContinuousConvMode == DISABLE) )
		2397	{
		2398	/* If End of Sequence is reached, disable interrupts */
		2399	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
		2400	{
		2401	/* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
		2402	/* ADSTART==0 (no conversion on going) */
		2403	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
		2404	{
		2405	/* Disable ADC end of single conversion interrupt on group regular */
		2406	/* Note: Overrun interrupt was enabled with EOC interrupt in */
		2407	/* HAL_Start_IT(), but is not disabled here because can be used */
		2408	/* by overrun IRQ process below. */
		2409	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC \| ADC_IT_EOS);
		2410
		2411	/* Set ADC state */
		2412	ADC_STATE_CLR_SET(hadc->State,
		2413	HAL_ADC_STATE_REG_BUSY,
		2414	HAL_ADC_STATE_READY);
		2415	}
		2416	else
		2417	{
		2418	/* Change ADC state to error state */
		2419	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
		2420
		2421	/* Set ADC error code to ADC IP internal error */
		2422	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
		2423	}
		2424	}
		2425	}
		2426
		2427	/* Conversion complete callback */
		2428	#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
		2429	hadc->ConvCpltCallback(hadc);
		2430	#else
		2431	HAL_ADC_ConvCpltCallback(hadc);
		2432	#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
		2433	}
		2434	else
		2435	{
		2436	/* Call DMA error callback */
		2437	hadc->DMA_Handle->XferErrorCallback(hdma);
		2438	}
		2439
		2440	}
		2441
		2442	/**
		2443	* @brief DMA half transfer complete callback.
		2444	* @param hdma pointer to DMA handle.
		2445	* @retval None
		2446	*/
		2447	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
		2448	{
		2449	/* Retrieve ADC handle corresponding to current DMA handle */
		2450	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
		2451
		2452	/* Half conversion callback */
		2453	#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
		2454	hadc->ConvHalfCpltCallback(hadc);
		2455	#else
		2456	HAL_ADC_ConvHalfCpltCallback(hadc);
		2457	#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
		2458	}
		2459
		2460	/**
		2461	* @brief DMA error callback
		2462	* @param hdma pointer to DMA handle.
		2463	* @retval None
		2464	*/
		2465	static void ADC_DMAError(DMA_HandleTypeDef *hdma)
		2466	{
		2467	/* Retrieve ADC handle corresponding to current DMA handle */
		2468	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
		2469
		2470	/* Set ADC state */
		2471	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
		2472
		2473	/* Set ADC error code to DMA error */
		2474	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
		2475
		2476	/* Error callback */
		2477	#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
		2478	hadc->ErrorCallback(hadc);
		2479	#else
		2480	HAL_ADC_ErrorCallback(hadc);
		2481	#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
		2482	}
		2483
		2484	/**
		2485	* @}
		2486	*/
		2487
		2488	#endif /* HAL_ADC_MODULE_ENABLED */
		2489	/**
		2490	* @}
		2491	*/
		2492
		2493	/**
		2494	* @}
		2495	*/
		2496
		2497	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

Subversion Repositories FuelGauge

(root)/trunk/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c – Rev 6