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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f0xx_ll_iwdg.h |
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4 | * @author MCD Application Team |
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5 | * @brief Header file of IWDG LL module. |
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6 | ****************************************************************************** |
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7 | * @attention |
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8 | * |
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9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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10 | * All rights reserved.</center></h2> |
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11 | * |
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12 | * This software component is licensed by ST under BSD 3-Clause license, |
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13 | * the "License"; You may not use this file except in compliance with the |
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14 | * License. You may obtain a copy of the License at: |
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15 | * opensource.org/licenses/BSD-3-Clause |
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16 | * |
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17 | ****************************************************************************** |
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18 | */ |
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19 | |||
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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21 | #ifndef STM32F0xx_LL_IWDG_H |
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22 | #define STM32F0xx_LL_IWDG_H |
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23 | |||
24 | #ifdef __cplusplus |
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25 | extern "C" { |
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26 | #endif |
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27 | |||
28 | /* Includes ------------------------------------------------------------------*/ |
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29 | #include "stm32f0xx.h" |
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30 | |||
31 | /** @addtogroup STM32F0xx_LL_Driver |
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32 | * @{ |
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33 | */ |
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34 | |||
35 | #if defined(IWDG) |
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36 | |||
37 | /** @defgroup IWDG_LL IWDG |
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38 | * @{ |
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39 | */ |
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40 | |||
41 | /* Private types -------------------------------------------------------------*/ |
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42 | /* Private variables ---------------------------------------------------------*/ |
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43 | |||
44 | /* Private constants ---------------------------------------------------------*/ |
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45 | /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants |
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46 | * @{ |
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47 | */ |
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48 | #define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ |
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49 | #define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ |
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50 | #define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ |
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51 | #define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ |
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52 | /** |
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53 | * @} |
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54 | */ |
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55 | |||
56 | /* Private macros ------------------------------------------------------------*/ |
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57 | |||
58 | /* Exported types ------------------------------------------------------------*/ |
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59 | /* Exported constants --------------------------------------------------------*/ |
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60 | /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants |
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61 | * @{ |
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62 | */ |
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63 | |||
64 | /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines |
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65 | * @brief Flags defines which can be used with LL_IWDG_ReadReg function |
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66 | * @{ |
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67 | */ |
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68 | #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */ |
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69 | #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */ |
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70 | #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */ |
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71 | /** |
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72 | * @} |
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73 | */ |
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74 | |||
75 | /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider |
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76 | * @{ |
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77 | */ |
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78 | #define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */ |
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79 | #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */ |
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80 | #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */ |
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81 | #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */ |
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82 | #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */ |
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83 | #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */ |
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84 | #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */ |
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85 | /** |
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86 | * @} |
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87 | */ |
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88 | |||
89 | /** |
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90 | * @} |
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91 | */ |
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92 | |||
93 | /* Exported macro ------------------------------------------------------------*/ |
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94 | /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros |
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95 | * @{ |
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96 | */ |
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97 | |||
98 | /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros |
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99 | * @{ |
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100 | */ |
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101 | |||
102 | /** |
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103 | * @brief Write a value in IWDG register |
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104 | * @param __INSTANCE__ IWDG Instance |
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105 | * @param __REG__ Register to be written |
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106 | * @param __VALUE__ Value to be written in the register |
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107 | * @retval None |
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108 | */ |
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109 | #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
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110 | |||
111 | /** |
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112 | * @brief Read a value in IWDG register |
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113 | * @param __INSTANCE__ IWDG Instance |
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114 | * @param __REG__ Register to be read |
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115 | * @retval Register value |
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116 | */ |
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117 | #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
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118 | /** |
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119 | * @} |
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120 | */ |
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121 | |||
122 | /** |
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123 | * @} |
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124 | */ |
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125 | |||
126 | |||
127 | /* Exported functions --------------------------------------------------------*/ |
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128 | /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions |
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129 | * @{ |
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130 | */ |
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131 | /** @defgroup IWDG_LL_EF_Configuration Configuration |
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132 | * @{ |
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133 | */ |
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134 | |||
135 | /** |
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136 | * @brief Start the Independent Watchdog |
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137 | * @note Except if the hardware watchdog option is selected |
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138 | * @rmtoll KR KEY LL_IWDG_Enable |
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139 | * @param IWDGx IWDG Instance |
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140 | * @retval None |
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141 | */ |
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142 | __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx) |
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143 | { |
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144 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE); |
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145 | } |
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146 | |||
147 | /** |
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148 | * @brief Reloads IWDG counter with value defined in the reload register |
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149 | * @rmtoll KR KEY LL_IWDG_ReloadCounter |
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150 | * @param IWDGx IWDG Instance |
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151 | * @retval None |
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152 | */ |
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153 | __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx) |
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154 | { |
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155 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD); |
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156 | } |
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157 | |||
158 | /** |
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159 | * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers |
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160 | * @rmtoll KR KEY LL_IWDG_EnableWriteAccess |
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161 | * @param IWDGx IWDG Instance |
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162 | * @retval None |
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163 | */ |
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164 | __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx) |
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165 | { |
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166 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE); |
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167 | } |
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168 | |||
169 | /** |
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170 | * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers |
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171 | * @rmtoll KR KEY LL_IWDG_DisableWriteAccess |
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172 | * @param IWDGx IWDG Instance |
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173 | * @retval None |
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174 | */ |
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175 | __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx) |
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176 | { |
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177 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE); |
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178 | } |
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179 | |||
180 | /** |
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181 | * @brief Select the prescaler of the IWDG |
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182 | * @rmtoll PR PR LL_IWDG_SetPrescaler |
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183 | * @param IWDGx IWDG Instance |
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184 | * @param Prescaler This parameter can be one of the following values: |
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185 | * @arg @ref LL_IWDG_PRESCALER_4 |
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186 | * @arg @ref LL_IWDG_PRESCALER_8 |
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187 | * @arg @ref LL_IWDG_PRESCALER_16 |
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188 | * @arg @ref LL_IWDG_PRESCALER_32 |
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189 | * @arg @ref LL_IWDG_PRESCALER_64 |
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190 | * @arg @ref LL_IWDG_PRESCALER_128 |
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191 | * @arg @ref LL_IWDG_PRESCALER_256 |
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192 | * @retval None |
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193 | */ |
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194 | __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler) |
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195 | { |
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196 | WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler); |
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197 | } |
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198 | |||
199 | /** |
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200 | * @brief Get the selected prescaler of the IWDG |
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201 | * @rmtoll PR PR LL_IWDG_GetPrescaler |
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202 | * @param IWDGx IWDG Instance |
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203 | * @retval Returned value can be one of the following values: |
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204 | * @arg @ref LL_IWDG_PRESCALER_4 |
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205 | * @arg @ref LL_IWDG_PRESCALER_8 |
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206 | * @arg @ref LL_IWDG_PRESCALER_16 |
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207 | * @arg @ref LL_IWDG_PRESCALER_32 |
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208 | * @arg @ref LL_IWDG_PRESCALER_64 |
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209 | * @arg @ref LL_IWDG_PRESCALER_128 |
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210 | * @arg @ref LL_IWDG_PRESCALER_256 |
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211 | */ |
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212 | __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) |
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213 | { |
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214 | return (READ_REG(IWDGx->PR)); |
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215 | } |
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216 | |||
217 | /** |
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218 | * @brief Specify the IWDG down-counter reload value |
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219 | * @rmtoll RLR RL LL_IWDG_SetReloadCounter |
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220 | * @param IWDGx IWDG Instance |
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221 | * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF |
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222 | * @retval None |
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223 | */ |
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224 | __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter) |
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225 | { |
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226 | WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter); |
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227 | } |
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228 | |||
229 | /** |
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230 | * @brief Get the specified IWDG down-counter reload value |
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231 | * @rmtoll RLR RL LL_IWDG_GetReloadCounter |
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232 | * @param IWDGx IWDG Instance |
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233 | * @retval Value between Min_Data=0 and Max_Data=0x0FFF |
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234 | */ |
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235 | __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) |
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236 | { |
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237 | return (READ_REG(IWDGx->RLR)); |
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238 | } |
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239 | |||
240 | /** |
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241 | * @brief Specify high limit of the window value to be compared to the down-counter. |
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242 | * @rmtoll WINR WIN LL_IWDG_SetWindow |
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243 | * @param IWDGx IWDG Instance |
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244 | * @param Window Value between Min_Data=0 and Max_Data=0x0FFF |
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245 | * @retval None |
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246 | */ |
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247 | __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window) |
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248 | { |
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249 | WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window); |
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250 | } |
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251 | |||
252 | /** |
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253 | * @brief Get the high limit of the window value specified. |
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254 | * @rmtoll WINR WIN LL_IWDG_GetWindow |
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255 | * @param IWDGx IWDG Instance |
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256 | * @retval Value between Min_Data=0 and Max_Data=0x0FFF |
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257 | */ |
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258 | __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) |
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259 | { |
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260 | return (READ_REG(IWDGx->WINR)); |
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261 | } |
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262 | |||
263 | /** |
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264 | * @} |
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265 | */ |
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266 | |||
267 | /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management |
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268 | * @{ |
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269 | */ |
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270 | |||
271 | /** |
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272 | * @brief Check if flag Prescaler Value Update is set or not |
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273 | * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU |
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274 | * @param IWDGx IWDG Instance |
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275 | * @retval State of bit (1 or 0). |
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276 | */ |
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277 | __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) |
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278 | { |
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279 | return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); |
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280 | } |
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281 | |||
282 | /** |
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283 | * @brief Check if flag Reload Value Update is set or not |
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284 | * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU |
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285 | * @param IWDGx IWDG Instance |
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286 | * @retval State of bit (1 or 0). |
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287 | */ |
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288 | __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) |
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289 | { |
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290 | return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); |
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291 | } |
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292 | |||
293 | /** |
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294 | * @brief Check if flag Window Value Update is set or not |
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295 | * @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU |
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296 | * @param IWDGx IWDG Instance |
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297 | * @retval State of bit (1 or 0). |
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298 | */ |
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299 | __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) |
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300 | { |
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301 | return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); |
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302 | } |
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303 | |||
304 | /** |
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305 | * @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not |
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306 | * @rmtoll SR PVU LL_IWDG_IsReady\n |
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307 | * SR RVU LL_IWDG_IsReady\n |
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308 | * SR WVU LL_IWDG_IsReady |
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309 | * @param IWDGx IWDG Instance |
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310 | * @retval State of bits (1 or 0). |
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311 | */ |
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312 | __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) |
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313 | { |
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314 | return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); |
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315 | } |
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316 | |||
317 | /** |
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318 | * @} |
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319 | */ |
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320 | |||
321 | /** |
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322 | * @} |
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323 | */ |
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324 | |||
325 | /** |
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326 | * @} |
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327 | */ |
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328 | |||
329 | #endif /* IWDG */ |
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330 | |||
331 | /** |
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332 | * @} |
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333 | */ |
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334 | |||
335 | #ifdef __cplusplus |
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336 | } |
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337 | #endif |
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338 | |||
339 | #endif /* STM32F0xx_LL_IWDG_H */ |
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340 | |||
341 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |