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| Rev | Author | Line No. | Line |
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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f0xx_hal_uart.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of UART HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 10 | * All rights reserved.</center></h2> |
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| 11 | * |
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| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | |||
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 21 | #ifndef STM32F0xx_HAL_UART_H |
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| 22 | #define STM32F0xx_HAL_UART_H |
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| 23 | |||
| 24 | #ifdef __cplusplus |
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| 25 | extern "C" { |
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| 26 | #endif |
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| 27 | |||
| 28 | /* Includes ------------------------------------------------------------------*/ |
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| 29 | #include "stm32f0xx_hal_def.h" |
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| 30 | |||
| 31 | /** @addtogroup STM32F0xx_HAL_Driver |
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| 32 | * @{ |
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| 33 | */ |
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| 34 | |||
| 35 | /** @addtogroup UART |
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| 36 | * @{ |
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| 37 | */ |
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| 38 | |||
| 39 | /* Exported types ------------------------------------------------------------*/ |
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| 40 | /** @defgroup UART_Exported_Types UART Exported Types |
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| 41 | * @{ |
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| 42 | */ |
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| 43 | |||
| 44 | /** |
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| 45 | * @brief UART Init Structure definition |
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| 46 | */ |
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| 47 | typedef struct |
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| 48 | { |
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| 49 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
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| 50 | The baud rate register is computed using the following formula: |
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| 51 | - If oversampling is 16 or in LIN mode, |
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| 52 | Baud Rate Register = ((uart_ker_ck) / ((huart->Init.BaudRate))) |
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| 53 | - If oversampling is 8, |
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| 54 | Baud Rate Register[15:4] = ((2 * uart_ker_ck) / ((huart->Init.BaudRate)))[15:4] |
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| 55 | Baud Rate Register[3] = 0 |
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| 56 | Baud Rate Register[2:0] = (((2 * uart_ker_ck) / ((huart->Init.BaudRate)))[3:0]) >> 1 |
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| 57 | where uart_ker_ck is the UART input clock */ |
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| 58 | |||
| 59 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
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| 60 | This parameter can be a value of @ref UARTEx_Word_Length. */ |
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| 61 | |||
| 62 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
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| 63 | This parameter can be a value of @ref UART_Stop_Bits. */ |
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| 64 | |||
| 65 | uint32_t Parity; /*!< Specifies the parity mode. |
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| 66 | This parameter can be a value of @ref UART_Parity |
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| 67 | @note When parity is enabled, the computed parity is inserted |
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| 68 | at the MSB position of the transmitted data (9th bit when |
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| 69 | the word length is set to 9 data bits; 8th bit when the |
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| 70 | word length is set to 8 data bits). */ |
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| 71 | |||
| 72 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
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| 73 | This parameter can be a value of @ref UART_Mode. */ |
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| 74 | |||
| 75 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled |
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| 76 | or disabled. |
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| 77 | This parameter can be a value of @ref UART_Hardware_Flow_Control. */ |
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| 78 | |||
| 79 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). |
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| 80 | This parameter can be a value of @ref UART_Over_Sampling. */ |
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| 81 | |||
| 82 | uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. |
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| 83 | Selecting the single sample method increases the receiver tolerance to clock |
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| 84 | deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ |
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| 85 | |||
| 86 | |||
| 87 | } UART_InitTypeDef; |
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| 88 | |||
| 89 | /** |
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| 90 | * @brief UART Advanced Features initialization structure definition |
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| 91 | */ |
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| 92 | typedef struct |
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| 93 | { |
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| 94 | uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several |
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| 95 | Advanced Features may be initialized at the same time . |
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| 96 | This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ |
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| 97 | |||
| 98 | uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. |
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| 99 | This parameter can be a value of @ref UART_Tx_Inv. */ |
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| 100 | |||
| 101 | uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. |
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| 102 | This parameter can be a value of @ref UART_Rx_Inv. */ |
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| 103 | |||
| 104 | uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic |
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| 105 | vs negative/inverted logic). |
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| 106 | This parameter can be a value of @ref UART_Data_Inv. */ |
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| 107 | |||
| 108 | uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. |
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| 109 | This parameter can be a value of @ref UART_Rx_Tx_Swap. */ |
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| 110 | |||
| 111 | uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. |
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| 112 | This parameter can be a value of @ref UART_Overrun_Disable. */ |
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| 113 | |||
| 114 | uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. |
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| 115 | This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ |
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| 116 | |||
| 117 | uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. |
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| 118 | This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ |
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| 119 | |||
| 120 | uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate |
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| 121 | detection is carried out. |
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| 122 | This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ |
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| 123 | |||
| 124 | uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. |
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| 125 | This parameter can be a value of @ref UART_MSB_First. */ |
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| 126 | } UART_AdvFeatureInitTypeDef; |
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| 127 | |||
| 128 | /** |
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| 129 | * @brief HAL UART State definition |
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| 130 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition). |
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| 131 | * - gState contains UART state information related to global Handle management |
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| 132 | * and also information related to Tx operations. |
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| 133 | * gState value coding follow below described bitmap : |
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| 134 | * b7-b6 Error information |
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| 135 | * 00 : No Error |
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| 136 | * 01 : (Not Used) |
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| 137 | * 10 : Timeout |
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| 138 | * 11 : Error |
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| 139 | * b5 Peripheral initialization status |
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| 140 | * 0 : Reset (Peripheral not initialized) |
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| 141 | * 1 : Init done (Peripheral not initialized. HAL UART Init function already called) |
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| 142 | * b4-b3 (not used) |
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| 143 | * xx : Should be set to 00 |
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| 144 | * b2 Intrinsic process state |
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| 145 | * 0 : Ready |
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| 146 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
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| 147 | * b1 (not used) |
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| 148 | * x : Should be set to 0 |
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| 149 | * b0 Tx state |
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| 150 | * 0 : Ready (no Tx operation ongoing) |
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| 151 | * 1 : Busy (Tx operation ongoing) |
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| 152 | * - RxState contains information related to Rx operations. |
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| 153 | * RxState value coding follow below described bitmap : |
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| 154 | * b7-b6 (not used) |
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| 155 | * xx : Should be set to 00 |
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| 156 | * b5 Peripheral initialization status |
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| 157 | * 0 : Reset (Peripheral not initialized) |
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| 158 | * 1 : Init done (Peripheral not initialized) |
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| 159 | * b4-b2 (not used) |
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| 160 | * xxx : Should be set to 000 |
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| 161 | * b1 Rx state |
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| 162 | * 0 : Ready (no Rx operation ongoing) |
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| 163 | * 1 : Busy (Rx operation ongoing) |
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| 164 | * b0 (not used) |
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| 165 | * x : Should be set to 0. |
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| 166 | */ |
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| 167 | typedef uint32_t HAL_UART_StateTypeDef; |
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| 168 | |||
| 169 | /** |
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| 170 | * @brief UART clock sources definition |
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| 171 | */ |
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| 172 | typedef enum |
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| 173 | { |
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| 174 | UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ |
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| 175 | UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ |
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| 176 | UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ |
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| 177 | UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ |
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| 178 | UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ |
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| 179 | } UART_ClockSourceTypeDef; |
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| 180 | |||
| 181 | /** |
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| 182 | * @brief UART handle Structure definition |
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| 183 | */ |
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| 184 | typedef struct __UART_HandleTypeDef |
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| 185 | { |
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| 186 | USART_TypeDef *Instance; /*!< UART registers base address */ |
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| 187 | |||
| 188 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
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| 189 | |||
| 190 | UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ |
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| 191 | |||
| 192 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
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| 193 | |||
| 194 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
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| 195 | |||
| 196 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
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| 197 | |||
| 198 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
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| 199 | |||
| 200 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
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| 201 | |||
| 202 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
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| 203 | |||
| 204 | uint16_t Mask; /*!< UART Rx RDR register mask */ |
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| 205 | |||
| 206 | void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ |
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| 207 | |||
| 208 | void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ |
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| 209 | |||
| 210 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
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| 211 | |||
| 212 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
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| 213 | |||
| 214 | HAL_LockTypeDef Lock; /*!< Locking object */ |
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| 215 | |||
| 216 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
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| 217 | and also related to Tx operations. |
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| 218 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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| 219 | |||
| 220 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
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| 221 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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| 222 | |||
| 223 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
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| 224 | |||
| 225 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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| 226 | void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ |
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| 227 | void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ |
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| 228 | void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ |
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| 229 | void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ |
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| 230 | void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ |
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| 231 | void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ |
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| 232 | void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ |
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| 233 | void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ |
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| 234 | void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ |
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| 235 | |||
| 236 | void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ |
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| 237 | void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ |
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| 238 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 239 | |||
| 240 | } UART_HandleTypeDef; |
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| 241 | |||
| 242 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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| 243 | /** |
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| 244 | * @brief HAL UART Callback ID enumeration definition |
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| 245 | */ |
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| 246 | typedef enum |
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| 247 | { |
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| 248 | HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ |
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| 249 | HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ |
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| 250 | HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ |
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| 251 | HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ |
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| 252 | HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ |
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| 253 | HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ |
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| 254 | HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ |
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| 255 | HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ |
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| 256 | HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ |
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| 257 | |||
| 258 | HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ |
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| 259 | HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ |
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| 260 | |||
| 261 | } HAL_UART_CallbackIDTypeDef; |
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| 262 | |||
| 263 | /** |
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| 264 | * @brief HAL UART Callback pointer definition |
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| 265 | */ |
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| 266 | typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ |
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| 267 | |||
| 268 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 269 | |||
| 270 | /** |
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| 271 | * @} |
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| 272 | */ |
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| 273 | |||
| 274 | /* Exported constants --------------------------------------------------------*/ |
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| 275 | /** @defgroup UART_Exported_Constants UART Exported Constants |
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| 276 | * @{ |
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| 277 | */ |
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| 278 | |||
| 279 | /** @defgroup UART_State_Definition UART State Code Definition |
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| 280 | * @{ |
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| 281 | */ |
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| 282 | #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized |
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| 283 | Value is allowed for gState and RxState */ |
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| 284 | #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use |
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| 285 | Value is allowed for gState and RxState */ |
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| 286 | #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing |
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| 287 | Value is allowed for gState only */ |
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| 288 | #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing |
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| 289 | Value is allowed for gState only */ |
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| 290 | #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing |
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| 291 | Value is allowed for RxState only */ |
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| 292 | #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing |
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| 293 | Not to be used for neither gState nor RxState. |
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| 294 | Value is result of combination (Or) between gState and RxState values */ |
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| 295 | #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state |
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| 296 | Value is allowed for gState only */ |
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| 297 | #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error |
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| 298 | Value is allowed for gState only */ |
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| 299 | /** |
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| 300 | * @} |
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| 301 | */ |
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| 302 | |||
| 303 | /** @defgroup UART_Error_Definition UART Error Definition |
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| 304 | * @{ |
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| 305 | */ |
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| 306 | #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ |
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| 307 | #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ |
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| 308 | #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ |
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| 309 | #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ |
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| 310 | #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ |
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| 311 | #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ |
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| 312 | #define HAL_UART_ERROR_RTO ((uint32_t)0x00000020U) /*!< Receiver Timeout error */ |
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| 313 | |||
| 314 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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| 315 | #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */ |
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| 316 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 317 | /** |
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| 318 | * @} |
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| 319 | */ |
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| 320 | |||
| 321 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
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| 322 | * @{ |
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| 323 | */ |
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| 324 | #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ |
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| 325 | #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ |
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| 326 | #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ |
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| 327 | #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ |
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| 328 | /** |
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| 329 | * @} |
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| 330 | */ |
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| 331 | |||
| 332 | /** @defgroup UART_Parity UART Parity |
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| 333 | * @{ |
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| 334 | */ |
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| 335 | #define UART_PARITY_NONE 0x00000000U /*!< No parity */ |
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| 336 | #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ |
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| 337 | #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ |
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| 338 | /** |
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| 339 | * @} |
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| 340 | */ |
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| 341 | |||
| 342 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
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| 343 | * @{ |
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| 344 | */ |
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| 345 | #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ |
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| 346 | #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ |
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| 347 | #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ |
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| 348 | #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ |
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| 349 | /** |
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| 350 | * @} |
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| 351 | */ |
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| 352 | |||
| 353 | /** @defgroup UART_Mode UART Transfer Mode |
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| 354 | * @{ |
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| 355 | */ |
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| 356 | #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ |
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| 357 | #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ |
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| 358 | #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ |
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| 359 | /** |
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| 360 | * @} |
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| 361 | */ |
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| 362 | |||
| 363 | /** @defgroup UART_State UART State |
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| 364 | * @{ |
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| 365 | */ |
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| 366 | #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ |
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| 367 | #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ |
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| 368 | /** |
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| 369 | * @} |
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| 370 | */ |
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| 371 | |||
| 372 | /** @defgroup UART_Over_Sampling UART Over Sampling |
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| 373 | * @{ |
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| 374 | */ |
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| 375 | #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ |
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| 376 | #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ |
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| 377 | /** |
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| 378 | * @} |
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| 379 | */ |
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| 380 | |||
| 381 | /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method |
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| 382 | * @{ |
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| 383 | */ |
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| 384 | #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ |
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| 385 | #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ |
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| 386 | /** |
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| 387 | * @} |
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| 388 | */ |
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| 389 | |||
| 390 | /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode |
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| 391 | * @{ |
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| 392 | */ |
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| 393 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ |
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| 394 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ |
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| 395 | #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ |
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| 396 | #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ |
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| 397 | /** |
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| 398 | * @} |
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| 399 | */ |
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| 400 | |||
| 401 | /** @defgroup UART_Receiver_Timeout UART Receiver Timeout |
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| 402 | * @{ |
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| 403 | */ |
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| 404 | #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ |
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| 405 | #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ |
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| 406 | /** |
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| 407 | * @} |
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| 408 | */ |
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| 409 | |||
| 410 | /** @defgroup UART_LIN UART Local Interconnection Network mode |
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| 411 | * @{ |
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| 412 | */ |
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| 413 | #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ |
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| 414 | #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ |
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| 415 | /** |
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| 416 | * @} |
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| 417 | */ |
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| 418 | |||
| 419 | /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection |
||
| 420 | * @{ |
||
| 421 | */ |
||
| 422 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ |
||
| 423 | #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ |
||
| 424 | /** |
||
| 425 | * @} |
||
| 426 | */ |
||
| 427 | |||
| 428 | /** @defgroup UART_DMA_Tx UART DMA Tx |
||
| 429 | * @{ |
||
| 430 | */ |
||
| 431 | #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ |
||
| 432 | #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ |
||
| 433 | /** |
||
| 434 | * @} |
||
| 435 | */ |
||
| 436 | |||
| 437 | /** @defgroup UART_DMA_Rx UART DMA Rx |
||
| 438 | * @{ |
||
| 439 | */ |
||
| 440 | #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ |
||
| 441 | #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ |
||
| 442 | /** |
||
| 443 | * @} |
||
| 444 | */ |
||
| 445 | |||
| 446 | /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection |
||
| 447 | * @{ |
||
| 448 | */ |
||
| 449 | #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ |
||
| 450 | #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ |
||
| 451 | /** |
||
| 452 | * @} |
||
| 453 | */ |
||
| 454 | |||
| 455 | /** @defgroup UART_WakeUp_Methods UART WakeUp Methods |
||
| 456 | * @{ |
||
| 457 | */ |
||
| 458 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ |
||
| 459 | #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ |
||
| 460 | /** |
||
| 461 | * @} |
||
| 462 | */ |
||
| 463 | |||
| 464 | /** @defgroup UART_Request_Parameters UART Request Parameters |
||
| 465 | * @{ |
||
| 466 | */ |
||
| 467 | #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ |
||
| 468 | #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ |
||
| 469 | #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ |
||
| 470 | #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ |
||
| 471 | #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ |
||
| 472 | /** |
||
| 473 | * @} |
||
| 474 | */ |
||
| 475 | |||
| 476 | /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type |
||
| 477 | * @{ |
||
| 478 | */ |
||
| 479 | #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ |
||
| 480 | #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ |
||
| 481 | #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ |
||
| 482 | #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ |
||
| 483 | #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ |
||
| 484 | #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ |
||
| 485 | #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ |
||
| 486 | #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ |
||
| 487 | #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ |
||
| 488 | /** |
||
| 489 | * @} |
||
| 490 | */ |
||
| 491 | |||
| 492 | /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion |
||
| 493 | * @{ |
||
| 494 | */ |
||
| 495 | #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ |
||
| 496 | #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ |
||
| 497 | /** |
||
| 498 | * @} |
||
| 499 | */ |
||
| 500 | |||
| 501 | /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion |
||
| 502 | * @{ |
||
| 503 | */ |
||
| 504 | #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ |
||
| 505 | #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ |
||
| 506 | /** |
||
| 507 | * @} |
||
| 508 | */ |
||
| 509 | |||
| 510 | /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion |
||
| 511 | * @{ |
||
| 512 | */ |
||
| 513 | #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ |
||
| 514 | #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ |
||
| 515 | /** |
||
| 516 | * @} |
||
| 517 | */ |
||
| 518 | |||
| 519 | /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap |
||
| 520 | * @{ |
||
| 521 | */ |
||
| 522 | #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ |
||
| 523 | #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ |
||
| 524 | /** |
||
| 525 | * @} |
||
| 526 | */ |
||
| 527 | |||
| 528 | /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable |
||
| 529 | * @{ |
||
| 530 | */ |
||
| 531 | #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ |
||
| 532 | #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ |
||
| 533 | /** |
||
| 534 | * @} |
||
| 535 | */ |
||
| 536 | |||
| 537 | /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable |
||
| 538 | * @{ |
||
| 539 | */ |
||
| 540 | #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ |
||
| 541 | #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ |
||
| 542 | /** |
||
| 543 | * @} |
||
| 544 | */ |
||
| 545 | |||
| 546 | /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error |
||
| 547 | * @{ |
||
| 548 | */ |
||
| 549 | #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ |
||
| 550 | #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ |
||
| 551 | /** |
||
| 552 | * @} |
||
| 553 | */ |
||
| 554 | |||
| 555 | /** @defgroup UART_MSB_First UART Advanced Feature MSB First |
||
| 556 | * @{ |
||
| 557 | */ |
||
| 558 | #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ |
||
| 559 | #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ |
||
| 560 | /** |
||
| 561 | * @} |
||
| 562 | */ |
||
| 563 | #if defined(USART_CR1_UESM) |
||
| 564 | |||
| 565 | /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable |
||
| 566 | * @{ |
||
| 567 | */ |
||
| 568 | #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ |
||
| 569 | #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ |
||
| 570 | /** |
||
| 571 | * @} |
||
| 572 | */ |
||
| 573 | #endif /* USART_CR1_UESM */ |
||
| 574 | |||
| 575 | /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable |
||
| 576 | * @{ |
||
| 577 | */ |
||
| 578 | #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ |
||
| 579 | #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ |
||
| 580 | /** |
||
| 581 | * @} |
||
| 582 | */ |
||
| 583 | |||
| 584 | /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register |
||
| 585 | * @{ |
||
| 586 | */ |
||
| 587 | #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ |
||
| 588 | /** |
||
| 589 | * @} |
||
| 590 | */ |
||
| 591 | #if defined(USART_CR1_UESM) |
||
| 592 | |||
| 593 | /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection |
||
| 594 | * @{ |
||
| 595 | */ |
||
| 596 | #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ |
||
| 597 | #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ |
||
| 598 | #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ |
||
| 599 | /** |
||
| 600 | * @} |
||
| 601 | */ |
||
| 602 | #endif /* USART_CR1_UESM */ |
||
| 603 | |||
| 604 | /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity |
||
| 605 | * @{ |
||
| 606 | */ |
||
| 607 | #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ |
||
| 608 | #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ |
||
| 609 | /** |
||
| 610 | * @} |
||
| 611 | */ |
||
| 612 | |||
| 613 | /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register |
||
| 614 | * @{ |
||
| 615 | */ |
||
| 616 | #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ |
||
| 617 | /** |
||
| 618 | * @} |
||
| 619 | */ |
||
| 620 | |||
| 621 | /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register |
||
| 622 | * @{ |
||
| 623 | */ |
||
| 624 | #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ |
||
| 625 | /** |
||
| 626 | * @} |
||
| 627 | */ |
||
| 628 | |||
| 629 | /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask |
||
| 630 | * @{ |
||
| 631 | */ |
||
| 632 | #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ |
||
| 633 | /** |
||
| 634 | * @} |
||
| 635 | */ |
||
| 636 | |||
| 637 | /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value |
||
| 638 | * @{ |
||
| 639 | */ |
||
| 640 | #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ |
||
| 641 | /** |
||
| 642 | * @} |
||
| 643 | */ |
||
| 644 | |||
| 645 | /** @defgroup UART_Flags UART Status Flags |
||
| 646 | * Elements values convention: 0xXXXX |
||
| 647 | * - 0xXXXX : Flag mask in the ISR register |
||
| 648 | * @{ |
||
| 649 | */ |
||
| 650 | #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ |
||
| 651 | #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ |
||
| 652 | #if defined(USART_CR1_UESM) |
||
| 653 | #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ |
||
| 654 | #endif /* USART_CR1_UESM */ |
||
| 655 | #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ |
||
| 656 | #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ |
||
| 657 | #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ |
||
| 658 | #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ |
||
| 659 | #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ |
||
| 660 | #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ |
||
| 661 | #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ |
||
| 662 | #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ |
||
| 663 | #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ |
||
| 664 | #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ |
||
| 665 | #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ |
||
| 666 | #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ |
||
| 667 | #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ |
||
| 668 | #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ |
||
| 669 | #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ |
||
| 670 | #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ |
||
| 671 | #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ |
||
| 672 | #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ |
||
| 673 | /** |
||
| 674 | * @} |
||
| 675 | */ |
||
| 676 | |||
| 677 | /** @defgroup UART_Interrupt_definition UART Interrupts Definition |
||
| 678 | * Elements values convention: 000ZZZZZ0XXYYYYYb |
||
| 679 | * - YYYYY : Interrupt source position in the XX register (5bits) |
||
| 680 | * - XX : Interrupt source register (2bits) |
||
| 681 | * - 01: CR1 register |
||
| 682 | * - 10: CR2 register |
||
| 683 | * - 11: CR3 register |
||
| 684 | * - ZZZZZ : Flag position in the ISR register(5bits) |
||
| 685 | * Elements values convention: 000000000XXYYYYYb |
||
| 686 | * - YYYYY : Interrupt source position in the XX register (5bits) |
||
| 687 | * - XX : Interrupt source register (2bits) |
||
| 688 | * - 01: CR1 register |
||
| 689 | * - 10: CR2 register |
||
| 690 | * - 11: CR3 register |
||
| 691 | * Elements values convention: 0000ZZZZ00000000b |
||
| 692 | * - ZZZZ : Flag position in the ISR register(4bits) |
||
| 693 | * @{ |
||
| 694 | */ |
||
| 695 | #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ |
||
| 696 | #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ |
||
| 697 | #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ |
||
| 698 | #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ |
||
| 699 | #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ |
||
| 700 | #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ |
||
| 701 | #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ |
||
| 702 | #define UART_IT_CM 0x112EU /*!< UART character match interruption */ |
||
| 703 | #if defined(USART_CR1_UESM) |
||
| 704 | #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ |
||
| 705 | #endif /* USART_CR1_UESM */ |
||
| 706 | #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ |
||
| 707 | |||
| 708 | #define UART_IT_ERR 0x0060U /*!< UART error interruption */ |
||
| 709 | |||
| 710 | #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ |
||
| 711 | #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ |
||
| 712 | #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ |
||
| 713 | /** |
||
| 714 | * @} |
||
| 715 | */ |
||
| 716 | |||
| 717 | /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags |
||
| 718 | * @{ |
||
| 719 | */ |
||
| 720 | #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
||
| 721 | #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
||
| 722 | #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise Error detected Clear Flag */ |
||
| 723 | #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ |
||
| 724 | #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
||
| 725 | #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
||
| 726 | #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ |
||
| 727 | #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ |
||
| 728 | #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ |
||
| 729 | #if defined(USART_CR1_UESM) |
||
| 730 | #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ |
||
| 731 | #endif /* USART_CR1_UESM */ |
||
| 732 | #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ |
||
| 733 | /** |
||
| 734 | * @} |
||
| 735 | */ |
||
| 736 | |||
| 737 | |||
| 738 | /** |
||
| 739 | * @} |
||
| 740 | */ |
||
| 741 | |||
| 742 | /* Exported macros -----------------------------------------------------------*/ |
||
| 743 | /** @defgroup UART_Exported_Macros UART Exported Macros |
||
| 744 | * @{ |
||
| 745 | */ |
||
| 746 | |||
| 747 | /** @brief Reset UART handle states. |
||
| 748 | * @param __HANDLE__ UART handle. |
||
| 749 | * @retval None |
||
| 750 | */ |
||
| 751 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
| 752 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
||
| 753 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
||
| 754 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
||
| 755 | (__HANDLE__)->MspInitCallback = NULL; \ |
||
| 756 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
||
| 757 | } while(0U) |
||
| 758 | #else |
||
| 759 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
||
| 760 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
||
| 761 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
||
| 762 | } while(0U) |
||
| 763 | #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ |
||
| 764 | |||
| 765 | /** @brief Flush the UART Data registers. |
||
| 766 | * @param __HANDLE__ specifies the UART Handle. |
||
| 767 | * @retval None |
||
| 768 | */ |
||
| 769 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ |
||
| 770 | do{ \ |
||
| 771 | SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ |
||
| 772 | SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ |
||
| 773 | } while(0U) |
||
| 774 | |||
| 775 | /** @brief Clear the specified UART pending flag. |
||
| 776 | * @param __HANDLE__ specifies the UART Handle. |
||
| 777 | * @param __FLAG__ specifies the flag to check. |
||
| 778 | * This parameter can be any combination of the following values: |
||
| 779 | * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag |
||
| 780 | * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag |
||
| 781 | * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag |
||
| 782 | * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag |
||
| 783 | * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag |
||
| 784 | * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag |
||
| 785 | * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag |
||
| 786 | * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag |
||
| 787 | * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag |
||
| 788 | * @arg @ref UART_CLEAR_CMF Character Match Clear Flag |
||
| 789 | #if defined(USART_CR1_UESM) |
||
| 790 | * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag |
||
| 791 | #endif |
||
| 792 | * @retval None |
||
| 793 | */ |
||
| 794 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
||
| 795 | |||
| 796 | /** @brief Clear the UART PE pending flag. |
||
| 797 | * @param __HANDLE__ specifies the UART Handle. |
||
| 798 | * @retval None |
||
| 799 | */ |
||
| 800 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) |
||
| 801 | |||
| 802 | /** @brief Clear the UART FE pending flag. |
||
| 803 | * @param __HANDLE__ specifies the UART Handle. |
||
| 804 | * @retval None |
||
| 805 | */ |
||
| 806 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) |
||
| 807 | |||
| 808 | /** @brief Clear the UART NE pending flag. |
||
| 809 | * @param __HANDLE__ specifies the UART Handle. |
||
| 810 | * @retval None |
||
| 811 | */ |
||
| 812 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) |
||
| 813 | |||
| 814 | /** @brief Clear the UART ORE pending flag. |
||
| 815 | * @param __HANDLE__ specifies the UART Handle. |
||
| 816 | * @retval None |
||
| 817 | */ |
||
| 818 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) |
||
| 819 | |||
| 820 | /** @brief Clear the UART IDLE pending flag. |
||
| 821 | * @param __HANDLE__ specifies the UART Handle. |
||
| 822 | * @retval None |
||
| 823 | */ |
||
| 824 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) |
||
| 825 | |||
| 826 | |||
| 827 | /** @brief Check whether the specified UART flag is set or not. |
||
| 828 | * @param __HANDLE__ specifies the UART Handle. |
||
| 829 | * @param __FLAG__ specifies the flag to check. |
||
| 830 | * This parameter can be one of the following values: |
||
| 831 | * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag |
||
| 832 | * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag |
||
| 833 | #if defined(USART_CR1_UESM) |
||
| 834 | * @arg @ref UART_FLAG_WUF Wake up from stop mode flag |
||
| 835 | #endif |
||
| 836 | * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) |
||
| 837 | * @arg @ref UART_FLAG_SBKF Send Break flag |
||
| 838 | * @arg @ref UART_FLAG_CMF Character match flag |
||
| 839 | * @arg @ref UART_FLAG_BUSY Busy flag |
||
| 840 | * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag |
||
| 841 | * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag |
||
| 842 | * @arg @ref UART_FLAG_CTS CTS Change flag |
||
| 843 | * @arg @ref UART_FLAG_LBDF LIN Break detection flag |
||
| 844 | * @arg @ref UART_FLAG_TXE Transmit data register empty flag |
||
| 845 | * @arg @ref UART_FLAG_TC Transmission Complete flag |
||
| 846 | * @arg @ref UART_FLAG_RXNE Receive data register not empty flag |
||
| 847 | * @arg @ref UART_FLAG_RTOF Receiver Timeout flag |
||
| 848 | * @arg @ref UART_FLAG_IDLE Idle Line detection flag |
||
| 849 | * @arg @ref UART_FLAG_ORE Overrun Error flag |
||
| 850 | * @arg @ref UART_FLAG_NE Noise Error flag |
||
| 851 | * @arg @ref UART_FLAG_FE Framing Error flag |
||
| 852 | * @arg @ref UART_FLAG_PE Parity Error flag |
||
| 853 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
||
| 854 | */ |
||
| 855 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) |
||
| 856 | |||
| 857 | /** @brief Enable the specified UART interrupt. |
||
| 858 | * @param __HANDLE__ specifies the UART Handle. |
||
| 859 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. |
||
| 860 | * This parameter can be one of the following values: |
||
| 861 | #if defined(USART_CR1_UESM) |
||
| 862 | * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt |
||
| 863 | #endif |
||
| 864 | * @arg @ref UART_IT_CM Character match interrupt |
||
| 865 | * @arg @ref UART_IT_CTS CTS change interrupt |
||
| 866 | * @arg @ref UART_IT_LBD LIN Break detection interrupt |
||
| 867 | * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt |
||
| 868 | * @arg @ref UART_IT_TC Transmission complete interrupt |
||
| 869 | * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt |
||
| 870 | * @arg @ref UART_IT_RTO Receive Timeout interrupt |
||
| 871 | * @arg @ref UART_IT_IDLE Idle line detection interrupt |
||
| 872 | * @arg @ref UART_IT_PE Parity Error interrupt |
||
| 873 | * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) |
||
| 874 | * @retval None |
||
| 875 | */ |
||
| 876 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ |
||
| 877 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ |
||
| 878 | ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) |
||
| 879 | |||
| 880 | |||
| 881 | /** @brief Disable the specified UART interrupt. |
||
| 882 | * @param __HANDLE__ specifies the UART Handle. |
||
| 883 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. |
||
| 884 | * This parameter can be one of the following values: |
||
| 885 | #if defined(USART_CR1_UESM) |
||
| 886 | * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt |
||
| 887 | #endif |
||
| 888 | * @arg @ref UART_IT_CM Character match interrupt |
||
| 889 | * @arg @ref UART_IT_CTS CTS change interrupt |
||
| 890 | * @arg @ref UART_IT_LBD LIN Break detection interrupt |
||
| 891 | * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt |
||
| 892 | * @arg @ref UART_IT_TC Transmission complete interrupt |
||
| 893 | * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt |
||
| 894 | * @arg @ref UART_IT_RTO Receive Timeout interrupt |
||
| 895 | * @arg @ref UART_IT_IDLE Idle line detection interrupt |
||
| 896 | * @arg @ref UART_IT_PE Parity Error interrupt |
||
| 897 | * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) |
||
| 898 | * @retval None |
||
| 899 | */ |
||
| 900 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ |
||
| 901 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ |
||
| 902 | ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) |
||
| 903 | |||
| 904 | /** @brief Check whether the specified UART interrupt has occurred or not. |
||
| 905 | * @param __HANDLE__ specifies the UART Handle. |
||
| 906 | * @param __INTERRUPT__ specifies the UART interrupt to check. |
||
| 907 | * This parameter can be one of the following values: |
||
| 908 | #if defined(USART_CR1_UESM) |
||
| 909 | * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt |
||
| 910 | #endif |
||
| 911 | * @arg @ref UART_IT_CM Character match interrupt |
||
| 912 | * @arg @ref UART_IT_CTS CTS change interrupt |
||
| 913 | * @arg @ref UART_IT_LBD LIN Break detection interrupt |
||
| 914 | * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt |
||
| 915 | * @arg @ref UART_IT_TC Transmission complete interrupt |
||
| 916 | * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt |
||
| 917 | * @arg @ref UART_IT_RTO Receive Timeout interrupt |
||
| 918 | * @arg @ref UART_IT_IDLE Idle line detection interrupt |
||
| 919 | * @arg @ref UART_IT_PE Parity Error interrupt |
||
| 920 | * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) |
||
| 921 | * @retval The new state of __INTERRUPT__ (SET or RESET). |
||
| 922 | */ |
||
| 923 | #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ |
||
| 924 | & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) |
||
| 925 | |||
| 926 | /** @brief Check whether the specified UART interrupt source is enabled or not. |
||
| 927 | * @param __HANDLE__ specifies the UART Handle. |
||
| 928 | * @param __INTERRUPT__ specifies the UART interrupt source to check. |
||
| 929 | * This parameter can be one of the following values: |
||
| 930 | #if defined(USART_CR1_UESM) |
||
| 931 | * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt |
||
| 932 | #endif |
||
| 933 | * @arg @ref UART_IT_CM Character match interrupt |
||
| 934 | * @arg @ref UART_IT_CTS CTS change interrupt |
||
| 935 | * @arg @ref UART_IT_LBD LIN Break detection interrupt |
||
| 936 | * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt |
||
| 937 | * @arg @ref UART_IT_TC Transmission complete interrupt |
||
| 938 | * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt |
||
| 939 | * @arg @ref UART_IT_RTO Receive Timeout interrupt |
||
| 940 | * @arg @ref UART_IT_IDLE Idle line detection interrupt |
||
| 941 | * @arg @ref UART_IT_PE Parity Error interrupt |
||
| 942 | * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) |
||
| 943 | * @retval The new state of __INTERRUPT__ (SET or RESET). |
||
| 944 | */ |
||
| 945 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ |
||
| 946 | (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ |
||
| 947 | (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) |
||
| 948 | |||
| 949 | /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. |
||
| 950 | * @param __HANDLE__ specifies the UART Handle. |
||
| 951 | * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set |
||
| 952 | * to clear the corresponding interrupt |
||
| 953 | * This parameter can be one of the following values: |
||
| 954 | * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag |
||
| 955 | * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag |
||
| 956 | * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag |
||
| 957 | * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag |
||
| 958 | * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag |
||
| 959 | * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag |
||
| 960 | * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag |
||
| 961 | * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag |
||
| 962 | * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag |
||
| 963 | * @arg @ref UART_CLEAR_CMF Character Match Clear Flag |
||
| 964 | #if defined(USART_CR1_UESM) |
||
| 965 | * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag |
||
| 966 | #endif |
||
| 967 | * @retval None |
||
| 968 | */ |
||
| 969 | #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) |
||
| 970 | |||
| 971 | /** @brief Set a specific UART request flag. |
||
| 972 | * @param __HANDLE__ specifies the UART Handle. |
||
| 973 | * @param __REQ__ specifies the request flag to set |
||
| 974 | * This parameter can be one of the following values: |
||
| 975 | * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request |
||
| 976 | * @arg @ref UART_SENDBREAK_REQUEST Send Break Request |
||
| 977 | * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request |
||
| 978 | * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request |
||
| 979 | * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request |
||
| 980 | * @retval None |
||
| 981 | */ |
||
| 982 | #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) |
||
| 983 | |||
| 984 | /** @brief Enable the UART one bit sample method. |
||
| 985 | * @param __HANDLE__ specifies the UART Handle. |
||
| 986 | * @retval None |
||
| 987 | */ |
||
| 988 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||
| 989 | |||
| 990 | /** @brief Disable the UART one bit sample method. |
||
| 991 | * @param __HANDLE__ specifies the UART Handle. |
||
| 992 | * @retval None |
||
| 993 | */ |
||
| 994 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) |
||
| 995 | |||
| 996 | /** @brief Enable UART. |
||
| 997 | * @param __HANDLE__ specifies the UART Handle. |
||
| 998 | * @retval None |
||
| 999 | */ |
||
| 1000 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
||
| 1001 | |||
| 1002 | /** @brief Disable UART. |
||
| 1003 | * @param __HANDLE__ specifies the UART Handle. |
||
| 1004 | * @retval None |
||
| 1005 | */ |
||
| 1006 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||
| 1007 | |||
| 1008 | /** @brief Enable CTS flow control. |
||
| 1009 | * @note This macro allows to enable CTS hardware flow control for a given UART instance, |
||
| 1010 | * without need to call HAL_UART_Init() function. |
||
| 1011 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 1012 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 1013 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 1014 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 1015 | * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) |
||
| 1016 | * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). |
||
| 1017 | * @param __HANDLE__ specifies the UART Handle. |
||
| 1018 | * @retval None |
||
| 1019 | */ |
||
| 1020 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
||
| 1021 | do{ \ |
||
| 1022 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 1023 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
||
| 1024 | } while(0U) |
||
| 1025 | |||
| 1026 | /** @brief Disable CTS flow control. |
||
| 1027 | * @note This macro allows to disable CTS hardware flow control for a given UART instance, |
||
| 1028 | * without need to call HAL_UART_Init() function. |
||
| 1029 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 1030 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 1031 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 1032 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 1033 | * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) |
||
| 1034 | * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). |
||
| 1035 | * @param __HANDLE__ specifies the UART Handle. |
||
| 1036 | * @retval None |
||
| 1037 | */ |
||
| 1038 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
||
| 1039 | do{ \ |
||
| 1040 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 1041 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
||
| 1042 | } while(0U) |
||
| 1043 | |||
| 1044 | /** @brief Enable RTS flow control. |
||
| 1045 | * @note This macro allows to enable RTS hardware flow control for a given UART instance, |
||
| 1046 | * without need to call HAL_UART_Init() function. |
||
| 1047 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 1048 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 1049 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 1050 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 1051 | * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) |
||
| 1052 | * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). |
||
| 1053 | * @param __HANDLE__ specifies the UART Handle. |
||
| 1054 | * @retval None |
||
| 1055 | */ |
||
| 1056 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
||
| 1057 | do{ \ |
||
| 1058 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
||
| 1059 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
||
| 1060 | } while(0U) |
||
| 1061 | |||
| 1062 | /** @brief Disable RTS flow control. |
||
| 1063 | * @note This macro allows to disable RTS hardware flow control for a given UART instance, |
||
| 1064 | * without need to call HAL_UART_Init() function. |
||
| 1065 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 1066 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 1067 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 1068 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 1069 | * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) |
||
| 1070 | * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). |
||
| 1071 | * @param __HANDLE__ specifies the UART Handle. |
||
| 1072 | * @retval None |
||
| 1073 | */ |
||
| 1074 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
||
| 1075 | do{ \ |
||
| 1076 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
||
| 1077 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
||
| 1078 | } while(0U) |
||
| 1079 | /** |
||
| 1080 | * @} |
||
| 1081 | */ |
||
| 1082 | |||
| 1083 | /* Private macros --------------------------------------------------------*/ |
||
| 1084 | /** @defgroup UART_Private_Macros UART Private Macros |
||
| 1085 | * @{ |
||
| 1086 | */ |
||
| 1087 | |||
| 1088 | |||
| 1089 | /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. |
||
| 1090 | * @param __PCLK__ UART clock. |
||
| 1091 | * @param __BAUD__ Baud rate set by the user. |
||
| 1092 | * @retval Division result |
||
| 1093 | */ |
||
| 1094 | #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) |
||
| 1095 | |||
| 1096 | /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. |
||
| 1097 | * @param __PCLK__ UART clock. |
||
| 1098 | * @param __BAUD__ Baud rate set by the user. |
||
| 1099 | * @retval Division result |
||
| 1100 | */ |
||
| 1101 | #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) |
||
| 1102 | |||
| 1103 | |||
| 1104 | /** @brief Check UART Baud rate. |
||
| 1105 | * @param __BAUDRATE__ Baudrate specified by the user. |
||
| 1106 | * The maximum Baud Rate is derived from the maximum clock on F0 (i.e. 48 MHz) |
||
| 1107 | * divided by the smallest oversampling used on the USART (i.e. 8) |
||
| 1108 | * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) |
||
| 1109 | */ |
||
| 1110 | #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6000001U) |
||
| 1111 | |||
| 1112 | /** @brief Check UART assertion time. |
||
| 1113 | * @param __TIME__ 5-bit value assertion time. |
||
| 1114 | * @retval Test result (TRUE or FALSE). |
||
| 1115 | */ |
||
| 1116 | #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) |
||
| 1117 | |||
| 1118 | /** @brief Check UART deassertion time. |
||
| 1119 | * @param __TIME__ 5-bit value deassertion time. |
||
| 1120 | * @retval Test result (TRUE or FALSE). |
||
| 1121 | */ |
||
| 1122 | #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) |
||
| 1123 | |||
| 1124 | /** |
||
| 1125 | * @brief Ensure that UART frame number of stop bits is valid. |
||
| 1126 | * @param __STOPBITS__ UART frame number of stop bits. |
||
| 1127 | * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) |
||
| 1128 | */ |
||
| 1129 | #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ |
||
| 1130 | ((__STOPBITS__) == UART_STOPBITS_1) || \ |
||
| 1131 | ((__STOPBITS__) == UART_STOPBITS_1_5) || \ |
||
| 1132 | ((__STOPBITS__) == UART_STOPBITS_2)) |
||
| 1133 | |||
| 1134 | |||
| 1135 | /** |
||
| 1136 | * @brief Ensure that UART frame parity is valid. |
||
| 1137 | * @param __PARITY__ UART frame parity. |
||
| 1138 | * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) |
||
| 1139 | */ |
||
| 1140 | #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ |
||
| 1141 | ((__PARITY__) == UART_PARITY_EVEN) || \ |
||
| 1142 | ((__PARITY__) == UART_PARITY_ODD)) |
||
| 1143 | |||
| 1144 | /** |
||
| 1145 | * @brief Ensure that UART hardware flow control is valid. |
||
| 1146 | * @param __CONTROL__ UART hardware flow control. |
||
| 1147 | * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) |
||
| 1148 | */ |
||
| 1149 | #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ |
||
| 1150 | (((__CONTROL__) == UART_HWCONTROL_NONE) || \ |
||
| 1151 | ((__CONTROL__) == UART_HWCONTROL_RTS) || \ |
||
| 1152 | ((__CONTROL__) == UART_HWCONTROL_CTS) || \ |
||
| 1153 | ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) |
||
| 1154 | |||
| 1155 | /** |
||
| 1156 | * @brief Ensure that UART communication mode is valid. |
||
| 1157 | * @param __MODE__ UART communication mode. |
||
| 1158 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
||
| 1159 | */ |
||
| 1160 | #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) |
||
| 1161 | |||
| 1162 | /** |
||
| 1163 | * @brief Ensure that UART state is valid. |
||
| 1164 | * @param __STATE__ UART state. |
||
| 1165 | * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) |
||
| 1166 | */ |
||
| 1167 | #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ |
||
| 1168 | ((__STATE__) == UART_STATE_ENABLE)) |
||
| 1169 | |||
| 1170 | /** |
||
| 1171 | * @brief Ensure that UART oversampling is valid. |
||
| 1172 | * @param __SAMPLING__ UART oversampling. |
||
| 1173 | * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) |
||
| 1174 | */ |
||
| 1175 | #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ |
||
| 1176 | ((__SAMPLING__) == UART_OVERSAMPLING_8)) |
||
| 1177 | |||
| 1178 | /** |
||
| 1179 | * @brief Ensure that UART frame sampling is valid. |
||
| 1180 | * @param __ONEBIT__ UART frame sampling. |
||
| 1181 | * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) |
||
| 1182 | */ |
||
| 1183 | #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ |
||
| 1184 | ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) |
||
| 1185 | |||
| 1186 | /** |
||
| 1187 | * @brief Ensure that UART auto Baud rate detection mode is valid. |
||
| 1188 | * @param __MODE__ UART auto Baud rate detection mode. |
||
| 1189 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
||
| 1190 | */ |
||
| 1191 | #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ |
||
| 1192 | ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ |
||
| 1193 | ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ |
||
| 1194 | ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) |
||
| 1195 | |||
| 1196 | /** |
||
| 1197 | * @brief Ensure that UART receiver timeout setting is valid. |
||
| 1198 | * @param __TIMEOUT__ UART receiver timeout setting. |
||
| 1199 | * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) |
||
| 1200 | */ |
||
| 1201 | #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ |
||
| 1202 | ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) |
||
| 1203 | |||
| 1204 | /** @brief Check the receiver timeout value. |
||
| 1205 | * @note The maximum UART receiver timeout value is 0xFFFFFF. |
||
| 1206 | * @param __TIMEOUTVALUE__ receiver timeout value. |
||
| 1207 | * @retval Test result (TRUE or FALSE) |
||
| 1208 | */ |
||
| 1209 | #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) |
||
| 1210 | |||
| 1211 | /** |
||
| 1212 | * @brief Ensure that UART LIN state is valid. |
||
| 1213 | * @param __LIN__ UART LIN state. |
||
| 1214 | * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) |
||
| 1215 | */ |
||
| 1216 | #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ |
||
| 1217 | ((__LIN__) == UART_LIN_ENABLE)) |
||
| 1218 | |||
| 1219 | /** |
||
| 1220 | * @brief Ensure that UART LIN break detection length is valid. |
||
| 1221 | * @param __LENGTH__ UART LIN break detection length. |
||
| 1222 | * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) |
||
| 1223 | */ |
||
| 1224 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ |
||
| 1225 | ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) |
||
| 1226 | |||
| 1227 | /** |
||
| 1228 | * @brief Ensure that UART DMA TX state is valid. |
||
| 1229 | * @param __DMATX__ UART DMA TX state. |
||
| 1230 | * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) |
||
| 1231 | */ |
||
| 1232 | #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ |
||
| 1233 | ((__DMATX__) == UART_DMA_TX_ENABLE)) |
||
| 1234 | |||
| 1235 | /** |
||
| 1236 | * @brief Ensure that UART DMA RX state is valid. |
||
| 1237 | * @param __DMARX__ UART DMA RX state. |
||
| 1238 | * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) |
||
| 1239 | */ |
||
| 1240 | #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ |
||
| 1241 | ((__DMARX__) == UART_DMA_RX_ENABLE)) |
||
| 1242 | |||
| 1243 | /** |
||
| 1244 | * @brief Ensure that UART half-duplex state is valid. |
||
| 1245 | * @param __HDSEL__ UART half-duplex state. |
||
| 1246 | * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) |
||
| 1247 | */ |
||
| 1248 | #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ |
||
| 1249 | ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) |
||
| 1250 | |||
| 1251 | /** |
||
| 1252 | * @brief Ensure that UART wake-up method is valid. |
||
| 1253 | * @param __WAKEUP__ UART wake-up method . |
||
| 1254 | * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) |
||
| 1255 | */ |
||
| 1256 | #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ |
||
| 1257 | ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
||
| 1258 | |||
| 1259 | /** |
||
| 1260 | * @brief Ensure that UART request parameter is valid. |
||
| 1261 | * @param __PARAM__ UART request parameter. |
||
| 1262 | * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) |
||
| 1263 | */ |
||
| 1264 | #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ |
||
| 1265 | ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ |
||
| 1266 | ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ |
||
| 1267 | ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ |
||
| 1268 | ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) |
||
| 1269 | |||
| 1270 | /** |
||
| 1271 | * @brief Ensure that UART advanced features initialization is valid. |
||
| 1272 | * @param __INIT__ UART advanced features initialization. |
||
| 1273 | * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) |
||
| 1274 | */ |
||
| 1275 | #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ |
||
| 1276 | UART_ADVFEATURE_TXINVERT_INIT | \ |
||
| 1277 | UART_ADVFEATURE_RXINVERT_INIT | \ |
||
| 1278 | UART_ADVFEATURE_DATAINVERT_INIT | \ |
||
| 1279 | UART_ADVFEATURE_SWAP_INIT | \ |
||
| 1280 | UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ |
||
| 1281 | UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ |
||
| 1282 | UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ |
||
| 1283 | UART_ADVFEATURE_MSBFIRST_INIT)) |
||
| 1284 | |||
| 1285 | /** |
||
| 1286 | * @brief Ensure that UART frame TX inversion setting is valid. |
||
| 1287 | * @param __TXINV__ UART frame TX inversion setting. |
||
| 1288 | * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) |
||
| 1289 | */ |
||
| 1290 | #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ |
||
| 1291 | ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) |
||
| 1292 | |||
| 1293 | /** |
||
| 1294 | * @brief Ensure that UART frame RX inversion setting is valid. |
||
| 1295 | * @param __RXINV__ UART frame RX inversion setting. |
||
| 1296 | * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) |
||
| 1297 | */ |
||
| 1298 | #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ |
||
| 1299 | ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) |
||
| 1300 | |||
| 1301 | /** |
||
| 1302 | * @brief Ensure that UART frame data inversion setting is valid. |
||
| 1303 | * @param __DATAINV__ UART frame data inversion setting. |
||
| 1304 | * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) |
||
| 1305 | */ |
||
| 1306 | #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ |
||
| 1307 | ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) |
||
| 1308 | |||
| 1309 | /** |
||
| 1310 | * @brief Ensure that UART frame RX/TX pins swap setting is valid. |
||
| 1311 | * @param __SWAP__ UART frame RX/TX pins swap setting. |
||
| 1312 | * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) |
||
| 1313 | */ |
||
| 1314 | #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ |
||
| 1315 | ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) |
||
| 1316 | |||
| 1317 | /** |
||
| 1318 | * @brief Ensure that UART frame overrun setting is valid. |
||
| 1319 | * @param __OVERRUN__ UART frame overrun setting. |
||
| 1320 | * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) |
||
| 1321 | */ |
||
| 1322 | #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ |
||
| 1323 | ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) |
||
| 1324 | |||
| 1325 | /** |
||
| 1326 | * @brief Ensure that UART auto Baud rate state is valid. |
||
| 1327 | * @param __AUTOBAUDRATE__ UART auto Baud rate state. |
||
| 1328 | * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) |
||
| 1329 | */ |
||
| 1330 | #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ |
||
| 1331 | ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) |
||
| 1332 | |||
| 1333 | /** |
||
| 1334 | * @brief Ensure that UART DMA enabling or disabling on error setting is valid. |
||
| 1335 | * @param __DMA__ UART DMA enabling or disabling on error setting. |
||
| 1336 | * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) |
||
| 1337 | */ |
||
| 1338 | #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ |
||
| 1339 | ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) |
||
| 1340 | |||
| 1341 | /** |
||
| 1342 | * @brief Ensure that UART frame MSB first setting is valid. |
||
| 1343 | * @param __MSBFIRST__ UART frame MSB first setting. |
||
| 1344 | * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) |
||
| 1345 | */ |
||
| 1346 | #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ |
||
| 1347 | ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) |
||
| 1348 | |||
| 1349 | #if defined(USART_CR1_UESM) |
||
| 1350 | /** |
||
| 1351 | * @brief Ensure that UART stop mode state is valid. |
||
| 1352 | * @param __STOPMODE__ UART stop mode state. |
||
| 1353 | * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) |
||
| 1354 | */ |
||
| 1355 | #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ |
||
| 1356 | ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) |
||
| 1357 | |||
| 1358 | #endif /* USART_CR1_UESM */ |
||
| 1359 | /** |
||
| 1360 | * @brief Ensure that UART mute mode state is valid. |
||
| 1361 | * @param __MUTE__ UART mute mode state. |
||
| 1362 | * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) |
||
| 1363 | */ |
||
| 1364 | #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ |
||
| 1365 | ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) |
||
| 1366 | #if defined(USART_CR1_UESM) |
||
| 1367 | |||
| 1368 | /** |
||
| 1369 | * @brief Ensure that UART wake-up selection is valid. |
||
| 1370 | * @param __WAKE__ UART wake-up selection. |
||
| 1371 | * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) |
||
| 1372 | */ |
||
| 1373 | #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ |
||
| 1374 | ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ |
||
| 1375 | ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) |
||
| 1376 | #endif /* USART_CR1_UESM */ |
||
| 1377 | |||
| 1378 | /** |
||
| 1379 | * @brief Ensure that UART driver enable polarity is valid. |
||
| 1380 | * @param __POLARITY__ UART driver enable polarity. |
||
| 1381 | * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) |
||
| 1382 | */ |
||
| 1383 | #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ |
||
| 1384 | ((__POLARITY__) == UART_DE_POLARITY_LOW)) |
||
| 1385 | |||
| 1386 | |||
| 1387 | /** |
||
| 1388 | * @} |
||
| 1389 | */ |
||
| 1390 | |||
| 1391 | /* Include UART HAL Extended module */ |
||
| 1392 | #include "stm32f0xx_hal_uart_ex.h" |
||
| 1393 | |||
| 1394 | |||
| 1395 | /* Exported functions --------------------------------------------------------*/ |
||
| 1396 | /** @addtogroup UART_Exported_Functions UART Exported Functions |
||
| 1397 | * @{ |
||
| 1398 | */ |
||
| 1399 | |||
| 1400 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
||
| 1401 | * @{ |
||
| 1402 | */ |
||
| 1403 | |||
| 1404 | /* Initialization and de-initialization functions ****************************/ |
||
| 1405 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
||
| 1406 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
||
| 1407 | #if defined(USART_CR2_LINEN) |
||
| 1408 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
||
| 1409 | #endif /* USART_CR2_LINEN */ |
||
| 1410 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
||
| 1411 | HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); |
||
| 1412 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
||
| 1413 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
||
| 1414 | |||
| 1415 | /* Callbacks Register/UnRegister functions ***********************************/ |
||
| 1416 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
| 1417 | HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, |
||
| 1418 | pUART_CallbackTypeDef pCallback); |
||
| 1419 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); |
||
| 1420 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
||
| 1421 | |||
| 1422 | /** |
||
| 1423 | * @} |
||
| 1424 | */ |
||
| 1425 | |||
| 1426 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions |
||
| 1427 | * @{ |
||
| 1428 | */ |
||
| 1429 | |||
| 1430 | /* IO operation functions *****************************************************/ |
||
| 1431 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 1432 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 1433 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 1434 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 1435 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 1436 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 1437 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
||
| 1438 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
||
| 1439 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
||
| 1440 | /* Transfer Abort functions */ |
||
| 1441 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
||
| 1442 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
||
| 1443 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
||
| 1444 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
||
| 1445 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
||
| 1446 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
||
| 1447 | |||
| 1448 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
||
| 1449 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
| 1450 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
||
| 1451 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
| 1452 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
||
| 1453 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
||
| 1454 | void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); |
||
| 1455 | void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); |
||
| 1456 | void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); |
||
| 1457 | |||
| 1458 | /** |
||
| 1459 | * @} |
||
| 1460 | */ |
||
| 1461 | |||
| 1462 | /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions |
||
| 1463 | * @{ |
||
| 1464 | */ |
||
| 1465 | |||
| 1466 | /* Peripheral Control functions ************************************************/ |
||
| 1467 | void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); |
||
| 1468 | HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); |
||
| 1469 | HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); |
||
| 1470 | |||
| 1471 | #if defined(USART_CR2_LINEN) |
||
| 1472 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
||
| 1473 | #endif /* USART_CR2_LINEN */ |
||
| 1474 | HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); |
||
| 1475 | HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); |
||
| 1476 | void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
||
| 1477 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
||
| 1478 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
||
| 1479 | |||
| 1480 | /** |
||
| 1481 | * @} |
||
| 1482 | */ |
||
| 1483 | |||
| 1484 | /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions |
||
| 1485 | * @{ |
||
| 1486 | */ |
||
| 1487 | |||
| 1488 | /* Peripheral State and Errors functions **************************************************/ |
||
| 1489 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
||
| 1490 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
||
| 1491 | |||
| 1492 | /** |
||
| 1493 | * @} |
||
| 1494 | */ |
||
| 1495 | |||
| 1496 | /** |
||
| 1497 | * @} |
||
| 1498 | */ |
||
| 1499 | |||
| 1500 | /* Private functions -----------------------------------------------------------*/ |
||
| 1501 | /** @addtogroup UART_Private_Functions UART Private Functions |
||
| 1502 | * @{ |
||
| 1503 | */ |
||
| 1504 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
| 1505 | void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); |
||
| 1506 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
||
| 1507 | HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); |
||
| 1508 | HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); |
||
| 1509 | HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, |
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| 1510 | uint32_t Tickstart, uint32_t Timeout); |
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| 1511 | void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); |
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| 1512 | |||
| 1513 | /** |
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| 1514 | * @} |
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| 1515 | */ |
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| 1516 | |||
| 1517 | /** |
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| 1518 | * @} |
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| 1519 | */ |
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| 1520 | |||
| 1521 | /** |
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| 1522 | * @} |
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| 1523 | */ |
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| 1524 | |||
| 1525 | #ifdef __cplusplus |
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| 1526 | } |
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| 1527 | #endif |
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| 1528 | |||
| 1529 | #endif /* STM32F0xx_HAL_UART_H */ |
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| 1530 | |||
| 1531 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |