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/*
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 * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
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 *
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 * SPDX-License-Identifier: Apache-2.0
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 *
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 * Licensed under the Apache License, Version 2.0 (the License); you may
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 * not use this file except in compliance with the License.
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 * You may obtain a copy of the License at
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 *
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 * www.apache.org/licenses/LICENSE-2.0
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 *
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 * Unless required by applicable law or agreed to in writing, software
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 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
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 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 * See the License for the specific language governing permissions and
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 * limitations under the License.
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 */
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/* ----------------------------------------------------------------------
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 * Project:      CMSIS NN Library
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 * Title:        arm_nn_mult_q7.c
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 * Description:  Q7 vector multiplication with variable output shifts
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 *
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 * $Date:        13. July 2018
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 * $Revision:    V.1.0.0
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 *
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 * Target Processor:  Cortex-M cores
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 *
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 * -------------------------------------------------------------------- */
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#include "arm_nnfunctions.h"
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/**    
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 * @ingroup groupSupport    
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 */
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/**
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 * @addtogroup NNBasicMath
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 * @{
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 */
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/**
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 * @brief           Q7 vector multiplication with variable output shifts
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 * @param[in]       *pSrcA        pointer to the first input vector
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 * @param[in]       *pSrcB        pointer to the second input vector
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 * @param[out]      *pDst         pointer to the output vector
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 * @param[in]       out_shift     amount of right-shift for output
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 * @param[in]       blockSize     number of samples in each vector
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 * @return none.
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 *
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 * <b>Scaling and Overflow Behavior:</b>
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 * \par
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 * The function uses saturating arithmetic.
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 * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
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 */
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void arm_nn_mult_q7(
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  q7_t * pSrcA,
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  q7_t * pSrcB,
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  q7_t * pDst,
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  const uint16_t out_shift,
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  uint32_t blockSize)
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{
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  uint32_t blkCnt;                               /* loop counters */
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#if defined (ARM_MATH_DSP)
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/* Run the below code for Cortex-M4 and Cortex-M3 */
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  q7_t out1, out2, out3, out4;                   /* Temporary variables to store the product */
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  /* loop Unrolling */
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  blkCnt = blockSize >> 2U;
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  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
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   ** a second loop below computes the remaining 1 to 3 samples. */
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  while (blkCnt > 0U)
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  {
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    /* C = A * B */
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    /* Multiply the inputs and store the results in temporary variables */
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    out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
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    out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
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    out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
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    out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
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    /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
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    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
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    /* Decrement the blockSize loop counter */
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    blkCnt--;
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  }
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  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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   ** No loop unrolling is used. */
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  blkCnt = blockSize % 0x4U;
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#else
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  /* Run the below code for Cortex-M0 */
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  /* Initialize blkCnt with number of samples */
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  blkCnt = blockSize;
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#endif /* #if defined (ARM_MATH_DSP) */
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  while (blkCnt > 0U)
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  {
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    /* C = A * B */
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    /* Multiply the inputs and store the result in the destination buffer */
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    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
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    /* Decrement the blockSize loop counter */
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    blkCnt--;
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  }
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}
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/**
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 * @} end of NNBasicMath group
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 */