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| 2 | mjames | 1 | /* |
| 2 | * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved. |
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| 3 | * |
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| 4 | * SPDX-License-Identifier: Apache-2.0 |
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| 5 | * |
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| 6 | * Licensed under the Apache License, Version 2.0 (the License); you may |
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| 7 | * not use this file except in compliance with the License. |
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| 8 | * You may obtain a copy of the License at |
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| 9 | * |
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| 10 | * www.apache.org/licenses/LICENSE-2.0 |
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| 11 | * |
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| 12 | * Unless required by applicable law or agreed to in writing, software |
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| 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
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| 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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| 15 | * See the License for the specific language governing permissions and |
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| 16 | * limitations under the License. |
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| 17 | */ |
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| 18 | |||
| 19 | /* ---------------------------------------------------------------------- |
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| 20 | * Project: CMSIS NN Library |
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| 21 | * Title: arm_nn_mult_q15.c |
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| 22 | * Description: Q15 vector multiplication with variable output shifts |
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| 23 | * |
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| 24 | * $Date: 13. July 2018 |
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| 25 | * $Revision: V.1.0.0 |
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| 26 | * |
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| 27 | * Target Processor: Cortex-M cores |
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| 28 | * |
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| 29 | * -------------------------------------------------------------------- */ |
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| 30 | |||
| 31 | #include "arm_nnfunctions.h" |
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| 32 | |||
| 33 | /** |
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| 34 | * @ingroup groupSupport |
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| 35 | */ |
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| 36 | |||
| 37 | /** |
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| 38 | * @addtogroup NNBasicMath |
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| 39 | * @{ |
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| 40 | */ |
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| 41 | |||
| 42 | |||
| 43 | /** |
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| 44 | * @brief Q7 vector multiplication with variable output shifts |
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| 45 | * @param[in] *pSrcA pointer to the first input vector |
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| 46 | * @param[in] *pSrcB pointer to the second input vector |
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| 47 | * @param[out] *pDst pointer to the output vector |
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| 48 | * @param[in] out_shift amount of right-shift for output |
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| 49 | * @param[in] blockSize number of samples in each vector |
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| 50 | * @return none. |
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| 51 | * |
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| 52 | * <b>Scaling and Overflow Behavior:</b> |
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| 53 | * \par |
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| 54 | * The function uses saturating arithmetic. |
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| 55 | * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. |
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| 56 | */ |
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| 57 | |||
| 58 | void arm_nn_mult_q15( |
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| 59 | q15_t * pSrcA, |
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| 60 | q15_t * pSrcB, |
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| 61 | q15_t * pDst, |
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| 62 | const uint16_t out_shift, |
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| 63 | uint32_t blockSize) |
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| 64 | { |
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| 65 | uint32_t blkCnt; /* loop counters */ |
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| 66 | |||
| 67 | #if defined (ARM_MATH_DSP) |
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| 68 | |||
| 69 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
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| 70 | q31_t inA1, inA2, inB1, inB2; /* temporary input variables */ |
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| 71 | q15_t out1, out2, out3, out4; /* temporary output variables */ |
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| 72 | q31_t mul1, mul2, mul3, mul4; /* temporary variables */ |
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| 73 | |||
| 74 | /* loop Unrolling */ |
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| 75 | blkCnt = blockSize >> 2U; |
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| 76 | |||
| 77 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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| 78 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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| 79 | while (blkCnt > 0U) |
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| 80 | { |
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| 81 | /* read two samples at a time from sourceA */ |
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| 82 | inA1 = *__SIMD32(pSrcA)++; |
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| 83 | /* read two samples at a time from sourceB */ |
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| 84 | inB1 = *__SIMD32(pSrcB)++; |
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| 85 | /* read two samples at a time from sourceA */ |
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| 86 | inA2 = *__SIMD32(pSrcA)++; |
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| 87 | /* read two samples at a time from sourceB */ |
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| 88 | inB2 = *__SIMD32(pSrcB)++; |
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| 89 | |||
| 90 | /* multiply mul = sourceA * sourceB */ |
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| 91 | mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); |
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| 92 | mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1); |
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| 93 | mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16)); |
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| 94 | mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2); |
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| 95 | |||
| 96 | /* saturate result to 16 bit */ |
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| 97 | out1 = (q15_t) __SSAT((mul1 + NN_ROUND(out_shift)) >> out_shift, 16); |
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| 98 | out2 = (q15_t) __SSAT((mul2 + NN_ROUND(out_shift)) >> out_shift, 16); |
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| 99 | out3 = (q15_t) __SSAT((mul3 + NN_ROUND(out_shift)) >> out_shift, 16); |
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| 100 | out4 = (q15_t) __SSAT((mul4 + NN_ROUND(out_shift)) >> out_shift, 16); |
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| 101 | |||
| 102 | /* store the result */ |
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| 103 | #ifndef ARM_MATH_BIG_ENDIAN |
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| 104 | |||
| 105 | *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); |
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| 106 | *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); |
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| 107 | |||
| 108 | #else |
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| 109 | |||
| 110 | *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); |
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| 111 | *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); |
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| 112 | |||
| 113 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
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| 114 | |||
| 115 | /* Decrement the blockSize loop counter */ |
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| 116 | blkCnt--; |
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| 117 | } |
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| 118 | |||
| 119 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. |
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| 120 | ** No loop unrolling is used. */ |
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| 121 | blkCnt = blockSize % 0x4U; |
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| 122 | |||
| 123 | #else |
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| 124 | |||
| 125 | /* Run the below code for Cortex-M0 */ |
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| 126 | |||
| 127 | /* Initialize blkCnt with number of samples */ |
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| 128 | blkCnt = blockSize; |
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| 129 | |||
| 130 | #endif /* #if defined (ARM_MATH_DSP) */ |
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| 131 | |||
| 132 | |||
| 133 | while (blkCnt > 0U) |
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| 134 | { |
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| 135 | /* C = A * B */ |
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| 136 | /* Multiply the inputs and store the result in the destination buffer */ |
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| 137 | *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 16); |
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| 138 | |||
| 139 | /* Decrement the blockSize loop counter */ |
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| 140 | blkCnt--; |
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| 141 | } |
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| 142 | } |
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| 143 | |||
| 144 | /** |
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| 145 | * @} end of NNBasicMath group |
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| 146 | */ |
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| 147 |