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2 | mjames | 1 | /* |
2 | * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved. |
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3 | * |
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4 | * SPDX-License-Identifier: Apache-2.0 |
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5 | * |
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6 | * Licensed under the Apache License, Version 2.0 (the License); you may |
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7 | * not use this file except in compliance with the License. |
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8 | * You may obtain a copy of the License at |
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9 | * |
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10 | * www.apache.org/licenses/LICENSE-2.0 |
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11 | * |
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12 | * Unless required by applicable law or agreed to in writing, software |
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13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
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14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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15 | * See the License for the specific language governing permissions and |
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16 | * limitations under the License. |
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17 | */ |
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18 | |||
19 | /* ---------------------------------------------------------------------- |
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20 | * Project: CMSIS NN Library |
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21 | * Title: arm_fully_connected_q7.c |
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22 | * Description: Q7 basic fully-connected layer function |
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23 | * |
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24 | * $Date: 17. January 2018 |
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25 | * $Revision: V.1.0.0 |
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26 | * |
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27 | * Target Processor: Cortex-M cores |
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28 | * |
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29 | * -------------------------------------------------------------------- */ |
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30 | |||
31 | #include "arm_math.h" |
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32 | #include "arm_nnfunctions.h" |
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33 | |||
34 | /** |
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35 | * @ingroup groupNN |
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36 | */ |
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37 | |||
38 | /** |
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39 | * @addtogroup FC |
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40 | * @{ |
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41 | */ |
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42 | |||
43 | /** |
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44 | * @brief Q7 basic fully-connected layer function |
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45 | * @param[in] pV pointer to input vector |
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46 | * @param[in] pM pointer to matrix weights |
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47 | * @param[in] dim_vec length of the vector |
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48 | * @param[in] num_of_rows number of rows in weight matrix |
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49 | * @param[in] bias_shift amount of left-shift for bias |
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50 | * @param[in] out_shift amount of right-shift for output |
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51 | * @param[in] bias pointer to bias |
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52 | * @param[in,out] pOut pointer to output vector |
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53 | * @param[in,out] vec_buffer pointer to buffer space for input |
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54 | * @return The function returns <code>ARM_MATH_SUCCESS</code> |
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55 | * |
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56 | * @details |
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57 | * |
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58 | * <b>Buffer size:</b> |
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59 | * |
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60 | * vec_buffer size: dim_vec |
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61 | * |
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62 | * This basic function is designed to work with regular weight |
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63 | * matrix without interleaving. |
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64 | * |
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65 | */ |
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66 | |||
67 | arm_status |
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68 | arm_fully_connected_q7(const q7_t * pV, |
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69 | const q7_t * pM, |
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70 | const uint16_t dim_vec, |
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71 | const uint16_t num_of_rows, |
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72 | const uint16_t bias_shift, |
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73 | const uint16_t out_shift, const q7_t * bias, q7_t * pOut, q15_t * vec_buffer) |
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74 | { |
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75 | |||
76 | #if defined (ARM_MATH_DSP) |
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77 | /* Run the following code for Cortex-M4 and Cortex-M7 */ |
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78 | |||
79 | const q7_t *pB = pM; |
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80 | const q7_t *pB2; |
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81 | q7_t *pO = pOut; |
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82 | const q7_t *pBias = bias; |
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83 | q15_t *pA; |
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84 | uint16_t rowCnt = num_of_rows >> 1; |
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85 | |||
86 | /* expand the vector into the buffer */ |
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87 | arm_q7_to_q15_reordered_no_shift(pV, vec_buffer, dim_vec); |
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88 | |||
89 | while (rowCnt) |
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90 | { |
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91 | q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); |
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92 | q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); |
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93 | uint16_t colCnt = dim_vec >> 2; |
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94 | |||
95 | pA = vec_buffer; |
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96 | pB2 = pB + dim_vec; |
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97 | |||
98 | while (colCnt) |
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99 | { |
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100 | q31_t inV, inM11, inM12, inM21, inM22; |
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101 | pB = (q7_t *) read_and_pad_reordered((void *)pB, &inM11, &inM12); |
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102 | pB2 = (q7_t *) read_and_pad_reordered((void *)pB2, &inM21, &inM22); |
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103 | |||
104 | inV = *__SIMD32(pA)++; |
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105 | |||
106 | sum = __SMLAD(inV, inM11, sum); |
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107 | sum2 = __SMLAD(inV, inM21, sum2); |
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108 | |||
109 | inV = *__SIMD32(pA)++; |
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110 | |||
111 | sum = __SMLAD(inV, inM12, sum); |
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112 | sum2 = __SMLAD(inV, inM22, sum2); |
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113 | |||
114 | colCnt--; |
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115 | } |
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116 | colCnt = dim_vec & 0x3; |
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117 | while (colCnt) |
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118 | { |
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119 | q7_t inV = *pA++; |
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120 | q15_t inM = *pB++; |
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121 | q15_t inM2 = *pB2++; |
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122 | |||
123 | sum += inV * inM; |
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124 | sum2 += inV * inM2; |
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125 | colCnt--; |
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126 | } /* while over colCnt */ |
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127 | *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8)); |
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128 | *pO++ = (q7_t) (__SSAT((sum2 >> out_shift), 8)); |
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129 | |||
130 | /* adjust the pointers and counters */ |
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131 | pB += dim_vec; |
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132 | rowCnt--; |
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133 | } |
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134 | |||
135 | /* left-over part of the rows */ |
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136 | rowCnt = num_of_rows & 0x1; |
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137 | |||
138 | while (rowCnt) |
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139 | { |
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140 | uint16_t colCnt = dim_vec >> 2; |
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141 | q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); |
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142 | |||
143 | pA = vec_buffer; |
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144 | |||
145 | while (colCnt) |
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146 | { |
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147 | q31_t inV1, inV2, inM11, inM12; |
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148 | |||
149 | pB = (q7_t *) read_and_pad_reordered((void *)pB, &inM11, &inM12); |
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150 | |||
151 | inV1 = *__SIMD32(pA)++; |
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152 | sum = __SMLAD(inV1, inM11, sum); |
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153 | |||
154 | inV2 = *__SIMD32(pA)++; |
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155 | sum = __SMLAD(inV2, inM12, sum); |
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156 | |||
157 | colCnt--; |
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158 | } |
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159 | |||
160 | /* left-over of the vector */ |
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161 | colCnt = dim_vec & 0x3; |
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162 | while (colCnt) |
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163 | { |
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164 | q7_t inV = *pA++; |
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165 | q15_t inM = *pB++; |
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166 | sum += inV * inM; |
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167 | colCnt--; |
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168 | } |
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169 | |||
170 | *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8)); |
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171 | |||
172 | rowCnt--; |
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173 | } |
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174 | |||
175 | #else |
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176 | int i, j; |
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177 | |||
178 | /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ |
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179 | for (i = 0; i < num_of_rows; i++) |
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180 | { |
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181 | int ip_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift); |
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182 | for (j = 0; j < dim_vec; j++) |
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183 | { |
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184 | ip_out += pV[j] * pM[i * dim_vec + j]; |
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185 | } |
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186 | pOut[i] = (q7_t) __SSAT((ip_out >> out_shift), 8); |
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187 | } |
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188 | |||
189 | #endif /* ARM_MATH_DSP */ |
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190 | |||
191 | /* Return to ARM_MATH_SUCCESS */ |
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192 | return (ARM_MATH_SUCCESS); |
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193 | |||
194 | } |
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195 | |||
196 | /** |
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197 | * @} end of FC group |
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198 | */ |