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| 2 | mjames | 1 | /* ---------------------------------------------------------------------- |
| 2 | * Copyright (C) 2010-2018 Arm Limited. All rights reserved. |
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| 3 | * |
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| 4 | * |
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| 5 | * Project: CMSIS NN Library |
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| 6 | * Title: arm_nnexamples_cifar10.cpp |
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| 7 | * |
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| 8 | * Description: Convolutional Neural Network Example |
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| 9 | * |
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| 10 | * Target Processor: Cortex-M4/Cortex-M7 |
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| 11 | * |
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| 12 | * Redistribution and use in source and binary forms, with or without |
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| 13 | * modification, are permitted provided that the following conditions |
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| 14 | * are met: |
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| 15 | * - Redistributions of source code must retain the above copyright |
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| 16 | * notice, this list of conditions and the following disclaimer. |
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| 17 | * - Redistributions in binary form must reproduce the above copyright |
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| 18 | * notice, this list of conditions and the following disclaimer in |
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| 19 | * the documentation and/or other materials provided with the |
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| 20 | * distribution. |
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| 21 | * - Neither the name of Arm LIMITED nor the names of its contributors |
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| 22 | * may be used to endorse or promote products derived from this |
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| 23 | * software without specific prior written permission. |
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| 24 | * |
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| 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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| 26 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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| 27 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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| 28 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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| 29 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 30 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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| 31 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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| 32 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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| 34 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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| 35 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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| 36 | * POSSIBILITY OF SUCH DAMAGE. |
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| 37 | * -------------------------------------------------------------------- */ |
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| 38 | |||
| 39 | /** |
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| 40 | * @ingroup groupExamples |
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| 41 | */ |
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| 42 | |||
| 43 | /** |
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| 44 | * @defgroup CNNExample Convolutional Neural Network Example |
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| 45 | * |
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| 46 | * \par Description: |
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| 47 | * \par |
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| 48 | * Demonstrates a convolutional neural network (CNN) example with the use of convolution, |
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| 49 | * ReLU activation, pooling and fully-connected functions. |
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| 50 | * |
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| 51 | * \par Model definition: |
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| 52 | * \par |
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| 53 | * The CNN used in this example is based on CIFAR-10 example from Caffe [1]. |
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| 54 | * The neural network consists |
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| 55 | * of 3 convolution layers interspersed by ReLU activation and max pooling layers, followed by a |
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| 56 | * fully-connected layer at the end. The input to the network is a 32x32 pixel color image, which will |
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| 57 | * be classified into one of the 10 output classes. |
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| 58 | * This example model implementation needs 32.3 KB to store weights, 40 KB for activations and |
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| 59 | * 3.1 KB for storing the \c im2col data. |
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| 60 | * |
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| 61 | * \image html CIFAR10_CNN.gif "Neural Network model definition" |
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| 62 | * |
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| 63 | * \par Variables Description: |
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| 64 | * \par |
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| 65 | * \li \c conv1_wt, \c conv2_wt, \c conv3_wt are convolution layer weight matrices |
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| 66 | * \li \c conv1_bias, \c conv2_bias, \c conv3_bias are convolution layer bias arrays |
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| 67 | * \li \c ip1_wt, ip1_bias point to fully-connected layer weights and biases |
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| 68 | * \li \c input_data points to the input image data |
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| 69 | * \li \c output_data points to the classification output |
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| 70 | * \li \c col_buffer is a buffer to store the \c im2col output |
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| 71 | * \li \c scratch_buffer is used to store the activation data (intermediate layer outputs) |
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| 72 | * |
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| 73 | * \par CMSIS DSP Software Library Functions Used: |
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| 74 | * \par |
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| 75 | * - arm_convolve_HWC_q7_RGB() |
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| 76 | * - arm_convolve_HWC_q7_fast() |
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| 77 | * - arm_relu_q7() |
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| 78 | * - arm_maxpool_q7_HWC() |
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| 79 | * - arm_avepool_q7_HWC() |
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| 80 | * - arm_fully_connected_q7_opt() |
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| 81 | * - arm_fully_connected_q7() |
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| 82 | * |
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| 83 | * <b> Refer </b> |
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| 84 | * \link arm_nnexamples_cifar10.cpp \endlink |
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| 85 | * |
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| 86 | * \par [1] https://github.com/BVLC/caffe |
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| 87 | */ |
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| 88 | |||
| 89 | #include <stdint.h> |
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| 90 | #include <stdio.h> |
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| 91 | #include "arm_math.h" |
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| 92 | #include "arm_nnexamples_cifar10_parameter.h" |
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| 93 | #include "arm_nnexamples_cifar10_weights.h" |
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| 94 | |||
| 95 | #include "arm_nnfunctions.h" |
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| 96 | #include "arm_nnexamples_cifar10_inputs.h" |
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| 97 | |||
| 98 | #ifdef _RTE_ |
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| 99 | #include "RTE_Components.h" |
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| 100 | #ifdef RTE_Compiler_EventRecorder |
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| 101 | #include "EventRecorder.h" |
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| 102 | #endif |
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| 103 | #endif |
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| 104 | |||
| 105 | // include the input and weights |
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| 106 | |||
| 107 | static q7_t conv1_wt[CONV1_IM_CH * CONV1_KER_DIM * CONV1_KER_DIM * CONV1_OUT_CH] = CONV1_WT; |
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| 108 | static q7_t conv1_bias[CONV1_OUT_CH] = CONV1_BIAS; |
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| 109 | |||
| 110 | static q7_t conv2_wt[CONV2_IM_CH * CONV2_KER_DIM * CONV2_KER_DIM * CONV2_OUT_CH] = CONV2_WT; |
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| 111 | static q7_t conv2_bias[CONV2_OUT_CH] = CONV2_BIAS; |
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| 112 | |||
| 113 | static q7_t conv3_wt[CONV3_IM_CH * CONV3_KER_DIM * CONV3_KER_DIM * CONV3_OUT_CH] = CONV3_WT; |
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| 114 | static q7_t conv3_bias[CONV3_OUT_CH] = CONV3_BIAS; |
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| 115 | |||
| 116 | static q7_t ip1_wt[IP1_DIM * IP1_OUT] = IP1_WT; |
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| 117 | static q7_t ip1_bias[IP1_OUT] = IP1_BIAS; |
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| 118 | |||
| 119 | /* Here the image_data should be the raw uint8 type RGB image in [RGB, RGB, RGB ... RGB] format */ |
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| 120 | uint8_t image_data[CONV1_IM_CH * CONV1_IM_DIM * CONV1_IM_DIM] = IMG_DATA; |
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| 121 | q7_t output_data[IP1_OUT]; |
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| 122 | |||
| 123 | //vector buffer: max(im2col buffer,average pool buffer, fully connected buffer) |
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| 124 | q7_t col_buffer[2 * 5 * 5 * 32 * 2]; |
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| 125 | |||
| 126 | q7_t scratch_buffer[32 * 32 * 10 * 4]; |
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| 127 | |||
| 128 | int main() |
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| 129 | { |
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| 130 | #ifdef RTE_Compiler_EventRecorder |
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| 131 | EventRecorderInitialize (EventRecordAll, 1); // initialize and start Event Recorder |
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| 132 | #endif |
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| 133 | |||
| 134 | printf("start execution\n"); |
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| 135 | /* start the execution */ |
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| 136 | |||
| 137 | q7_t *img_buffer1 = scratch_buffer; |
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| 138 | q7_t *img_buffer2 = img_buffer1 + 32 * 32 * 32; |
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| 139 | |||
| 140 | /* input pre-processing */ |
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| 141 | int mean_data[3] = INPUT_MEAN_SHIFT; |
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| 142 | unsigned int scale_data[3] = INPUT_RIGHT_SHIFT; |
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| 143 | for (int i=0;i<32*32*3; i+=3) { |
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| 144 | img_buffer2[i] = (q7_t)__SSAT( ((((int)image_data[i] - mean_data[0])<<7) + (0x1<<(scale_data[0]-1))) |
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| 145 | >> scale_data[0], 8); |
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| 146 | img_buffer2[i+1] = (q7_t)__SSAT( ((((int)image_data[i+1] - mean_data[1])<<7) + (0x1<<(scale_data[1]-1))) |
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| 147 | >> scale_data[1], 8); |
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| 148 | img_buffer2[i+2] = (q7_t)__SSAT( ((((int)image_data[i+2] - mean_data[2])<<7) + (0x1<<(scale_data[2]-1))) |
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| 149 | >> scale_data[2], 8); |
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| 150 | } |
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| 151 | |||
| 152 | // conv1 img_buffer2 -> img_buffer1 |
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| 153 | arm_convolve_HWC_q7_RGB(img_buffer2, CONV1_IM_DIM, CONV1_IM_CH, conv1_wt, CONV1_OUT_CH, CONV1_KER_DIM, CONV1_PADDING, |
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| 154 | CONV1_STRIDE, conv1_bias, CONV1_BIAS_LSHIFT, CONV1_OUT_RSHIFT, img_buffer1, CONV1_OUT_DIM, |
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| 155 | (q15_t *) col_buffer, NULL); |
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| 156 | |||
| 157 | arm_relu_q7(img_buffer1, CONV1_OUT_DIM * CONV1_OUT_DIM * CONV1_OUT_CH); |
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| 158 | |||
| 159 | // pool1 img_buffer1 -> img_buffer2 |
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| 160 | arm_maxpool_q7_HWC(img_buffer1, CONV1_OUT_DIM, CONV1_OUT_CH, POOL1_KER_DIM, |
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| 161 | POOL1_PADDING, POOL1_STRIDE, POOL1_OUT_DIM, NULL, img_buffer2); |
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| 162 | |||
| 163 | // conv2 img_buffer2 -> img_buffer1 |
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| 164 | arm_convolve_HWC_q7_fast(img_buffer2, CONV2_IM_DIM, CONV2_IM_CH, conv2_wt, CONV2_OUT_CH, CONV2_KER_DIM, |
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| 165 | CONV2_PADDING, CONV2_STRIDE, conv2_bias, CONV2_BIAS_LSHIFT, CONV2_OUT_RSHIFT, img_buffer1, |
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| 166 | CONV2_OUT_DIM, (q15_t *) col_buffer, NULL); |
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| 167 | |||
| 168 | arm_relu_q7(img_buffer1, CONV2_OUT_DIM * CONV2_OUT_DIM * CONV2_OUT_CH); |
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| 169 | |||
| 170 | // pool2 img_buffer1 -> img_buffer2 |
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| 171 | arm_maxpool_q7_HWC(img_buffer1, CONV2_OUT_DIM, CONV2_OUT_CH, POOL2_KER_DIM, |
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| 172 | POOL2_PADDING, POOL2_STRIDE, POOL2_OUT_DIM, col_buffer, img_buffer2); |
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| 173 | |||
| 174 | // conv3 img_buffer2 -> img_buffer1 |
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| 175 | arm_convolve_HWC_q7_fast(img_buffer2, CONV3_IM_DIM, CONV3_IM_CH, conv3_wt, CONV3_OUT_CH, CONV3_KER_DIM, |
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| 176 | CONV3_PADDING, CONV3_STRIDE, conv3_bias, CONV3_BIAS_LSHIFT, CONV3_OUT_RSHIFT, img_buffer1, |
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| 177 | CONV3_OUT_DIM, (q15_t *) col_buffer, NULL); |
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| 178 | |||
| 179 | arm_relu_q7(img_buffer1, CONV3_OUT_DIM * CONV3_OUT_DIM * CONV3_OUT_CH); |
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| 180 | |||
| 181 | // pool3 img_buffer-> img_buffer2 |
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| 182 | arm_maxpool_q7_HWC(img_buffer1, CONV3_OUT_DIM, CONV3_OUT_CH, POOL3_KER_DIM, |
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| 183 | POOL3_PADDING, POOL3_STRIDE, POOL3_OUT_DIM, col_buffer, img_buffer2); |
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| 184 | |||
| 185 | arm_fully_connected_q7_opt(img_buffer2, ip1_wt, IP1_DIM, IP1_OUT, IP1_BIAS_LSHIFT, IP1_OUT_RSHIFT, ip1_bias, |
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| 186 | output_data, (q15_t *) img_buffer1); |
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| 187 | |||
| 188 | arm_softmax_q7(output_data, 10, output_data); |
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| 189 | |||
| 190 | for (int i = 0; i < 10; i++) |
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| 191 | { |
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| 192 | printf("%d: %d\n", i, output_data[i]); |
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| 193 | } |
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| 194 | |||
| 195 | return 0; |
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| 196 | } |