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Rev	Author	Line No.	Line
2	mjames	1	;****************** (C) COPYRIGHT 2017 STMicroelectronics ******************
		2	; File Name : startup_stm32f101xg.s*
		3	; Author : MCD Application Team*
		4	; Version : V4.2.0*
		5	; Date : 31-March-2017*
		6	; Description : STM32F101xG Access Line Devices vector table for EWARM*
		7	; toolchain.*
		8	; This module performs:*
		9	; - Set the initial SP*
		10	; - Set the initial PC == __iar_program_start,*
		11	; - Set the vector table entries with the exceptions ISR*
		12	; address.*
		13	; - Configure the system clock*
		14	; - Branches to main in the C library (which eventually*
		15	; calls main()).*
		16	; After Reset the Cortex-M3 processor is in Thread mode,*
		17	; priority is Privileged, and the Stack is set to Main.*
		18	;********************************************************************************
		19	;*
		20	; <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>*
		21	;*
		22	; Redistribution and use in source and binary forms, with or without modification,*
		23	; are permitted provided that the following conditions are met:*
		24	; 1. Redistributions of source code must retain the above copyright notice,*
		25	; this list of conditions and the following disclaimer.*
		26	; 2. Redistributions in binary form must reproduce the above copyright notice,*
		27	; this list of conditions and the following disclaimer in the documentation*
		28	; and/or other materials provided with the distribution.*
		29	; 3. Neither the name of STMicroelectronics nor the names of its contributors*
		30	; may be used to endorse or promote products derived from this software*
		31	; without specific prior written permission.*
		32	;*
		33	; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"*
		34	; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE*
		35	; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE*
		36	; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE*
		37	; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL*
		38	; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR*
		39	; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER*
		40	; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,*
		41	; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE*
		42	; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.*
		43	;*
		44	;*******************************************************************************
		45	;
		46	;
		47	; The modules in this file are included in the libraries, and may be replaced
		48	; by any user-defined modules that define the PUBLIC symbol _program_start or
		49	; a user defined start symbol.
		50	; To override the cstartup defined in the library, simply add your modified
		51	; version to the workbench project.
		52	;
		53	; The vector table is normally located at address 0.
		54	; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
		55	; The name "__vector_table" has special meaning for C-SPY:
		56	; it is where the SP start value is found, and the NVIC vector
		57	; table register (VTOR) is initialized to this address if != 0.
		58	;
		59	; Cortex-M version
		60	;
		61
		62	MODULE ?cstartup
		63
		64	;; Forward declaration of sections.
		65	SECTION CSTACK:DATA:NOROOT(3)
		66
		67	SECTION .intvec:CODE:NOROOT(2)
		68
		69	EXTERN __iar_program_start
		70	EXTERN SystemInit
		71	PUBLIC __vector_table
		72
		73	DATA
		74
		75	__vector_table
		76	DCD sfe(CSTACK)
		77	DCD Reset_Handler ; Reset Handler
		78	DCD NMI_Handler ; NMI Handler
		79	DCD HardFault_Handler ; Hard Fault Handler
		80	DCD MemManage_Handler ; MPU Fault Handler
		81	DCD BusFault_Handler ; Bus Fault Handler
		82	DCD UsageFault_Handler ; Usage Fault Handler
		83	DCD 0 ; Reserved
		84	DCD 0 ; Reserved
		85	DCD 0 ; Reserved
		86	DCD 0 ; Reserved
		87	DCD SVC_Handler ; SVCall Handler
		88	DCD DebugMon_Handler ; Debug Monitor Handler
		89	DCD 0 ; Reserved
		90	DCD PendSV_Handler ; PendSV Handler
		91	DCD SysTick_Handler ; SysTick Handler
		92
		93	; External Interrupts
		94	DCD WWDG_IRQHandler ; Window Watchdog
		95	DCD PVD_IRQHandler ; PVD through EXTI Line detect
		96	DCD TAMPER_IRQHandler ; Tamper
		97	DCD RTC_IRQHandler ; RTC
		98	DCD FLASH_IRQHandler ; Flash
		99	DCD RCC_IRQHandler ; RCC
		100	DCD EXTI0_IRQHandler ; EXTI Line 0
		101	DCD EXTI1_IRQHandler ; EXTI Line 1
		102	DCD EXTI2_IRQHandler ; EXTI Line 2
		103	DCD EXTI3_IRQHandler ; EXTI Line 3
		104	DCD EXTI4_IRQHandler ; EXTI Line 4
		105	DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
		106	DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
		107	DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
		108	DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
		109	DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
		110	DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
		111	DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
		112	DCD ADC1_2_IRQHandler ; ADC1 & ADC2
		113	DCD 0 ; Reserved
		114	DCD 0 ; Reserved
		115	DCD 0 ; Reserved
		116	DCD 0 ; Reserved
		117	DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
		118	DCD TIM9_IRQHandler ; TIM9
		119	DCD TIM10_IRQHandler ; TIM10
		120	DCD TIM11_IRQHandler ; TIM11
		121	DCD 0 ; Reserved
		122	DCD TIM2_IRQHandler ; TIM2
		123	DCD TIM3_IRQHandler ; TIM3
		124	DCD TIM4_IRQHandler ; TIM4
		125	DCD I2C1_EV_IRQHandler ; I2C1 Event
		126	DCD I2C1_ER_IRQHandler ; I2C1 Error
		127	DCD I2C2_EV_IRQHandler ; I2C2 Event
		128	DCD I2C2_ER_IRQHandler ; I2C2 Error
		129	DCD SPI1_IRQHandler ; SPI1
		130	DCD SPI2_IRQHandler ; SPI2
		131	DCD USART1_IRQHandler ; USART1
		132	DCD USART2_IRQHandler ; USART2
		133	DCD USART3_IRQHandler ; USART3
		134	DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
		135	DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
		136	DCD 0 ; Reserved
		137	DCD TIM12_IRQHandler ; TIM12
		138	DCD TIM13_IRQHandler ; TIM13
		139	DCD TIM14_IRQHandler ; TIM14
		140	DCD 0 ; Reserved
		141	DCD 0 ; Reserved
		142	DCD FSMC_IRQHandler ; FSMC
		143	DCD 0 ; Reserved
		144	DCD TIM5_IRQHandler ; TIM5
		145	DCD SPI3_IRQHandler ; SPI3
		146	DCD UART4_IRQHandler ; UART4
		147	DCD UART5_IRQHandler ; UART5
		148	DCD TIM6_IRQHandler ; TIM6
		149	DCD TIM7_IRQHandler ; TIM7
		150	DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
		151	DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
		152	DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
		153	DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
		154	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		155	;;
		156	;; Default interrupt handlers.
		157	;;
		158	THUMB
		159
		160	PUBWEAK Reset_Handler
		161	SECTION .text:CODE:REORDER:NOROOT(2)
		162	Reset_Handler
		163	LDR R0, =SystemInit
		164	BLX R0
		165	LDR R0, =__iar_program_start
		166	BX R0
		167
		168	PUBWEAK NMI_Handler
		169	SECTION .text:CODE:REORDER:NOROOT(1)
		170	NMI_Handler
		171	B NMI_Handler
		172
		173	PUBWEAK HardFault_Handler
		174	SECTION .text:CODE:REORDER:NOROOT(1)
		175	HardFault_Handler
		176	B HardFault_Handler
		177
		178	PUBWEAK MemManage_Handler
		179	SECTION .text:CODE:REORDER:NOROOT(1)
		180	MemManage_Handler
		181	B MemManage_Handler
		182
		183	PUBWEAK BusFault_Handler
		184	SECTION .text:CODE:REORDER:NOROOT(1)
		185	BusFault_Handler
		186	B BusFault_Handler
		187
		188	PUBWEAK UsageFault_Handler
		189	SECTION .text:CODE:REORDER:NOROOT(1)
		190	UsageFault_Handler
		191	B UsageFault_Handler
		192
		193	PUBWEAK SVC_Handler
		194	SECTION .text:CODE:REORDER:NOROOT(1)
		195	SVC_Handler
		196	B SVC_Handler
		197
		198	PUBWEAK DebugMon_Handler
		199	SECTION .text:CODE:REORDER:NOROOT(1)
		200	DebugMon_Handler
		201	B DebugMon_Handler
		202
		203	PUBWEAK PendSV_Handler
		204	SECTION .text:CODE:REORDER:NOROOT(1)
		205	PendSV_Handler
		206	B PendSV_Handler
		207
		208	PUBWEAK SysTick_Handler
		209	SECTION .text:CODE:REORDER:NOROOT(1)
		210	SysTick_Handler
		211	B SysTick_Handler
		212
		213	PUBWEAK WWDG_IRQHandler
		214	SECTION .text:CODE:REORDER:NOROOT(1)
		215	WWDG_IRQHandler
		216	B WWDG_IRQHandler
		217
		218	PUBWEAK PVD_IRQHandler
		219	SECTION .text:CODE:REORDER:NOROOT(1)
		220	PVD_IRQHandler
		221	B PVD_IRQHandler
		222
		223	PUBWEAK TAMPER_IRQHandler
		224	SECTION .text:CODE:REORDER:NOROOT(1)
		225	TAMPER_IRQHandler
		226	B TAMPER_IRQHandler
		227
		228	PUBWEAK RTC_IRQHandler
		229	SECTION .text:CODE:REORDER:NOROOT(1)
		230	RTC_IRQHandler
		231	B RTC_IRQHandler
		232
		233	PUBWEAK FLASH_IRQHandler
		234	SECTION .text:CODE:REORDER:NOROOT(1)
		235	FLASH_IRQHandler
		236	B FLASH_IRQHandler
		237
		238	PUBWEAK RCC_IRQHandler
		239	SECTION .text:CODE:REORDER:NOROOT(1)
		240	RCC_IRQHandler
		241	B RCC_IRQHandler
		242
		243	PUBWEAK EXTI0_IRQHandler
		244	SECTION .text:CODE:REORDER:NOROOT(1)
		245	EXTI0_IRQHandler
		246	B EXTI0_IRQHandler
		247
		248	PUBWEAK EXTI1_IRQHandler
		249	SECTION .text:CODE:REORDER:NOROOT(1)
		250	EXTI1_IRQHandler
		251	B EXTI1_IRQHandler
		252
		253	PUBWEAK EXTI2_IRQHandler
		254	SECTION .text:CODE:REORDER:NOROOT(1)
		255	EXTI2_IRQHandler
		256	B EXTI2_IRQHandler
		257
		258	PUBWEAK EXTI3_IRQHandler
		259	SECTION .text:CODE:REORDER:NOROOT(1)
		260	EXTI3_IRQHandler
		261	B EXTI3_IRQHandler
		262
		263	PUBWEAK EXTI4_IRQHandler
		264	SECTION .text:CODE:REORDER:NOROOT(1)
		265	EXTI4_IRQHandler
		266	B EXTI4_IRQHandler
		267
		268	PUBWEAK DMA1_Channel1_IRQHandler
		269	SECTION .text:CODE:REORDER:NOROOT(1)
		270	DMA1_Channel1_IRQHandler
		271	B DMA1_Channel1_IRQHandler
		272
		273	PUBWEAK DMA1_Channel2_IRQHandler
		274	SECTION .text:CODE:REORDER:NOROOT(1)
		275	DMA1_Channel2_IRQHandler
		276	B DMA1_Channel2_IRQHandler
		277
		278	PUBWEAK DMA1_Channel3_IRQHandler
		279	SECTION .text:CODE:REORDER:NOROOT(1)
		280	DMA1_Channel3_IRQHandler
		281	B DMA1_Channel3_IRQHandler
		282
		283	PUBWEAK DMA1_Channel4_IRQHandler
		284	SECTION .text:CODE:REORDER:NOROOT(1)
		285	DMA1_Channel4_IRQHandler
		286	B DMA1_Channel4_IRQHandler
		287
		288	PUBWEAK DMA1_Channel5_IRQHandler
		289	SECTION .text:CODE:REORDER:NOROOT(1)
		290	DMA1_Channel5_IRQHandler
		291	B DMA1_Channel5_IRQHandler
		292
		293	PUBWEAK DMA1_Channel6_IRQHandler
		294	SECTION .text:CODE:REORDER:NOROOT(1)
		295	DMA1_Channel6_IRQHandler
		296	B DMA1_Channel6_IRQHandler
		297
		298	PUBWEAK DMA1_Channel7_IRQHandler
		299	SECTION .text:CODE:REORDER:NOROOT(1)
		300	DMA1_Channel7_IRQHandler
		301	B DMA1_Channel7_IRQHandler
		302
		303	PUBWEAK ADC1_2_IRQHandler
		304	SECTION .text:CODE:REORDER:NOROOT(1)
		305	ADC1_2_IRQHandler
		306	B ADC1_2_IRQHandler
		307
		308	PUBWEAK EXTI9_5_IRQHandler
		309	SECTION .text:CODE:REORDER:NOROOT(1)
		310	EXTI9_5_IRQHandler
		311	B EXTI9_5_IRQHandler
		312
		313	PUBWEAK TIM9_IRQHandler
		314	SECTION .text:CODE:REORDER:NOROOT(1)
		315	TIM9_IRQHandler
		316	B TIM9_IRQHandler
		317
		318	PUBWEAK TIM10_IRQHandler
		319	SECTION .text:CODE:REORDER:NOROOT(1)
		320	TIM10_IRQHandler
		321	B TIM10_IRQHandler
		322
		323	PUBWEAK TIM11_IRQHandler
		324	SECTION .text:CODE:REORDER:NOROOT(1)
		325	TIM11_IRQHandler
		326	B TIM11_IRQHandler
		327
		328	PUBWEAK TIM1_CC_IRQHandler
		329	SECTION .text:CODE:REORDER:NOROOT(1)
		330	TIM1_CC_IRQHandler
		331	B TIM1_CC_IRQHandler
		332
		333	PUBWEAK TIM2_IRQHandler
		334	SECTION .text:CODE:REORDER:NOROOT(1)
		335	TIM2_IRQHandler
		336	B TIM2_IRQHandler
		337
		338	PUBWEAK TIM3_IRQHandler
		339	SECTION .text:CODE:REORDER:NOROOT(1)
		340	TIM3_IRQHandler
		341	B TIM3_IRQHandler
		342
		343	PUBWEAK TIM4_IRQHandler
		344	SECTION .text:CODE:REORDER:NOROOT(1)
		345	TIM4_IRQHandler
		346	B TIM4_IRQHandler
		347
		348	PUBWEAK I2C1_EV_IRQHandler
		349	SECTION .text:CODE:REORDER:NOROOT(1)
		350	I2C1_EV_IRQHandler
		351	B I2C1_EV_IRQHandler
		352
		353	PUBWEAK I2C1_ER_IRQHandler
		354	SECTION .text:CODE:REORDER:NOROOT(1)
		355	I2C1_ER_IRQHandler
		356	B I2C1_ER_IRQHandler
		357
		358	PUBWEAK I2C2_EV_IRQHandler
		359	SECTION .text:CODE:REORDER:NOROOT(1)
		360	I2C2_EV_IRQHandler
		361	B I2C2_EV_IRQHandler
		362
		363	PUBWEAK I2C2_ER_IRQHandler
		364	SECTION .text:CODE:REORDER:NOROOT(1)
		365	I2C2_ER_IRQHandler
		366	B I2C2_ER_IRQHandler
		367
		368	PUBWEAK SPI1_IRQHandler
		369	SECTION .text:CODE:REORDER:NOROOT(1)
		370	SPI1_IRQHandler
		371	B SPI1_IRQHandler
		372
		373	PUBWEAK SPI2_IRQHandler
		374	SECTION .text:CODE:REORDER:NOROOT(1)
		375	SPI2_IRQHandler
		376	B SPI2_IRQHandler
		377
		378	PUBWEAK USART1_IRQHandler
		379	SECTION .text:CODE:REORDER:NOROOT(1)
		380	USART1_IRQHandler
		381	B USART1_IRQHandler
		382
		383	PUBWEAK USART2_IRQHandler
		384	SECTION .text:CODE:REORDER:NOROOT(1)
		385	USART2_IRQHandler
		386	B USART2_IRQHandler
		387
		388	PUBWEAK USART3_IRQHandler
		389	SECTION .text:CODE:REORDER:NOROOT(1)
		390	USART3_IRQHandler
		391	B USART3_IRQHandler
		392
		393	PUBWEAK EXTI15_10_IRQHandler
		394	SECTION .text:CODE:REORDER:NOROOT(1)
		395	EXTI15_10_IRQHandler
		396	B EXTI15_10_IRQHandler
		397
		398	PUBWEAK RTC_Alarm_IRQHandler
		399	SECTION .text:CODE:REORDER:NOROOT(1)
		400	RTC_Alarm_IRQHandler
		401	B RTC_Alarm_IRQHandler
		402
		403	PUBWEAK FSMC_IRQHandler
		404	SECTION .text:CODE:REORDER:NOROOT(1)
		405	FSMC_IRQHandler
		406	B FSMC_IRQHandler
		407
		408	PUBWEAK TIM12_IRQHandler
		409	SECTION .text:CODE:REORDER:NOROOT(1)
		410	TIM12_IRQHandler
		411	B TIM12_IRQHandler
		412
		413	PUBWEAK TIM13_IRQHandler
		414	SECTION .text:CODE:REORDER:NOROOT(1)
		415	TIM13_IRQHandler
		416	B TIM13_IRQHandler
		417
		418	PUBWEAK TIM14_IRQHandler
		419	SECTION .text:CODE:REORDER:NOROOT(1)
		420	TIM14_IRQHandler
		421	B TIM14_IRQHandler
		422
		423	PUBWEAK TIM5_IRQHandler
		424	SECTION .text:CODE:REORDER:NOROOT(1)
		425	TIM5_IRQHandler
		426	B TIM5_IRQHandler
		427
		428	PUBWEAK SPI3_IRQHandler
		429	SECTION .text:CODE:REORDER:NOROOT(1)
		430	SPI3_IRQHandler
		431	B SPI3_IRQHandler
		432
		433	PUBWEAK UART4_IRQHandler
		434	SECTION .text:CODE:REORDER:NOROOT(1)
		435	UART4_IRQHandler
		436	B UART4_IRQHandler
		437
		438	PUBWEAK UART5_IRQHandler
		439	SECTION .text:CODE:REORDER:NOROOT(1)
		440	UART5_IRQHandler
		441	B UART5_IRQHandler
		442
		443	PUBWEAK TIM6_IRQHandler
		444	SECTION .text:CODE:REORDER:NOROOT(1)
		445	TIM6_IRQHandler
		446	B TIM6_IRQHandler
		447
		448	PUBWEAK TIM7_IRQHandler
		449	SECTION .text:CODE:REORDER:NOROOT(1)
		450	TIM7_IRQHandler
		451	B TIM7_IRQHandler
		452
		453	PUBWEAK DMA2_Channel1_IRQHandler
		454	SECTION .text:CODE:REORDER:NOROOT(1)
		455	DMA2_Channel1_IRQHandler
		456	B DMA2_Channel1_IRQHandler
		457
		458	PUBWEAK DMA2_Channel2_IRQHandler
		459	SECTION .text:CODE:REORDER:NOROOT(1)
		460	DMA2_Channel2_IRQHandler
		461	B DMA2_Channel2_IRQHandler
		462
		463	PUBWEAK DMA2_Channel3_IRQHandler
		464	SECTION .text:CODE:REORDER:NOROOT(1)
		465	DMA2_Channel3_IRQHandler
		466	B DMA2_Channel3_IRQHandler
		467
		468	PUBWEAK DMA2_Channel4_5_IRQHandler
		469	SECTION .text:CODE:REORDER:NOROOT(1)
		470	DMA2_Channel4_5_IRQHandler
		471	B DMA2_Channel4_5_IRQHandler
		472
		473
		474	END
		475
		476	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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(root)/trunk/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f101xg.s – Rev 2