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Rev	Author	Line No.	Line
5	mjames	1	;****************** (C) COPYRIGHT 2016 STMicroelectronics ******************
2	mjames	2	; File Name : startup_stm32f101xg.s*
		3	; Author : MCD Application Team*
5	mjames	4	; Version : V4.1.0*
		5	; Date : 29-April-2016*
2	mjames	6	; Description : STM32F101xG Access Line Devices vector table for EWARM*
		7	; toolchain.*
		8	; This module performs:*
		9	; - Set the initial SP*
		10	; - Set the initial PC == __iar_program_start,*
		11	; - Set the vector table entries with the exceptions ISR address,*
		12	; After Reset the Cortex-M3 processor is in Thread mode,*
		13	; priority is Privileged, and the Stack is set to Main.*
		14	;********************************************************************************
		15	;*
5	mjames	16	; <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>*
2	mjames	17	;*
		18	; Redistribution and use in source and binary forms, with or without modification,*
		19	; are permitted provided that the following conditions are met:*
		20	; 1. Redistributions of source code must retain the above copyright notice,*
		21	; this list of conditions and the following disclaimer.*
		22	; 2. Redistributions in binary form must reproduce the above copyright notice,*
		23	; this list of conditions and the following disclaimer in the documentation*
		24	; and/or other materials provided with the distribution.*
		25	; 3. Neither the name of STMicroelectronics nor the names of its contributors*
		26	; may be used to endorse or promote products derived from this software*
		27	; without specific prior written permission.*
		28	;*
		29	; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"*
		30	; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE*
		31	; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE*
		32	; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE*
		33	; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL*
		34	; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR*
		35	; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER*
		36	; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,*
		37	; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE*
		38	; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.*
		39	;*
		40	;*******************************************************************************
		41	;
		42	;
		43	; The modules in this file are included in the libraries, and may be replaced
		44	; by any user-defined modules that define the PUBLIC symbol _program_start or
		45	; a user defined start symbol.
		46	; To override the cstartup defined in the library, simply add your modified
		47	; version to the workbench project.
		48	;
		49	; The vector table is normally located at address 0.
		50	; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
		51	; The name "__vector_table" has special meaning for C-SPY:
		52	; it is where the SP start value is found, and the NVIC vector
		53	; table register (VTOR) is initialized to this address if != 0.
		54	;
		55	; Cortex-M version
		56	;
		57
		58	MODULE ?cstartup
		59
		60	;; Forward declaration of sections.
		61	SECTION CSTACK:DATA:NOROOT(3)
		62
		63	SECTION .intvec:CODE:NOROOT(2)
		64
		65	EXTERN __iar_program_start
		66	EXTERN SystemInit
		67	PUBLIC __vector_table
		68
		69	DATA
		70
		71	__vector_table
		72	DCD sfe(CSTACK)
		73	DCD Reset_Handler ; Reset Handler
		74	DCD NMI_Handler ; NMI Handler
		75	DCD HardFault_Handler ; Hard Fault Handler
		76	DCD MemManage_Handler ; MPU Fault Handler
		77	DCD BusFault_Handler ; Bus Fault Handler
		78	DCD UsageFault_Handler ; Usage Fault Handler
		79	DCD 0 ; Reserved
		80	DCD 0 ; Reserved
		81	DCD 0 ; Reserved
		82	DCD 0 ; Reserved
		83	DCD SVC_Handler ; SVCall Handler
		84	DCD DebugMon_Handler ; Debug Monitor Handler
		85	DCD 0 ; Reserved
		86	DCD PendSV_Handler ; PendSV Handler
		87	DCD SysTick_Handler ; SysTick Handler
		88
		89	; External Interrupts
		90	DCD WWDG_IRQHandler ; Window Watchdog
		91	DCD PVD_IRQHandler ; PVD through EXTI Line detect
		92	DCD TAMPER_IRQHandler ; Tamper
		93	DCD RTC_IRQHandler ; RTC
		94	DCD FLASH_IRQHandler ; Flash
		95	DCD RCC_IRQHandler ; RCC
		96	DCD EXTI0_IRQHandler ; EXTI Line 0
		97	DCD EXTI1_IRQHandler ; EXTI Line 1
		98	DCD EXTI2_IRQHandler ; EXTI Line 2
		99	DCD EXTI3_IRQHandler ; EXTI Line 3
		100	DCD EXTI4_IRQHandler ; EXTI Line 4
		101	DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
		102	DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
		103	DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
		104	DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
		105	DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
		106	DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
		107	DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
		108	DCD ADC1_2_IRQHandler ; ADC1 & ADC2
		109	DCD 0 ; Reserved
		110	DCD 0 ; Reserved
		111	DCD 0 ; Reserved
		112	DCD 0 ; Reserved
		113	DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
		114	DCD TIM9_IRQHandler ; TIM9
		115	DCD TIM10_IRQHandler ; TIM10
		116	DCD TIM11_IRQHandler ; TIM11
		117	DCD 0 ; Reserved
		118	DCD TIM2_IRQHandler ; TIM2
		119	DCD TIM3_IRQHandler ; TIM3
		120	DCD TIM4_IRQHandler ; TIM4
		121	DCD I2C1_EV_IRQHandler ; I2C1 Event
		122	DCD I2C1_ER_IRQHandler ; I2C1 Error
		123	DCD I2C2_EV_IRQHandler ; I2C2 Event
		124	DCD I2C2_ER_IRQHandler ; I2C2 Error
		125	DCD SPI1_IRQHandler ; SPI1
		126	DCD SPI2_IRQHandler ; SPI2
		127	DCD USART1_IRQHandler ; USART1
		128	DCD USART2_IRQHandler ; USART2
		129	DCD USART3_IRQHandler ; USART3
		130	DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
		131	DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
		132	DCD 0 ; Reserved
		133	DCD TIM12_IRQHandler ; TIM12
		134	DCD TIM13_IRQHandler ; TIM13
		135	DCD TIM14_IRQHandler ; TIM14
		136	DCD 0 ; Reserved
		137	DCD 0 ; Reserved
		138	DCD FSMC_IRQHandler ; FSMC
		139	DCD 0 ; Reserved
		140	DCD TIM5_IRQHandler ; TIM5
		141	DCD SPI3_IRQHandler ; SPI3
		142	DCD UART4_IRQHandler ; UART4
		143	DCD UART5_IRQHandler ; UART5
		144	DCD TIM6_IRQHandler ; TIM6
		145	DCD TIM7_IRQHandler ; TIM7
		146	DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
		147	DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
		148	DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
		149	DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
		150	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		151	;;
		152	;; Default interrupt handlers.
		153	;;
		154	THUMB
		155
		156	PUBWEAK Reset_Handler
		157	SECTION .text:CODE:REORDER:NOROOT(2)
		158	Reset_Handler
		159	LDR R0, =SystemInit
		160	BLX R0
		161	LDR R0, =__iar_program_start
		162	BX R0
		163
		164	PUBWEAK NMI_Handler
		165	SECTION .text:CODE:REORDER:NOROOT(1)
		166	NMI_Handler
		167	B NMI_Handler
		168
		169	PUBWEAK HardFault_Handler
		170	SECTION .text:CODE:REORDER:NOROOT(1)
		171	HardFault_Handler
		172	B HardFault_Handler
		173
		174	PUBWEAK MemManage_Handler
		175	SECTION .text:CODE:REORDER:NOROOT(1)
		176	MemManage_Handler
		177	B MemManage_Handler
		178
		179	PUBWEAK BusFault_Handler
		180	SECTION .text:CODE:REORDER:NOROOT(1)
		181	BusFault_Handler
		182	B BusFault_Handler
		183
		184	PUBWEAK UsageFault_Handler
		185	SECTION .text:CODE:REORDER:NOROOT(1)
		186	UsageFault_Handler
		187	B UsageFault_Handler
		188
		189	PUBWEAK SVC_Handler
		190	SECTION .text:CODE:REORDER:NOROOT(1)
		191	SVC_Handler
		192	B SVC_Handler
		193
		194	PUBWEAK DebugMon_Handler
		195	SECTION .text:CODE:REORDER:NOROOT(1)
		196	DebugMon_Handler
		197	B DebugMon_Handler
		198
		199	PUBWEAK PendSV_Handler
		200	SECTION .text:CODE:REORDER:NOROOT(1)
		201	PendSV_Handler
		202	B PendSV_Handler
		203
		204	PUBWEAK SysTick_Handler
		205	SECTION .text:CODE:REORDER:NOROOT(1)
		206	SysTick_Handler
		207	B SysTick_Handler
		208
		209	PUBWEAK WWDG_IRQHandler
		210	SECTION .text:CODE:REORDER:NOROOT(1)
		211	WWDG_IRQHandler
		212	B WWDG_IRQHandler
		213
		214	PUBWEAK PVD_IRQHandler
		215	SECTION .text:CODE:REORDER:NOROOT(1)
		216	PVD_IRQHandler
		217	B PVD_IRQHandler
		218
		219	PUBWEAK TAMPER_IRQHandler
		220	SECTION .text:CODE:REORDER:NOROOT(1)
		221	TAMPER_IRQHandler
		222	B TAMPER_IRQHandler
		223
		224	PUBWEAK RTC_IRQHandler
		225	SECTION .text:CODE:REORDER:NOROOT(1)
		226	RTC_IRQHandler
		227	B RTC_IRQHandler
		228
		229	PUBWEAK FLASH_IRQHandler
		230	SECTION .text:CODE:REORDER:NOROOT(1)
		231	FLASH_IRQHandler
		232	B FLASH_IRQHandler
		233
		234	PUBWEAK RCC_IRQHandler
		235	SECTION .text:CODE:REORDER:NOROOT(1)
		236	RCC_IRQHandler
		237	B RCC_IRQHandler
		238
		239	PUBWEAK EXTI0_IRQHandler
		240	SECTION .text:CODE:REORDER:NOROOT(1)
		241	EXTI0_IRQHandler
		242	B EXTI0_IRQHandler
		243
		244	PUBWEAK EXTI1_IRQHandler
		245	SECTION .text:CODE:REORDER:NOROOT(1)
		246	EXTI1_IRQHandler
		247	B EXTI1_IRQHandler
		248
		249	PUBWEAK EXTI2_IRQHandler
		250	SECTION .text:CODE:REORDER:NOROOT(1)
		251	EXTI2_IRQHandler
		252	B EXTI2_IRQHandler
		253
		254	PUBWEAK EXTI3_IRQHandler
		255	SECTION .text:CODE:REORDER:NOROOT(1)
		256	EXTI3_IRQHandler
		257	B EXTI3_IRQHandler
		258
		259	PUBWEAK EXTI4_IRQHandler
		260	SECTION .text:CODE:REORDER:NOROOT(1)
		261	EXTI4_IRQHandler
		262	B EXTI4_IRQHandler
		263
		264	PUBWEAK DMA1_Channel1_IRQHandler
		265	SECTION .text:CODE:REORDER:NOROOT(1)
		266	DMA1_Channel1_IRQHandler
		267	B DMA1_Channel1_IRQHandler
		268
		269	PUBWEAK DMA1_Channel2_IRQHandler
		270	SECTION .text:CODE:REORDER:NOROOT(1)
		271	DMA1_Channel2_IRQHandler
		272	B DMA1_Channel2_IRQHandler
		273
		274	PUBWEAK DMA1_Channel3_IRQHandler
		275	SECTION .text:CODE:REORDER:NOROOT(1)
		276	DMA1_Channel3_IRQHandler
		277	B DMA1_Channel3_IRQHandler
		278
		279	PUBWEAK DMA1_Channel4_IRQHandler
		280	SECTION .text:CODE:REORDER:NOROOT(1)
		281	DMA1_Channel4_IRQHandler
		282	B DMA1_Channel4_IRQHandler
		283
		284	PUBWEAK DMA1_Channel5_IRQHandler
		285	SECTION .text:CODE:REORDER:NOROOT(1)
		286	DMA1_Channel5_IRQHandler
		287	B DMA1_Channel5_IRQHandler
		288
		289	PUBWEAK DMA1_Channel6_IRQHandler
		290	SECTION .text:CODE:REORDER:NOROOT(1)
		291	DMA1_Channel6_IRQHandler
		292	B DMA1_Channel6_IRQHandler
		293
		294	PUBWEAK DMA1_Channel7_IRQHandler
		295	SECTION .text:CODE:REORDER:NOROOT(1)
		296	DMA1_Channel7_IRQHandler
		297	B DMA1_Channel7_IRQHandler
		298
		299	PUBWEAK ADC1_2_IRQHandler
		300	SECTION .text:CODE:REORDER:NOROOT(1)
		301	ADC1_2_IRQHandler
		302	B ADC1_2_IRQHandler
		303
		304	PUBWEAK EXTI9_5_IRQHandler
		305	SECTION .text:CODE:REORDER:NOROOT(1)
		306	EXTI9_5_IRQHandler
		307	B EXTI9_5_IRQHandler
		308
		309	PUBWEAK TIM9_IRQHandler
		310	SECTION .text:CODE:REORDER:NOROOT(1)
		311	TIM9_IRQHandler
		312	B TIM9_IRQHandler
		313
		314	PUBWEAK TIM10_IRQHandler
		315	SECTION .text:CODE:REORDER:NOROOT(1)
		316	TIM10_IRQHandler
		317	B TIM10_IRQHandler
		318
		319	PUBWEAK TIM11_IRQHandler
		320	SECTION .text:CODE:REORDER:NOROOT(1)
		321	TIM11_IRQHandler
		322	B TIM11_IRQHandler
		323
		324	PUBWEAK TIM1_CC_IRQHandler
		325	SECTION .text:CODE:REORDER:NOROOT(1)
		326	TIM1_CC_IRQHandler
		327	B TIM1_CC_IRQHandler
		328
		329	PUBWEAK TIM2_IRQHandler
		330	SECTION .text:CODE:REORDER:NOROOT(1)
		331	TIM2_IRQHandler
		332	B TIM2_IRQHandler
		333
		334	PUBWEAK TIM3_IRQHandler
		335	SECTION .text:CODE:REORDER:NOROOT(1)
		336	TIM3_IRQHandler
		337	B TIM3_IRQHandler
		338
		339	PUBWEAK TIM4_IRQHandler
		340	SECTION .text:CODE:REORDER:NOROOT(1)
		341	TIM4_IRQHandler
		342	B TIM4_IRQHandler
		343
		344	PUBWEAK I2C1_EV_IRQHandler
		345	SECTION .text:CODE:REORDER:NOROOT(1)
		346	I2C1_EV_IRQHandler
		347	B I2C1_EV_IRQHandler
		348
		349	PUBWEAK I2C1_ER_IRQHandler
		350	SECTION .text:CODE:REORDER:NOROOT(1)
		351	I2C1_ER_IRQHandler
		352	B I2C1_ER_IRQHandler
		353
		354	PUBWEAK I2C2_EV_IRQHandler
		355	SECTION .text:CODE:REORDER:NOROOT(1)
		356	I2C2_EV_IRQHandler
		357	B I2C2_EV_IRQHandler
		358
		359	PUBWEAK I2C2_ER_IRQHandler
		360	SECTION .text:CODE:REORDER:NOROOT(1)
		361	I2C2_ER_IRQHandler
		362	B I2C2_ER_IRQHandler
		363
		364	PUBWEAK SPI1_IRQHandler
		365	SECTION .text:CODE:REORDER:NOROOT(1)
		366	SPI1_IRQHandler
		367	B SPI1_IRQHandler
		368
		369	PUBWEAK SPI2_IRQHandler
		370	SECTION .text:CODE:REORDER:NOROOT(1)
		371	SPI2_IRQHandler
		372	B SPI2_IRQHandler
		373
		374	PUBWEAK USART1_IRQHandler
		375	SECTION .text:CODE:REORDER:NOROOT(1)
		376	USART1_IRQHandler
		377	B USART1_IRQHandler
		378
		379	PUBWEAK USART2_IRQHandler
		380	SECTION .text:CODE:REORDER:NOROOT(1)
		381	USART2_IRQHandler
		382	B USART2_IRQHandler
		383
		384	PUBWEAK USART3_IRQHandler
		385	SECTION .text:CODE:REORDER:NOROOT(1)
		386	USART3_IRQHandler
		387	B USART3_IRQHandler
		388
		389	PUBWEAK EXTI15_10_IRQHandler
		390	SECTION .text:CODE:REORDER:NOROOT(1)
		391	EXTI15_10_IRQHandler
		392	B EXTI15_10_IRQHandler
		393
		394	PUBWEAK RTC_Alarm_IRQHandler
		395	SECTION .text:CODE:REORDER:NOROOT(1)
		396	RTC_Alarm_IRQHandler
		397	B RTC_Alarm_IRQHandler
		398
		399	PUBWEAK FSMC_IRQHandler
		400	SECTION .text:CODE:REORDER:NOROOT(1)
		401	FSMC_IRQHandler
		402	B FSMC_IRQHandler
		403
		404	PUBWEAK TIM12_IRQHandler
		405	SECTION .text:CODE:REORDER:NOROOT(1)
		406	TIM12_IRQHandler
		407	B TIM12_IRQHandler
		408
		409	PUBWEAK TIM13_IRQHandler
		410	SECTION .text:CODE:REORDER:NOROOT(1)
		411	TIM13_IRQHandler
		412	B TIM13_IRQHandler
		413
		414	PUBWEAK TIM14_IRQHandler
		415	SECTION .text:CODE:REORDER:NOROOT(1)
		416	TIM14_IRQHandler
		417	B TIM14_IRQHandler
		418
		419	PUBWEAK TIM5_IRQHandler
		420	SECTION .text:CODE:REORDER:NOROOT(1)
		421	TIM5_IRQHandler
		422	B TIM5_IRQHandler
		423
		424	PUBWEAK SPI3_IRQHandler
		425	SECTION .text:CODE:REORDER:NOROOT(1)
		426	SPI3_IRQHandler
		427	B SPI3_IRQHandler
		428
		429	PUBWEAK UART4_IRQHandler
		430	SECTION .text:CODE:REORDER:NOROOT(1)
		431	UART4_IRQHandler
		432	B UART4_IRQHandler
		433
		434	PUBWEAK UART5_IRQHandler
		435	SECTION .text:CODE:REORDER:NOROOT(1)
		436	UART5_IRQHandler
		437	B UART5_IRQHandler
		438
		439	PUBWEAK TIM6_IRQHandler
		440	SECTION .text:CODE:REORDER:NOROOT(1)
		441	TIM6_IRQHandler
		442	B TIM6_IRQHandler
		443
		444	PUBWEAK TIM7_IRQHandler
		445	SECTION .text:CODE:REORDER:NOROOT(1)
		446	TIM7_IRQHandler
		447	B TIM7_IRQHandler
		448
		449	PUBWEAK DMA2_Channel1_IRQHandler
		450	SECTION .text:CODE:REORDER:NOROOT(1)
		451	DMA2_Channel1_IRQHandler
		452	B DMA2_Channel1_IRQHandler
		453
		454	PUBWEAK DMA2_Channel2_IRQHandler
		455	SECTION .text:CODE:REORDER:NOROOT(1)
		456	DMA2_Channel2_IRQHandler
		457	B DMA2_Channel2_IRQHandler
		458
		459	PUBWEAK DMA2_Channel3_IRQHandler
		460	SECTION .text:CODE:REORDER:NOROOT(1)
		461	DMA2_Channel3_IRQHandler
		462	B DMA2_Channel3_IRQHandler
		463
		464	PUBWEAK DMA2_Channel4_5_IRQHandler
		465	SECTION .text:CODE:REORDER:NOROOT(1)
		466	DMA2_Channel4_5_IRQHandler
		467	B DMA2_Channel4_5_IRQHandler
		468
		469
		470	END
		471
		472	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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