Subversion Repositories testOled

Rev

Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
2 mjames 1 
/**
2 
  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3 
  * @file      startup_stm32f101x6.s
4 
  * @author    MCD Application Team
5 
  * @brief     STM32F101x6 Devices vector table for Atollic toolchain.
6 
  *            This module performs:
7 
  *                - Set the initial SP
8 
  *                - Set the initial PC == Reset_Handler,
9 
  *                - Set the vector table entries with the exceptions ISR address
10 
  *                - Configure the clock system
11 
  *                - Branches to main in the C library (which eventually
12 
  *                  calls main()).
13 
  *            After Reset the Cortex-M3 processor is in Thread mode,
14 
  *            priority is Privileged, and the Stack is set to Main.
15 
  ******************************************************************************
16 
  * @attention
17 
  *
18 
  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
19 
  * All rights reserved.</center></h2>
20 
  *
21 
  * This software component is licensed by ST under BSD 3-Clause license,
22 
  * the "License"; You may not use this file except in compliance with the
23 
  * License. You may obtain a copy of the License at:
24 
  *                        opensource.org/licenses/BSD-3-Clause
25 
  *
26 
  ******************************************************************************
27 
  */
28 
 
29 
  .syntax unified
30 
  .cpu cortex-m3
31 
  .fpu softvfp
32 
  .thumb
33 
 
34 
.global g_pfnVectors
35 
.global Default_Handler
36 
 
37 
/* start address for the initialization values of the .data section.
38 
defined in linker script */
39 
.word _sidata
40 
/* start address for the .data section. defined in linker script */
41 
.word _sdata
42 
/* end address for the .data section. defined in linker script */
43 
.word _edata
44 
/* start address for the .bss section. defined in linker script */
45 
.word _sbss
46 
/* end address for the .bss section. defined in linker script */
47 
.word _ebss
48 
 
49 
.equ  BootRAM, 0xF108F85F
50 
/**
51 
 * @brief  This is the code that gets called when the processor first
52 
 *          starts execution following a reset event. Only the absolutely
53 
 *          necessary set is performed, after which the application
54 
 *          supplied main() routine is called.
55 
 * @param  None
56 
 * @retval : None
57 
*/
58 
 
59 
  .section .text.Reset_Handler
60 
  .weak Reset_Handler
61 
  .type Reset_Handler, %function
62 
Reset_Handler:
63 
 
64 
/* Copy the data segment initializers from flash to SRAM */
65 
  ldr r0, =_sdata
66 
  ldr r1, =_edata
67 
  ldr r2, =_sidata
68 
  movs r3, #0
69 
  b LoopCopyDataInit
70 
 
71 
CopyDataInit:
72 
  ldr r4, [r2, r3]
73 
  str r4, [r0, r3]
74 
  adds r3, r3, #4
75 
 
76 
LoopCopyDataInit:
77 
  adds r4, r0, r3
78 
  cmp r4, r1
79 
  bcc CopyDataInit
80 
 
81 
/* Zero fill the bss segment. */
82 
  ldr r2, =_sbss
83 
  ldr r4, =_ebss
84 
  movs r3, #0
85 
  b LoopFillZerobss
86 
 
87 
FillZerobss:
88 
  str  r3, [r2]
89 
  adds r2, r2, #4
90 
 
91 
LoopFillZerobss:
92 
  cmp r2, r4
93 
  bcc FillZerobss
94 
 
95 
/* Call the clock system intitialization function.*/
96 
    bl  SystemInit
97 
/* Call static constructors */
98 
    bl __libc_init_array
99 
/* Call the application's entry point.*/
100 
  bl main
101 
  bx lr
102 
.size Reset_Handler, .-Reset_Handler
103 
 
104 
/**
105 
 * @brief  This is the code that gets called when the processor receives an
106 
 *         unexpected interrupt.  This simply enters an infinite loop, preserving
107 
 *         the system state for examination by a debugger.
108 
 *
109 
 * @param  None
110 
 * @retval : None
111 
*/
112 
    .section .text.Default_Handler,"ax",%progbits
113 
Default_Handler:
114 
Infinite_Loop:
115 
  b Infinite_Loop
116 
  .size Default_Handler, .-Default_Handler
117 
/******************************************************************************
118 
*
119 
* The minimal vector table for a Cortex M3.  Note that the proper constructs
120 
* must be placed on this to ensure that it ends up at physical address
121 
* 0x0000.0000.
122 
*
123 
******************************************************************************/
124 
  .section .isr_vector,"a",%progbits
125 
  .type g_pfnVectors, %object
126 
  .size g_pfnVectors, .-g_pfnVectors
127 
 
128 
 
129 
g_pfnVectors:
130 
 
131 
 
132 
  .word _estack
133 
  .word Reset_Handler
134 
  .word NMI_Handler
135 
  .word HardFault_Handler
136 
  .word MemManage_Handler
137 
  .word BusFault_Handler
138 
  .word UsageFault_Handler
139 
  .word 0
140 
  .word 0
141 
  .word 0
142 
  .word 0
143 
  .word SVC_Handler
144 
  .word DebugMon_Handler
145 
  .word 0
146 
  .word PendSV_Handler
147 
  .word SysTick_Handler
148 
  .word WWDG_IRQHandler
149 
  .word PVD_IRQHandler
150 
  .word TAMPER_IRQHandler
151 
  .word RTC_IRQHandler
152 
  .word FLASH_IRQHandler
153 
  .word RCC_IRQHandler
154 
  .word EXTI0_IRQHandler
155 
  .word EXTI1_IRQHandler
156 
  .word EXTI2_IRQHandler
157 
  .word EXTI3_IRQHandler
158 
  .word EXTI4_IRQHandler
159 
  .word DMA1_Channel1_IRQHandler
160 
  .word DMA1_Channel2_IRQHandler
161 
  .word DMA1_Channel3_IRQHandler
162 
  .word DMA1_Channel4_IRQHandler
163 
  .word DMA1_Channel5_IRQHandler
164 
  .word DMA1_Channel6_IRQHandler
165 
  .word DMA1_Channel7_IRQHandler
166 
  .word ADC1_IRQHandler
167 
  .word 0
168 
  .word 0
169 
  .word 0
170 
  .word 0
171 
  .word EXTI9_5_IRQHandler
172 
  .word 0
173 
  .word 0
174 
  .word 0
175 
  .word 0
176 
  .word TIM2_IRQHandler
177 
  .word TIM3_IRQHandler
178 
  .word 0
179 
  .word I2C1_EV_IRQHandler
180 
  .word I2C1_ER_IRQHandler
181 
  .word 0
182 
  .word 0
183 
  .word SPI1_IRQHandler
184 
  .word 0
185 
  .word USART1_IRQHandler
186 
  .word USART2_IRQHandler
187 
  .word 0
188 
  .word EXTI15_10_IRQHandler
189 
  .word RTC_Alarm_IRQHandler
190 
  .word 0
191 
  .word 0
192 
  .word 0
193 
  .word 0
194 
  .word 0
195 
  .word 0
196 
  .word 0
197 
  .word 0
198 
  .word BootRAM        /* @0x108. This is for boot in RAM mode for
199 
                          STM32F10x Low Density devices.*/
200 
 
201 
/*******************************************************************************
202 
*
203 
* Provide weak aliases for each Exception handler to the Default_Handler.
204 
* As they are weak aliases, any function with the same name will override
205 
* this definition.
206 
*
207 
*******************************************************************************/
208 
 
209 
  .weak  NMI_Handler
210 
  .thumb_set NMI_Handler,Default_Handler
211 
 
212 
  .weak  HardFault_Handler
213 
  .thumb_set HardFault_Handler,Default_Handler
214 
 
215 
  .weak  MemManage_Handler
216 
  .thumb_set MemManage_Handler,Default_Handler
217 
 
218 
  .weak  BusFault_Handler
219 
  .thumb_set BusFault_Handler,Default_Handler
220 
 
221 
  .weak  UsageFault_Handler
222 
  .thumb_set UsageFault_Handler,Default_Handler
223 
 
224 
  .weak  SVC_Handler
225 
  .thumb_set SVC_Handler,Default_Handler
226 
 
227 
  .weak  DebugMon_Handler
228 
  .thumb_set DebugMon_Handler,Default_Handler
229 
 
230 
  .weak  PendSV_Handler
231 
  .thumb_set PendSV_Handler,Default_Handler
232 
 
233 
  .weak  SysTick_Handler
234 
  .thumb_set SysTick_Handler,Default_Handler
235 
 
236 
  .weak  WWDG_IRQHandler
237 
  .thumb_set WWDG_IRQHandler,Default_Handler
238 
 
239 
  .weak  PVD_IRQHandler
240 
  .thumb_set PVD_IRQHandler,Default_Handler
241 
 
242 
  .weak  TAMPER_IRQHandler
243 
  .thumb_set TAMPER_IRQHandler,Default_Handler
244 
 
245 
  .weak  RTC_IRQHandler
246 
  .thumb_set RTC_IRQHandler,Default_Handler
247 
 
248 
  .weak  FLASH_IRQHandler
249 
  .thumb_set FLASH_IRQHandler,Default_Handler
250 
 
251 
  .weak  RCC_IRQHandler
252 
  .thumb_set RCC_IRQHandler,Default_Handler
253 
 
254 
  .weak  EXTI0_IRQHandler
255 
  .thumb_set EXTI0_IRQHandler,Default_Handler
256 
 
257 
  .weak  EXTI1_IRQHandler
258 
  .thumb_set EXTI1_IRQHandler,Default_Handler
259 
 
260 
  .weak  EXTI2_IRQHandler
261 
  .thumb_set EXTI2_IRQHandler,Default_Handler
262 
 
263 
  .weak  EXTI3_IRQHandler
264 
  .thumb_set EXTI3_IRQHandler,Default_Handler
265 
 
266 
  .weak  EXTI4_IRQHandler
267 
  .thumb_set EXTI4_IRQHandler,Default_Handler
268 
 
269 
  .weak  DMA1_Channel1_IRQHandler
270 
  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
271 
 
272 
  .weak  DMA1_Channel2_IRQHandler
273 
  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
274 
 
275 
  .weak  DMA1_Channel3_IRQHandler
276 
  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
277 
 
278 
  .weak  DMA1_Channel4_IRQHandler
279 
  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
280 
 
281 
  .weak  DMA1_Channel5_IRQHandler
282 
  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
283 
 
284 
  .weak  DMA1_Channel6_IRQHandler
285 
  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
286 
 
287 
  .weak  DMA1_Channel7_IRQHandler
288 
  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
289 
 
290 
  .weak  ADC1_IRQHandler
291 
  .thumb_set ADC1_IRQHandler,Default_Handler
292 
 
293 
  .weak  EXTI9_5_IRQHandler
294 
  .thumb_set EXTI9_5_IRQHandler,Default_Handler
295 
 
296 
  .weak  TIM2_IRQHandler
297 
  .thumb_set TIM2_IRQHandler,Default_Handler
298 
 
299 
  .weak  TIM3_IRQHandler
300 
  .thumb_set TIM3_IRQHandler,Default_Handler
301 
 
302 
  .weak  I2C1_EV_IRQHandler
303 
  .thumb_set I2C1_EV_IRQHandler,Default_Handler
304 
 
305 
  .weak  I2C1_ER_IRQHandler
306 
  .thumb_set I2C1_ER_IRQHandler,Default_Handler
307 
 
308 
  .weak  SPI1_IRQHandler
309 
  .thumb_set SPI1_IRQHandler,Default_Handler
310 
 
311 
  .weak  USART1_IRQHandler
312 
  .thumb_set USART1_IRQHandler,Default_Handler
313 
 
314 
  .weak  USART2_IRQHandler
315 
  .thumb_set USART2_IRQHandler,Default_Handler
316 
 
317 
  .weak  EXTI15_10_IRQHandler
318 
  .thumb_set EXTI15_10_IRQHandler,Default_Handler
319 
 
320 
  .weak  RTC_Alarm_IRQHandler
321 
  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
322 
 
323 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/