WebSVN – testOled – Blame – /trunk/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xg.s

Rev	Author	Line No.	Line
2	mjames	1	;****************** (C) COPYRIGHT 2017 STMicroelectronics ******************
		2	; File Name : startup_stm32f101xg.s*
		3	; Author : MCD Application Team*
		4	; Description : STM32F101xG Devices vector table for MDK-ARM toolchain.*
		5	; This module performs:*
		6	; - Set the initial SP*
		7	; - Set the initial PC == Reset_Handler*
		8	; - Set the vector table entries with the exceptions ISR address*
		9	; - Configure the clock system*
		10	; - Branches to __main in the C library (which eventually*
		11	; calls main()).*
		12	; After Reset the Cortex-M3 processor is in Thread mode,*
		13	; priority is Privileged, and the Stack is set to Main.*
		14	;******************************************************************************
		15	; @attention*
		16	;*
		17	; Copyright (c) 2017 STMicroelectronics.*
		18	; All rights reserved.*
		19	;*
		20	; This software component is licensed by ST under BSD 3-Clause license,*
		21	; the "License"; You may not use this file except in compliance with the*
		22	; License. You may obtain a copy of the License at:*
		23	; opensource.org/licenses/BSD-3-Clause*
		24	;*
		25	;******************************************************************************
		26
		27	; Amount of memory (in bytes) allocated for Stack
		28	; Tailor this value to your application needs
		29	; <h> Stack Configuration
		30	; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
		31	; </h>
		32
		33	Stack_Size EQU 0x00000400
		34
		35	AREA STACK, NOINIT, READWRITE, ALIGN=3
		36	Stack_Mem SPACE Stack_Size
		37	__initial_sp
		38
		39	; <h> Heap Configuration
		40	; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
		41	; </h>
		42
		43	Heap_Size EQU 0x00000200
		44
		45	AREA HEAP, NOINIT, READWRITE, ALIGN=3
		46	__heap_base
		47	Heap_Mem SPACE Heap_Size
		48	__heap_limit
		49
		50	PRESERVE8
		51	THUMB
		52
		53
		54	; Vector Table Mapped to Address 0 at Reset
		55	AREA RESET, DATA, READONLY
		56	EXPORT __Vectors
		57	EXPORT __Vectors_End
		58	EXPORT __Vectors_Size
		59
		60	__Vectors DCD __initial_sp ; Top of Stack
		61	DCD Reset_Handler ; Reset Handler
		62	DCD NMI_Handler ; NMI Handler
		63	DCD HardFault_Handler ; Hard Fault Handler
		64	DCD MemManage_Handler ; MPU Fault Handler
		65	DCD BusFault_Handler ; Bus Fault Handler
		66	DCD UsageFault_Handler ; Usage Fault Handler
		67	DCD 0 ; Reserved
		68	DCD 0 ; Reserved
		69	DCD 0 ; Reserved
		70	DCD 0 ; Reserved
		71	DCD SVC_Handler ; SVCall Handler
		72	DCD DebugMon_Handler ; Debug Monitor Handler
		73	DCD 0 ; Reserved
		74	DCD PendSV_Handler ; PendSV Handler
		75	DCD SysTick_Handler ; SysTick Handler
		76
		77	; External Interrupts
		78	DCD WWDG_IRQHandler ; Window Watchdog
		79	DCD PVD_IRQHandler ; PVD through EXTI Line detect
		80	DCD TAMPER_IRQHandler ; Tamper
		81	DCD RTC_IRQHandler ; RTC
		82	DCD FLASH_IRQHandler ; Flash
		83	DCD RCC_IRQHandler ; RCC
		84	DCD EXTI0_IRQHandler ; EXTI Line 0
		85	DCD EXTI1_IRQHandler ; EXTI Line 1
		86	DCD EXTI2_IRQHandler ; EXTI Line 2
		87	DCD EXTI3_IRQHandler ; EXTI Line 3
		88	DCD EXTI4_IRQHandler ; EXTI Line 4
		89	DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
		90	DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
		91	DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
		92	DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
		93	DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
		94	DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
		95	DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
		96	DCD ADC1_IRQHandler ; ADC1
		97	DCD 0 ; Reserved
		98	DCD 0 ; Reserved
		99	DCD 0 ; Reserved
		100	DCD 0 ; Reserved
		101	DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
		102	DCD TIM9_IRQHandler ; TIM9
		103	DCD TIM10_IRQHandler ; TIM10
		104	DCD TIM11_IRQHandler ; TIM11
		105	DCD 0 ; Reserved
		106	DCD TIM2_IRQHandler ; TIM2
		107	DCD TIM3_IRQHandler ; TIM3
		108	DCD TIM4_IRQHandler ; TIM4
		109	DCD I2C1_EV_IRQHandler ; I2C1 Event
		110	DCD I2C1_ER_IRQHandler ; I2C1 Error
		111	DCD I2C2_EV_IRQHandler ; I2C2 Event
		112	DCD I2C2_ER_IRQHandler ; I2C2 Error
		113	DCD SPI1_IRQHandler ; SPI1
		114	DCD SPI2_IRQHandler ; SPI2
		115	DCD USART1_IRQHandler ; USART1
		116	DCD USART2_IRQHandler ; USART2
		117	DCD USART3_IRQHandler ; USART3
		118	DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
		119	DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
		120	DCD 0 ; Reserved
		121	DCD TIM12_IRQHandler ; TIM12
		122	DCD TIM13_IRQHandler ; TIM13
		123	DCD TIM14_IRQHandler ; TIM14
		124	DCD 0 ; Reserved
		125	DCD 0 ; Reserved
		126	DCD FSMC_IRQHandler ; FSMC
		127	DCD 0 ; Reserved
		128	DCD TIM5_IRQHandler ; TIM5
		129	DCD SPI3_IRQHandler ; SPI3
		130	DCD UART4_IRQHandler ; UART4
		131	DCD UART5_IRQHandler ; UART5
		132	DCD TIM6_IRQHandler ; TIM6
		133	DCD TIM7_IRQHandler ; TIM7
		134	DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
		135	DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
		136	DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
		137	DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
		138	__Vectors_End
		139
		140	__Vectors_Size EQU __Vectors_End - __Vectors
		141
		142	AREA \|.text\|, CODE, READONLY
		143
		144	; Reset handler
		145	Reset_Handler PROC
		146	EXPORT Reset_Handler [WEAK]
		147	IMPORT __main
		148	IMPORT SystemInit
		149	LDR R0, =SystemInit
		150	BLX R0
		151	LDR R0, =__main
		152	BX R0
		153	ENDP
		154
		155	; Dummy Exception Handlers (infinite loops which can be modified)
		156
		157	NMI_Handler PROC
		158	EXPORT NMI_Handler [WEAK]
		159	B .
		160	ENDP
		161	HardFault_Handler\
		162	PROC
		163	EXPORT HardFault_Handler [WEAK]
		164	B .
		165	ENDP
		166	MemManage_Handler\
		167	PROC
		168	EXPORT MemManage_Handler [WEAK]
		169	B .
		170	ENDP
		171	BusFault_Handler\
		172	PROC
		173	EXPORT BusFault_Handler [WEAK]
		174	B .
		175	ENDP
		176	UsageFault_Handler\
		177	PROC
		178	EXPORT UsageFault_Handler [WEAK]
		179	B .
		180	ENDP
		181	SVC_Handler PROC
		182	EXPORT SVC_Handler [WEAK]
		183	B .
		184	ENDP
		185	DebugMon_Handler\
		186	PROC
		187	EXPORT DebugMon_Handler [WEAK]
		188	B .
		189	ENDP
		190	PendSV_Handler PROC
		191	EXPORT PendSV_Handler [WEAK]
		192	B .
		193	ENDP
		194	SysTick_Handler PROC
		195	EXPORT SysTick_Handler [WEAK]
		196	B .
		197	ENDP
		198
		199	Default_Handler PROC
		200
		201	EXPORT WWDG_IRQHandler [WEAK]
		202	EXPORT PVD_IRQHandler [WEAK]
		203	EXPORT TAMPER_IRQHandler [WEAK]
		204	EXPORT RTC_IRQHandler [WEAK]
		205	EXPORT FLASH_IRQHandler [WEAK]
		206	EXPORT RCC_IRQHandler [WEAK]
		207	EXPORT EXTI0_IRQHandler [WEAK]
		208	EXPORT EXTI1_IRQHandler [WEAK]
		209	EXPORT EXTI2_IRQHandler [WEAK]
		210	EXPORT EXTI3_IRQHandler [WEAK]
		211	EXPORT EXTI4_IRQHandler [WEAK]
		212	EXPORT DMA1_Channel1_IRQHandler [WEAK]
		213	EXPORT DMA1_Channel2_IRQHandler [WEAK]
		214	EXPORT DMA1_Channel3_IRQHandler [WEAK]
		215	EXPORT DMA1_Channel4_IRQHandler [WEAK]
		216	EXPORT DMA1_Channel5_IRQHandler [WEAK]
		217	EXPORT DMA1_Channel6_IRQHandler [WEAK]
		218	EXPORT DMA1_Channel7_IRQHandler [WEAK]
		219	EXPORT ADC1_IRQHandler [WEAK]
		220	EXPORT EXTI9_5_IRQHandler [WEAK]
		221	EXPORT TIM9_IRQHandler [WEAK]
		222	EXPORT TIM10_IRQHandler [WEAK]
		223	EXPORT TIM11_IRQHandler [WEAK]
		224	EXPORT TIM2_IRQHandler [WEAK]
		225	EXPORT TIM3_IRQHandler [WEAK]
		226	EXPORT TIM4_IRQHandler [WEAK]
		227	EXPORT I2C1_EV_IRQHandler [WEAK]
		228	EXPORT I2C1_ER_IRQHandler [WEAK]
		229	EXPORT I2C2_EV_IRQHandler [WEAK]
		230	EXPORT I2C2_ER_IRQHandler [WEAK]
		231	EXPORT SPI1_IRQHandler [WEAK]
		232	EXPORT SPI2_IRQHandler [WEAK]
		233	EXPORT USART1_IRQHandler [WEAK]
		234	EXPORT USART2_IRQHandler [WEAK]
		235	EXPORT USART3_IRQHandler [WEAK]
		236	EXPORT EXTI15_10_IRQHandler [WEAK]
		237	EXPORT RTC_Alarm_IRQHandler [WEAK]
		238	EXPORT TIM12_IRQHandler [WEAK]
		239	EXPORT TIM13_IRQHandler [WEAK]
		240	EXPORT TIM14_IRQHandler [WEAK]
		241	EXPORT FSMC_IRQHandler [WEAK]
		242	EXPORT TIM5_IRQHandler [WEAK]
		243	EXPORT SPI3_IRQHandler [WEAK]
		244	EXPORT UART4_IRQHandler [WEAK]
		245	EXPORT UART5_IRQHandler [WEAK]
		246	EXPORT TIM6_IRQHandler [WEAK]
		247	EXPORT TIM7_IRQHandler [WEAK]
		248	EXPORT DMA2_Channel1_IRQHandler [WEAK]
		249	EXPORT DMA2_Channel2_IRQHandler [WEAK]
		250	EXPORT DMA2_Channel3_IRQHandler [WEAK]
		251	EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
		252
		253	WWDG_IRQHandler
		254	PVD_IRQHandler
		255	TAMPER_IRQHandler
		256	RTC_IRQHandler
		257	FLASH_IRQHandler
		258	RCC_IRQHandler
		259	EXTI0_IRQHandler
		260	EXTI1_IRQHandler
		261	EXTI2_IRQHandler
		262	EXTI3_IRQHandler
		263	EXTI4_IRQHandler
		264	DMA1_Channel1_IRQHandler
		265	DMA1_Channel2_IRQHandler
		266	DMA1_Channel3_IRQHandler
		267	DMA1_Channel4_IRQHandler
		268	DMA1_Channel5_IRQHandler
		269	DMA1_Channel6_IRQHandler
		270	DMA1_Channel7_IRQHandler
		271	ADC1_IRQHandler
		272	EXTI9_5_IRQHandler
		273	TIM9_IRQHandler
		274	TIM10_IRQHandler
		275	TIM11_IRQHandler
		276	TIM2_IRQHandler
		277	TIM3_IRQHandler
		278	TIM4_IRQHandler
		279	I2C1_EV_IRQHandler
		280	I2C1_ER_IRQHandler
		281	I2C2_EV_IRQHandler
		282	I2C2_ER_IRQHandler
		283	SPI1_IRQHandler
		284	SPI2_IRQHandler
		285	USART1_IRQHandler
		286	USART2_IRQHandler
		287	USART3_IRQHandler
		288	EXTI15_10_IRQHandler
		289	RTC_Alarm_IRQHandler
		290	TIM12_IRQHandler
		291	TIM13_IRQHandler
		292	TIM14_IRQHandler
		293	FSMC_IRQHandler
		294	TIM5_IRQHandler
		295	SPI3_IRQHandler
		296	UART4_IRQHandler
		297	UART5_IRQHandler
		298	TIM6_IRQHandler
		299	TIM7_IRQHandler
		300	DMA2_Channel1_IRQHandler
		301	DMA2_Channel2_IRQHandler
		302	DMA2_Channel3_IRQHandler
		303	DMA2_Channel4_5_IRQHandler
		304	B .
		305
		306	ENDP
		307
		308	ALIGN
		309
		310	;*******************************************************************************
		311	; User Stack and Heap initialization
		312	;*******************************************************************************
		313	IF :DEF:__MICROLIB
		314
		315	EXPORT __initial_sp
		316	EXPORT __heap_base
		317	EXPORT __heap_limit
		318
		319	ELSE
		320
		321	IMPORT __use_two_region_memory
		322	EXPORT __user_initial_stackheap
		323
		324	__user_initial_stackheap
		325
		326	LDR R0, = Heap_Mem
		327	LDR R1, =(Stack_Mem + Stack_Size)
		328	LDR R2, = (Heap_Mem + Heap_Size)
		329	LDR R3, = Stack_Mem
		330	BX LR
		331
		332	ALIGN
		333
		334	ENDIF
		335
		336	END
		337
		338	;********************** (C) COPYRIGHT STMicroelectronics *END OF FILE***

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(root)/trunk/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xg.s – Rev 2