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Rev	Author	Line No.	Line
2	mjames	1	;****************** (C) COPYRIGHT 2017 STMicroelectronics ******************
		2	; File Name : startup_stm32f101xb.s*
		3	; Author : MCD Application Team*
		4	; Description : STM32F101xB Devices vector table for MDK-ARM toolchain.*
		5	; This module performs:*
		6	; - Set the initial SP*
		7	; - Set the initial PC == Reset_Handler*
		8	; - Set the vector table entries with the exceptions ISR address*
		9	; - Configure the clock system*
		10	; - Branches to __main in the C library (which eventually*
		11	; calls main()).*
		12	; After Reset the Cortex-M3 processor is in Thread mode,*
		13	; priority is Privileged, and the Stack is set to Main.*
		14	;******************************************************************************
		15	; @attention*
		16	;*
		17	; Copyright (c) 2017-2021 STMicroelectronics.*
		18	; All rights reserved.*
		19	;*
		20	; This software is licensed under terms that can be found in the LICENSE file*
		21	; in the root directory of this software component.*
		22	; If no LICENSE file comes with this software, it is provided AS-IS.*
		23	;*
		24	;******************************************************************************
		25
		26	; Amount of memory (in bytes) allocated for Stack
		27	; Tailor this value to your application needs
		28	; <h> Stack Configuration
		29	; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
		30	; </h>
		31
		32	Stack_Size EQU 0x00000400
		33
		34	AREA STACK, NOINIT, READWRITE, ALIGN=3
		35	Stack_Mem SPACE Stack_Size
		36	__initial_sp
		37
		38
		39	; <h> Heap Configuration
		40	; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
		41	; </h>
		42
		43	Heap_Size EQU 0x00000200
		44
		45	AREA HEAP, NOINIT, READWRITE, ALIGN=3
		46	__heap_base
		47	Heap_Mem SPACE Heap_Size
		48	__heap_limit
		49
		50	PRESERVE8
		51	THUMB
		52
		53
		54	; Vector Table Mapped to Address 0 at Reset
		55	AREA RESET, DATA, READONLY
		56	EXPORT __Vectors
		57	EXPORT __Vectors_End
		58	EXPORT __Vectors_Size
		59
		60	__Vectors DCD __initial_sp ; Top of Stack
		61	DCD Reset_Handler ; Reset Handler
		62	DCD NMI_Handler ; NMI Handler
		63	DCD HardFault_Handler ; Hard Fault Handler
		64	DCD MemManage_Handler ; MPU Fault Handler
		65	DCD BusFault_Handler ; Bus Fault Handler
		66	DCD UsageFault_Handler ; Usage Fault Handler
		67	DCD 0 ; Reserved
		68	DCD 0 ; Reserved
		69	DCD 0 ; Reserved
		70	DCD 0 ; Reserved
		71	DCD SVC_Handler ; SVCall Handler
		72	DCD DebugMon_Handler ; Debug Monitor Handler
		73	DCD 0 ; Reserved
		74	DCD PendSV_Handler ; PendSV Handler
		75	DCD SysTick_Handler ; SysTick Handler
		76
		77	; External Interrupts
		78	DCD WWDG_IRQHandler ; Window Watchdog
		79	DCD PVD_IRQHandler ; PVD through EXTI Line detect
		80	DCD TAMPER_IRQHandler ; Tamper
		81	DCD RTC_IRQHandler ; RTC
		82	DCD FLASH_IRQHandler ; Flash
		83	DCD RCC_IRQHandler ; RCC
		84	DCD EXTI0_IRQHandler ; EXTI Line 0
		85	DCD EXTI1_IRQHandler ; EXTI Line 1
		86	DCD EXTI2_IRQHandler ; EXTI Line 2
		87	DCD EXTI3_IRQHandler ; EXTI Line 3
		88	DCD EXTI4_IRQHandler ; EXTI Line 4
		89	DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
		90	DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
		91	DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
		92	DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
		93	DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
		94	DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
		95	DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
		96	DCD ADC1_IRQHandler ; ADC1
		97	DCD 0 ; Reserved
		98	DCD 0 ; Reserved
		99	DCD 0 ; Reserved
		100	DCD 0 ; Reserved
		101	DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
		102	DCD 0 ; Reserved
		103	DCD 0 ; Reserved
		104	DCD 0 ; Reserved
		105	DCD 0 ; Reserved
		106	DCD TIM2_IRQHandler ; TIM2
		107	DCD TIM3_IRQHandler ; TIM3
		108	DCD TIM4_IRQHandler ; TIM4
		109	DCD I2C1_EV_IRQHandler ; I2C1 Event
		110	DCD I2C1_ER_IRQHandler ; I2C1 Error
		111	DCD I2C2_EV_IRQHandler ; I2C2 Event
		112	DCD I2C2_ER_IRQHandler ; I2C2 Error
		113	DCD SPI1_IRQHandler ; SPI1
		114	DCD SPI2_IRQHandler ; SPI2
		115	DCD USART1_IRQHandler ; USART1
		116	DCD USART2_IRQHandler ; USART2
		117	DCD USART3_IRQHandler ; USART3
		118	DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
		119	DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
		120	__Vectors_End
		121
		122	__Vectors_Size EQU __Vectors_End - __Vectors
		123
		124	AREA \|.text\|, CODE, READONLY
		125
		126	; Reset handler
		127	Reset_Handler PROC
		128	EXPORT Reset_Handler [WEAK]
		129	IMPORT __main
		130	IMPORT SystemInit
		131	LDR R0, =SystemInit
		132	BLX R0
		133	LDR R0, =__main
		134	BX R0
		135	ENDP
		136
		137	; Dummy Exception Handlers (infinite loops which can be modified)
		138
		139	NMI_Handler PROC
		140	EXPORT NMI_Handler [WEAK]
		141	B .
		142	ENDP
		143	HardFault_Handler\
		144	PROC
		145	EXPORT HardFault_Handler [WEAK]
		146	B .
		147	ENDP
		148	MemManage_Handler\
		149	PROC
		150	EXPORT MemManage_Handler [WEAK]
		151	B .
		152	ENDP
		153	BusFault_Handler\
		154	PROC
		155	EXPORT BusFault_Handler [WEAK]
		156	B .
		157	ENDP
		158	UsageFault_Handler\
		159	PROC
		160	EXPORT UsageFault_Handler [WEAK]
		161	B .
		162	ENDP
		163	SVC_Handler PROC
		164	EXPORT SVC_Handler [WEAK]
		165	B .
		166	ENDP
		167	DebugMon_Handler\
		168	PROC
		169	EXPORT DebugMon_Handler [WEAK]
		170	B .
		171	ENDP
		172	PendSV_Handler PROC
		173	EXPORT PendSV_Handler [WEAK]
		174	B .
		175	ENDP
		176	SysTick_Handler PROC
		177	EXPORT SysTick_Handler [WEAK]
		178	B .
		179	ENDP
		180
		181	Default_Handler PROC
		182
		183	EXPORT WWDG_IRQHandler [WEAK]
		184	EXPORT PVD_IRQHandler [WEAK]
		185	EXPORT TAMPER_IRQHandler [WEAK]
		186	EXPORT RTC_IRQHandler [WEAK]
		187	EXPORT FLASH_IRQHandler [WEAK]
		188	EXPORT RCC_IRQHandler [WEAK]
		189	EXPORT EXTI0_IRQHandler [WEAK]
		190	EXPORT EXTI1_IRQHandler [WEAK]
		191	EXPORT EXTI2_IRQHandler [WEAK]
		192	EXPORT EXTI3_IRQHandler [WEAK]
		193	EXPORT EXTI4_IRQHandler [WEAK]
		194	EXPORT DMA1_Channel1_IRQHandler [WEAK]
		195	EXPORT DMA1_Channel2_IRQHandler [WEAK]
		196	EXPORT DMA1_Channel3_IRQHandler [WEAK]
		197	EXPORT DMA1_Channel4_IRQHandler [WEAK]
		198	EXPORT DMA1_Channel5_IRQHandler [WEAK]
		199	EXPORT DMA1_Channel6_IRQHandler [WEAK]
		200	EXPORT DMA1_Channel7_IRQHandler [WEAK]
		201	EXPORT ADC1_IRQHandler [WEAK]
		202	EXPORT EXTI9_5_IRQHandler [WEAK]
		203	EXPORT TIM2_IRQHandler [WEAK]
		204	EXPORT TIM3_IRQHandler [WEAK]
		205	EXPORT TIM4_IRQHandler [WEAK]
		206	EXPORT I2C1_EV_IRQHandler [WEAK]
		207	EXPORT I2C1_ER_IRQHandler [WEAK]
		208	EXPORT I2C2_EV_IRQHandler [WEAK]
		209	EXPORT I2C2_ER_IRQHandler [WEAK]
		210	EXPORT SPI1_IRQHandler [WEAK]
		211	EXPORT SPI2_IRQHandler [WEAK]
		212	EXPORT USART1_IRQHandler [WEAK]
		213	EXPORT USART2_IRQHandler [WEAK]
		214	EXPORT USART3_IRQHandler [WEAK]
		215	EXPORT EXTI15_10_IRQHandler [WEAK]
		216	EXPORT RTC_Alarm_IRQHandler [WEAK]
		217
		218	WWDG_IRQHandler
		219	PVD_IRQHandler
		220	TAMPER_IRQHandler
		221	RTC_IRQHandler
		222	FLASH_IRQHandler
		223	RCC_IRQHandler
		224	EXTI0_IRQHandler
		225	EXTI1_IRQHandler
		226	EXTI2_IRQHandler
		227	EXTI3_IRQHandler
		228	EXTI4_IRQHandler
		229	DMA1_Channel1_IRQHandler
		230	DMA1_Channel2_IRQHandler
		231	DMA1_Channel3_IRQHandler
		232	DMA1_Channel4_IRQHandler
		233	DMA1_Channel5_IRQHandler
		234	DMA1_Channel6_IRQHandler
		235	DMA1_Channel7_IRQHandler
		236	ADC1_IRQHandler
		237	EXTI9_5_IRQHandler
		238	TIM2_IRQHandler
		239	TIM3_IRQHandler
		240	TIM4_IRQHandler
		241	I2C1_EV_IRQHandler
		242	I2C1_ER_IRQHandler
		243	I2C2_EV_IRQHandler
		244	I2C2_ER_IRQHandler
		245	SPI1_IRQHandler
		246	SPI2_IRQHandler
		247	USART1_IRQHandler
		248	USART2_IRQHandler
		249	USART3_IRQHandler
		250	EXTI15_10_IRQHandler
		251	RTC_Alarm_IRQHandler
		252
		253	B .
		254
		255	ENDP
		256
		257	ALIGN
		258
		259	;*******************************************************************************
		260	; User Stack and Heap initialization
		261	;*******************************************************************************
		262	IF :DEF:__MICROLIB
		263
		264	EXPORT __initial_sp
		265	EXPORT __heap_base
		266	EXPORT __heap_limit
		267
		268	ELSE
		269
		270	IMPORT __use_two_region_memory
		271	EXPORT __user_initial_stackheap
		272
		273	__user_initial_stackheap
		274
		275	LDR R0, = Heap_Mem
		276	LDR R1, =(Stack_Mem + Stack_Size)
		277	LDR R2, = (Heap_Mem + Heap_Size)
		278	LDR R3, = Stack_Mem
		279	BX LR
		280
		281	ALIGN
		282
		283	ENDIF
		284
		285	END
		286

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(root)/trunk/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xb.s – Rev 2