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Rev	Author	Line No.	Line
2	mjames	1	;****************** (C) COPYRIGHT 2017 STMicroelectronics ******************
		2	; File Name : startup_stm32f101x6.s*
		3	; Author : MCD Application Team*
		4	; Description : STM32F101x6 Devices vector table for MDK-ARM toolchain.*
		5	; This module performs:*
		6	; - Set the initial SP*
		7	; - Set the initial PC == Reset_Handler*
		8	; - Set the vector table entries with the exceptions ISR address*
		9	; - Configure the clock system*
		10	; - Branches to __main in the C library (which eventually*
		11	; calls main()).*
		12	; After Reset the Cortex-M3 processor is in Thread mode,*
		13	; priority is Privileged, and the Stack is set to Main.*
		14	;******************************************************************************
		15	; @attention*
		16	;*
		17	; Copyright (c) 2017 STMicroelectronics.*
		18	; All rights reserved.*
		19	;*
		20	; This software component is licensed by ST under BSD 3-Clause license,*
		21	; the "License"; You may not use this file except in compliance with the*
		22	; License. You may obtain a copy of the License at:*
		23	; opensource.org/licenses/BSD-3-Clause*
		24	;*
		25	;******************************************************************************
		26
		27	; Amount of memory (in bytes) allocated for Stack
		28	; Tailor this value to your application needs
		29	; <h> Stack Configuration
		30	; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
		31	; </h>
		32
		33	Stack_Size EQU 0x00000400
		34
		35	AREA STACK, NOINIT, READWRITE, ALIGN=3
		36	Stack_Mem SPACE Stack_Size
		37	__initial_sp
		38
		39
		40	; <h> Heap Configuration
		41	; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
		42	; </h>
		43
		44	Heap_Size EQU 0x00000200
		45
		46	AREA HEAP, NOINIT, READWRITE, ALIGN=3
		47	__heap_base
		48	Heap_Mem SPACE Heap_Size
		49	__heap_limit
		50
		51	PRESERVE8
		52	THUMB
		53
		54
		55	; Vector Table Mapped to Address 0 at Reset
		56	AREA RESET, DATA, READONLY
		57	EXPORT __Vectors
		58	EXPORT __Vectors_End
		59	EXPORT __Vectors_Size
		60
		61	__Vectors DCD __initial_sp ; Top of Stack
		62	DCD Reset_Handler ; Reset Handler
		63	DCD NMI_Handler ; NMI Handler
		64	DCD HardFault_Handler ; Hard Fault Handler
		65	DCD MemManage_Handler ; MPU Fault Handler
		66	DCD BusFault_Handler ; Bus Fault Handler
		67	DCD UsageFault_Handler ; Usage Fault Handler
		68	DCD 0 ; Reserved
		69	DCD 0 ; Reserved
		70	DCD 0 ; Reserved
		71	DCD 0 ; Reserved
		72	DCD SVC_Handler ; SVCall Handler
		73	DCD DebugMon_Handler ; Debug Monitor Handler
		74	DCD 0 ; Reserved
		75	DCD PendSV_Handler ; PendSV Handler
		76	DCD SysTick_Handler ; SysTick Handler
		77
		78	; External Interrupts
		79	DCD WWDG_IRQHandler ; Window Watchdog
		80	DCD PVD_IRQHandler ; PVD through EXTI Line detect
		81	DCD TAMPER_IRQHandler ; Tamper
		82	DCD RTC_IRQHandler ; RTC
		83	DCD FLASH_IRQHandler ; Flash
		84	DCD RCC_IRQHandler ; RCC
		85	DCD EXTI0_IRQHandler ; EXTI Line 0
		86	DCD EXTI1_IRQHandler ; EXTI Line 1
		87	DCD EXTI2_IRQHandler ; EXTI Line 2
		88	DCD EXTI3_IRQHandler ; EXTI Line 3
		89	DCD EXTI4_IRQHandler ; EXTI Line 4
		90	DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
		91	DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
		92	DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
		93	DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
		94	DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
		95	DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
		96	DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
		97	DCD ADC1_IRQHandler ; ADC1
		98	DCD 0 ; Reserved
		99	DCD 0 ; Reserved
		100	DCD 0 ; Reserved
		101	DCD 0 ; Reserved
		102	DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
		103	DCD 0 ; Reserved
		104	DCD 0 ; Reserved
		105	DCD 0 ; Reserved
		106	DCD 0 ; Reserved
		107	DCD TIM2_IRQHandler ; TIM2
		108	DCD TIM3_IRQHandler ; TIM3
		109	DCD 0 ; Reserved
		110	DCD I2C1_EV_IRQHandler ; I2C1 Event
		111	DCD I2C1_ER_IRQHandler ; I2C1 Error
		112	DCD 0 ; Reserved
		113	DCD 0 ; Reserved
		114	DCD SPI1_IRQHandler ; SPI1
		115	DCD 0 ; Reserved
		116	DCD USART1_IRQHandler ; USART1
		117	DCD USART2_IRQHandler ; USART2
		118	DCD 0 ; Reserved
		119	DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
		120	DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
		121	__Vectors_End
		122
		123	__Vectors_Size EQU __Vectors_End - __Vectors
		124
		125	AREA \|.text\|, CODE, READONLY
		126
		127	; Reset handler routine
		128	Reset_Handler PROC
		129	EXPORT Reset_Handler [WEAK]
		130	IMPORT __main
		131	IMPORT SystemInit
		132	LDR R0, =SystemInit
		133	BLX R0
		134	LDR R0, =__main
		135	BX R0
		136	ENDP
		137
		138	; Dummy Exception Handlers (infinite loops which can be modified)
		139
		140	NMI_Handler PROC
		141	EXPORT NMI_Handler [WEAK]
		142	B .
		143	ENDP
		144	HardFault_Handler\
		145	PROC
		146	EXPORT HardFault_Handler [WEAK]
		147	B .
		148	ENDP
		149	MemManage_Handler\
		150	PROC
		151	EXPORT MemManage_Handler [WEAK]
		152	B .
		153	ENDP
		154	BusFault_Handler\
		155	PROC
		156	EXPORT BusFault_Handler [WEAK]
		157	B .
		158	ENDP
		159	UsageFault_Handler\
		160	PROC
		161	EXPORT UsageFault_Handler [WEAK]
		162	B .
		163	ENDP
		164	SVC_Handler PROC
		165	EXPORT SVC_Handler [WEAK]
		166	B .
		167	ENDP
		168	DebugMon_Handler\
		169	PROC
		170	EXPORT DebugMon_Handler [WEAK]
		171	B .
		172	ENDP
		173	PendSV_Handler PROC
		174	EXPORT PendSV_Handler [WEAK]
		175	B .
		176	ENDP
		177	SysTick_Handler PROC
		178	EXPORT SysTick_Handler [WEAK]
		179	B .
		180	ENDP
		181
		182	Default_Handler PROC
		183
		184	EXPORT WWDG_IRQHandler [WEAK]
		185	EXPORT PVD_IRQHandler [WEAK]
		186	EXPORT TAMPER_IRQHandler [WEAK]
		187	EXPORT RTC_IRQHandler [WEAK]
		188	EXPORT FLASH_IRQHandler [WEAK]
		189	EXPORT RCC_IRQHandler [WEAK]
		190	EXPORT EXTI0_IRQHandler [WEAK]
		191	EXPORT EXTI1_IRQHandler [WEAK]
		192	EXPORT EXTI2_IRQHandler [WEAK]
		193	EXPORT EXTI3_IRQHandler [WEAK]
		194	EXPORT EXTI4_IRQHandler [WEAK]
		195	EXPORT DMA1_Channel1_IRQHandler [WEAK]
		196	EXPORT DMA1_Channel2_IRQHandler [WEAK]
		197	EXPORT DMA1_Channel3_IRQHandler [WEAK]
		198	EXPORT DMA1_Channel4_IRQHandler [WEAK]
		199	EXPORT DMA1_Channel5_IRQHandler [WEAK]
		200	EXPORT DMA1_Channel6_IRQHandler [WEAK]
		201	EXPORT DMA1_Channel7_IRQHandler [WEAK]
		202	EXPORT ADC1_IRQHandler [WEAK]
		203	EXPORT EXTI9_5_IRQHandler [WEAK]
		204	EXPORT TIM2_IRQHandler [WEAK]
		205	EXPORT TIM3_IRQHandler [WEAK]
		206	EXPORT I2C1_EV_IRQHandler [WEAK]
		207	EXPORT I2C1_ER_IRQHandler [WEAK]
		208	EXPORT SPI1_IRQHandler [WEAK]
		209	EXPORT USART1_IRQHandler [WEAK]
		210	EXPORT USART2_IRQHandler [WEAK]
		211	EXPORT EXTI15_10_IRQHandler [WEAK]
		212	EXPORT RTC_Alarm_IRQHandler [WEAK]
		213
		214	WWDG_IRQHandler
		215	PVD_IRQHandler
		216	TAMPER_IRQHandler
		217	RTC_IRQHandler
		218	FLASH_IRQHandler
		219	RCC_IRQHandler
		220	EXTI0_IRQHandler
		221	EXTI1_IRQHandler
		222	EXTI2_IRQHandler
		223	EXTI3_IRQHandler
		224	EXTI4_IRQHandler
		225	DMA1_Channel1_IRQHandler
		226	DMA1_Channel2_IRQHandler
		227	DMA1_Channel3_IRQHandler
		228	DMA1_Channel4_IRQHandler
		229	DMA1_Channel5_IRQHandler
		230	DMA1_Channel6_IRQHandler
		231	DMA1_Channel7_IRQHandler
		232	ADC1_IRQHandler
		233	EXTI9_5_IRQHandler
		234	TIM2_IRQHandler
		235	TIM3_IRQHandler
		236	I2C1_EV_IRQHandler
		237	I2C1_ER_IRQHandler
		238	SPI1_IRQHandler
		239	USART1_IRQHandler
		240	USART2_IRQHandler
		241	EXTI15_10_IRQHandler
		242	RTC_Alarm_IRQHandler
		243
		244	B .
		245
		246	ENDP
		247
		248	ALIGN
		249
		250	;*******************************************************************************
		251	; User Stack and Heap initialization
		252	;*******************************************************************************
		253	IF :DEF:__MICROLIB
		254
		255	EXPORT __initial_sp
		256	EXPORT __heap_base
		257	EXPORT __heap_limit
		258
		259	ELSE
		260
		261	IMPORT __use_two_region_memory
		262	EXPORT __user_initial_stackheap
		263
		264	__user_initial_stackheap
		265
		266	LDR R0, = Heap_Mem
		267	LDR R1, =(Stack_Mem + Stack_Size)
		268	LDR R2, = (Heap_Mem + Heap_Size)
		269	LDR R3, = Stack_Mem
		270	BX LR
		271
		272	ALIGN
		273
		274	ENDIF
		275
		276	END
		277
		278	;********************** (C) COPYRIGHT STMicroelectronics *END OF FILE***

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(root)/trunk/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101x6.s – Rev 2