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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file system_stm32f0xx.c |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File. |
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| 6 | * |
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| 7 | * 1. This file provides two functions and one global variable to be called from |
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| 8 | * user application: |
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| 9 | * - SystemInit(): This function is called at startup just after reset and |
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| 10 | * before branch to main program. This call is made inside |
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| 11 | * the "startup_stm32f0xx.s" file. |
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| 12 | * |
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| 13 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used |
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| 14 | * by the user application to setup the SysTick |
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| 15 | * timer or configure other parameters. |
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| 16 | * |
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| 17 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must |
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| 18 | * be called whenever the core clock is changed |
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| 19 | * during program execution. |
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| 20 | * |
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| 21 | * |
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| 22 | ****************************************************************************** |
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| 23 | * @attention |
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| 24 | * |
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| 25 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 26 | * All rights reserved.</center></h2> |
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| 27 | * |
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| 28 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 29 | * the "License"; You may not use this file except in compliance with the |
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| 30 | * License. You may obtain a copy of the License at: |
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| 31 | * opensource.org/licenses/BSD-3-Clause |
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| 32 | * |
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| 33 | ****************************************************************************** |
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| 34 | */ |
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| 35 | |||
| 36 | /** @addtogroup CMSIS |
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| 37 | * @{ |
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| 38 | */ |
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| 39 | |||
| 40 | /** @addtogroup stm32f0xx_system |
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| 41 | * @{ |
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| 42 | */ |
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| 43 | |||
| 44 | /** @addtogroup STM32F0xx_System_Private_Includes |
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| 45 | * @{ |
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| 46 | */ |
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| 47 | |||
| 48 | #include "stm32f0xx.h" |
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| 49 | |||
| 50 | /** |
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| 51 | * @} |
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| 52 | */ |
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| 53 | |||
| 54 | /** @addtogroup STM32F0xx_System_Private_TypesDefinitions |
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| 55 | * @{ |
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| 56 | */ |
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| 57 | |||
| 58 | /** |
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| 59 | * @} |
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| 60 | */ |
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| 61 | |||
| 62 | /** @addtogroup STM32F0xx_System_Private_Defines |
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| 63 | * @{ |
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| 64 | */ |
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| 65 | #if !defined (HSE_VALUE) |
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| 66 | #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. |
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| 67 | This value can be provided and adapted by the user application. */ |
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| 68 | #endif /* HSE_VALUE */ |
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| 69 | |||
| 70 | #if !defined (HSI_VALUE) |
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| 71 | #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. |
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| 72 | This value can be provided and adapted by the user application. */ |
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| 73 | #endif /* HSI_VALUE */ |
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| 74 | |||
| 75 | #if !defined (HSI48_VALUE) |
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| 76 | #define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in Hz. |
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| 77 | This value can be provided and adapted by the user application. */ |
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| 78 | #endif /* HSI48_VALUE */ |
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| 79 | /** |
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| 80 | * @} |
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| 81 | */ |
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| 82 | |||
| 83 | /** @addtogroup STM32F0xx_System_Private_Macros |
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| 84 | * @{ |
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| 85 | */ |
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| 86 | |||
| 87 | /** |
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| 88 | * @} |
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| 89 | */ |
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| 90 | |||
| 91 | /** @addtogroup STM32F0xx_System_Private_Variables |
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| 92 | * @{ |
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| 93 | */ |
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| 94 | /* This variable is updated in three ways: |
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| 95 | 1) by calling CMSIS function SystemCoreClockUpdate() |
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| 96 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq() |
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| 97 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency |
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| 98 | Note: If you use this function to configure the system clock; then there |
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| 99 | is no need to call the 2 first functions listed above, since SystemCoreClock |
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| 100 | variable is updated automatically. |
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| 101 | */ |
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| 102 | uint32_t SystemCoreClock = 8000000; |
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| 103 | |||
| 104 | const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; |
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| 105 | const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; |
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| 106 | |||
| 107 | /** |
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| 108 | * @} |
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| 109 | */ |
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| 110 | |||
| 111 | /** @addtogroup STM32F0xx_System_Private_FunctionPrototypes |
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| 112 | * @{ |
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| 113 | */ |
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| 114 | |||
| 115 | /** |
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| 116 | * @} |
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| 117 | */ |
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| 118 | |||
| 119 | /** @addtogroup STM32F0xx_System_Private_Functions |
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| 120 | * @{ |
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| 121 | */ |
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| 122 | |||
| 123 | /** |
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| 124 | * @brief Setup the microcontroller system |
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| 125 | * @param None |
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| 126 | * @retval None |
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| 127 | */ |
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| 128 | void SystemInit(void) |
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| 129 | { |
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| 130 | /* NOTE :SystemInit(): This function is called at startup just after reset and |
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| 131 | before branch to main program. This call is made inside |
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| 132 | the "startup_stm32f0xx.s" file. |
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| 133 | User can setups the default system clock (System clock source, PLL Multiplier |
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| 134 | and Divider factors, AHB/APBx prescalers and Flash settings). |
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| 135 | */ |
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| 136 | } |
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| 137 | |||
| 138 | /** |
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| 139 | * @brief Update SystemCoreClock variable according to Clock Register Values. |
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| 140 | * The SystemCoreClock variable contains the core clock (HCLK), it can |
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| 141 | * be used by the user application to setup the SysTick timer or configure |
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| 142 | * other parameters. |
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| 143 | * |
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| 144 | * @note Each time the core clock (HCLK) changes, this function must be called |
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| 145 | * to update SystemCoreClock variable value. Otherwise, any configuration |
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| 146 | * based on this variable will be incorrect. |
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| 147 | * |
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| 148 | * @note - The system frequency computed by this function is not the real |
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| 149 | * frequency in the chip. It is calculated based on the predefined |
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| 150 | * constant and the selected clock source: |
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| 151 | * |
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| 152 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) |
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| 153 | * |
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| 154 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) |
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| 155 | * |
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| 156 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) |
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| 157 | * or HSI_VALUE(*) multiplied/divided by the PLL factors. |
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| 158 | * |
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| 159 | * (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value |
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| 160 | * 8 MHz) but the real value may vary depending on the variations |
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| 161 | * in voltage and temperature. |
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| 162 | * |
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| 163 | * (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (its value |
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| 164 | * depends on the application requirements), user has to ensure that HSE_VALUE |
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| 165 | * is same as the real frequency of the crystal used. Otherwise, this function |
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| 166 | * may have wrong result. |
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| 167 | * |
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| 168 | * - The result of this function could be not correct when using fractional |
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| 169 | * value for HSE crystal. |
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| 170 | * |
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| 171 | * @param None |
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| 172 | * @retval None |
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| 173 | */ |
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| 174 | void SystemCoreClockUpdate (void) |
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| 175 | { |
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| 176 | uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0; |
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| 177 | |||
| 178 | /* Get SYSCLK source -------------------------------------------------------*/ |
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| 179 | tmp = RCC->CFGR & RCC_CFGR_SWS; |
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| 180 | |||
| 181 | switch (tmp) |
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| 182 | { |
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| 183 | case RCC_CFGR_SWS_HSI: /* HSI used as system clock */ |
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| 184 | SystemCoreClock = HSI_VALUE; |
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| 185 | break; |
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| 186 | case RCC_CFGR_SWS_HSE: /* HSE used as system clock */ |
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| 187 | SystemCoreClock = HSE_VALUE; |
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| 188 | break; |
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| 189 | case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ |
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| 190 | /* Get PLL clock source and multiplication factor ----------------------*/ |
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| 191 | pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; |
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| 192 | pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; |
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| 193 | pllmull = ( pllmull >> 18) + 2; |
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| 194 | predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; |
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| 195 | |||
| 196 | if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) |
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| 197 | { |
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| 198 | /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */ |
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| 199 | SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull; |
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| 200 | } |
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| 201 | #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) |
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| 202 | else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) |
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| 203 | { |
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| 204 | /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */ |
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| 205 | SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull; |
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| 206 | } |
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| 207 | #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */ |
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| 208 | else |
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| 209 | { |
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| 210 | #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \ |
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| 211 | || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \ |
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| 212 | || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
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| 213 | /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */ |
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| 214 | SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull; |
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| 215 | #else |
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| 216 | /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */ |
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| 217 | SystemCoreClock = (HSI_VALUE >> 1) * pllmull; |
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| 218 | #endif /* STM32F042x6 || STM32F048xx || STM32F070x6 || |
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| 219 | STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB || |
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| 220 | STM32F091xC || STM32F098xx || STM32F030xC */ |
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| 221 | } |
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| 222 | break; |
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| 223 | default: /* HSI used as system clock */ |
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| 224 | SystemCoreClock = HSI_VALUE; |
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| 225 | break; |
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| 226 | } |
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| 227 | /* Compute HCLK clock frequency ----------------*/ |
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| 228 | /* Get HCLK prescaler */ |
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| 229 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; |
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| 230 | /* HCLK clock frequency */ |
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| 231 | SystemCoreClock >>= tmp; |
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| 232 | } |
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| 233 | |||
| 234 | /** |
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| 235 | * @} |
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| 236 | */ |
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| 237 | |||
| 238 | /** |
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| 239 | * @} |
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| 240 | */ |
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| 241 | |||
| 242 | /** |
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| 243 | * @} |
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| 244 | */ |
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| 245 | |||
| 246 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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| 247 |